RegisterIntr.h

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/*
 * Copyright (c) 2017-present, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
#ifndef ti_osal_RegisterIntr__include
#define ti_osal_RegisterIntr__include

#include <ti/osal/EventCombinerP.h>
#include <ti/osal/HwiP.h>
#include <ti/osal/MuxIntcP.h>

#ifdef __cplusplus
extern "C" {
#endif

#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
typedef void (*Osal_IsrRoutine)(uintptr_t arg);
typedef struct {
    char    *name;              
    uint32_t corepacEventNum;   
    uint32_t intVecNum;         
    Osal_IsrRoutine isrRoutine; 
    uintptr_t arg;              
    uint32_t priority;          
    uint32_t triggerSensitivity; 
    uint32_t enableIntr;          
#ifdef QNX_OS
    uint32_t intAutoEnable;     
#endif
} OsalRegisterIntParams_corepac_t;

#define OSAL_REGINT_INTVEC_EVENT_COMBINER (16U) 

typedef struct {
   MuxIntcP_inParams *muxInParams;      
   MuxIntcP_outParams *muxOutParams;    
} OsalRegisterIntParams_socmux_t;

typedef struct {
    OsalRegisterIntParams_corepac_t corepacConfig;  
    OsalRegisterIntParams_socmux_t  socMuxConfig;   
} OsalRegisterIntrParams_t;

typedef int32_t OsalInterruptRetCode_e;
#define  OSAL_INT_SUCCESS                       ((int32_t) 0)

#define  OSAL_INT_ERR_INVALID_PARAMS            ((int32_t) -1)

#define  OSAL_INT_ERR_HWICREATE                 ((int32_t) -2)

#define  OSAL_INT_ERR_EVENTCOMBINER_REG         ((int32_t) -3)

#define  OSAL_INT_ERR_DELETE                    ((int32_t) -4)

#define  OSAL_INT_UNSUPPORTED                   ((int32_t) -5)
/* @} */

void Osal_RegisterInterrupt_initParams(OsalRegisterIntrParams_t *interruptRegParams);
OsalInterruptRetCode_e Osal_RegisterInterruptDirect(OsalRegisterIntrParams_t *interruptRegParams,
                                                    HwiP_DirectFxn isrFxn, HwiP_Handle *hwiPHandlePtr);
OsalInterruptRetCode_e Osal_RegisterInterrupt(OsalRegisterIntrParams_t *interruptRegParams,HwiP_Handle *hwiPHandlePtr);
OsalInterruptRetCode_e Osal_DeleteInterrupt(HwiP_Handle hwiPhandle,uint32_t corepacEventNum);
void Osal_EnableInterrupt(uint32_t corepacEvent,uint32_t interruptNum);
void Osal_DisableInterrupt(uint32_t corepacEvent,uint32_t interruptNum);
void Osal_ClearInterrupt(uint32_t corepacEvent,uint32_t interruptNum);
#ifdef __cplusplus
}
#endif

#endif /* ti_osal_RegisterIntr__include */
/* @} */