cpsw.h

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/*
 *  Copyright (c) Texas Instruments Incorporated 2020
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef CPSW_H_
#define CPSW_H_

/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */

#include <stdint.h>
#include <ti/drv/enet/include/mod/cpsw_ale.h>
#include <ti/drv/enet/include/mod/cpsw_cpts.h>
#include <ti/drv/enet/include/mod/cpsw_hostport.h>
#include <ti/drv/enet/include/mod/cpsw_macport.h>
#include <ti/drv/enet/include/mod/mdio.h>
#include <ti/drv/enet/include/mod/cpsw_stats.h>
#include <ti/drv/enet/include/core/enet_mod_phy.h>
#include <ti/drv/enet/include/core/enet_rm.h>
#include <ti/drv/enet/include/core/enet_dma.h>
#include <ti/drv/enet/include/per/cpsw_clks.h>

#ifdef __cplusplus
extern "C" {
#endif

/* ========================================================================== */
/*                                 Macros                                     */
/* ========================================================================== */
#define CPSW_PER_PUBLIC_IOCTL(x)              (ENET_IOCTL_TYPE_PUBLIC | \
                                               ENET_IOCTL_PER_BASE | \
                                               ENET_IOCTL_PER_CPSW |    \
                                               ENET_IOCTL_MIN(x))

#define CPSW_MAC_PORT_NUM                     (8U)

#define CPSW_INTERVLAN_INGRESSPKT_MATCH_PORT      (CPSW_ALE_POLICER_MATCH_PORT)

#define CPSW_INTERVLAN_INGRESSPKT_MATCH_MACSRC    (CPSW_ALE_POLICER_MATCH_MACSRC)

#define CPSW_INTERVLAN_INGRESSPKT_MATCH_MACDST    (CPSW_ALE_POLICER_MATCH_MACDST)

#define CPSW_INTERVLAN_INGRESSPKT_MATCH_ETHERTYPE (CPSW_ALE_POLICER_MATCH_ETHERTYPE)

#define CPSW_INTERVLAN_INGRESSPKT_MATCH_IPSRC     (CPSW_ALE_POLICER_MATCH_IPSRC)

#define CPSW_INTERVLAN_INGRESSPKT_MATCH_IPDST     (CPSW_ALE_POLICER_MATCH_IPDST)

#define CPSW_INTR_STATS_PEND0                     (1U)

#define CPSW_INTR_MDIO_PEND                       (2U)

#define CPSW_INTR_EVNT_PEND                       (3U)

/* ========================================================================== */
/*                         Structures and Enums                               */
/* ========================================================================== */

typedef enum Cpsw_Ioctl_e
{
    CPSW_PER_IOCTL_SET_INTERVLAN_ROUTE_UNI_EGRESS = CPSW_PER_PUBLIC_IOCTL(0U),

    CPSW_PER_IOCTL_CLEAR_INTERVLAN_ROUTE_UNI_EGRESS = CPSW_PER_PUBLIC_IOCTL(1U),

    CPSW_PER_IOCTL_SET_INTERVLAN_ROUTE_MULTI_EGRESS = CPSW_PER_PUBLIC_IOCTL(2U),

    CPSW_PER_IOCTL_CLEAR_INTERVLAN_ROUTE_MULTI_EGRESS = CPSW_PER_PUBLIC_IOCTL(3U),

    CPSW_PER_IOCTL_SET_SHORT_IPG_CFG = CPSW_PER_PUBLIC_IOCTL(4U),

    CPSW_PER_IOCTL_GET_SHORT_IPG_CFG = CPSW_PER_PUBLIC_IOCTL(5U),

    CPSW_IOCTL_REGISTER_PORT_RX_FLOW = CPSW_PER_PUBLIC_IOCTL(6U),

    CPSW_IOCTL_UNREGISTER_PORT_RX_FLOW = CPSW_PER_PUBLIC_IOCTL(7U),
} Cpsw_Ioctl;

typedef struct Cpsw_InterVlanRouteIngressPktMatchCfg_s
{
    uint32_t packetMatchEnMask;

    bool ttlCheckEn;

    Enet_MacPort ingressPort;

    CpswAle_MacAddrClassifierInfo srcMacAddrInfo;

    CpswAle_MacAddrClassifierInfo dstMacAddrInfo;

    uint32_t vlanId;

    CpswAle_IpAddrClassifierInfo srcIpInfo;

    CpswAle_IpAddrClassifierInfo dstIpInfo;

    uint16_t etherType;
} Cpsw_InterVlanRouteIngressPktMatchCfg;

typedef struct Cpsw_InterVlanEgressPortCfg_s
{
    Enet_MacPort egressPort;

    CpswMacPort_InterVlanRoutingCfg outPktModCfg;
} Cpsw_InterVlanEgressPortCfg;

typedef struct Cpsw_SetInterVlanRouteUniEgressInArgs_s
{
    Cpsw_InterVlanRouteIngressPktMatchCfg inPktMatchCfg;

    Cpsw_InterVlanEgressPortCfg egressCfg;
} Cpsw_SetInterVlanRouteUniEgressInArgs;

typedef struct Cpsw_SetInterVlanRouteUniEgressOutArgs_s
{
    CpswMacPort_InterVlanRouteId egressPortRouteId;

    CpswAle_PolicerEntryOutArgs ingressPacketClassifierInfo;
} Cpsw_SetInterVlanRouteUniEgressOutArgs;

typedef struct Cpsw_ClearInterVlanRouteUniEgressInArgs_s
{
    Cpsw_InterVlanRouteIngressPktMatchCfg inPktMatchCfg;

    Cpsw_InterVlanEgressPortCfg egressCfg;

    uint32_t delAleEntryMask;
} Cpsw_ClearInterVlanRouteUniEgressInArgs;

typedef struct Cpsw_SetInterVlanRouteMultiEgressInArgs_s
{
    uint32_t numEgressPorts;

    Cpsw_InterVlanEgressPortCfg egressCfg[CPSW_ALE_NUM_MAC_PORTS];

    Cpsw_InterVlanRouteIngressPktMatchCfg inPktMatchCfg;
} Cpsw_SetInterVlanRouteMultiEgressInArgs;

typedef struct Cpsw_SetInterVlanRouteMultiEgressOutArgs_s
{
    CpswMacPort_InterVlanRouteId egressPortRouteId;

    CpswAle_PolicerEntryOutArgs ingressPacketClassifierInfo;
} Cpsw_SetInterVlanRouteMultiEgressOutArgs;

typedef struct Cpsw_ClearInterVlanRouteMultiEgressInArgs_s
{
    uint32_t numEgressPorts;

    Cpsw_InterVlanEgressPortCfg egressCfg[CPSW_ALE_NUM_MAC_PORTS];

    Cpsw_InterVlanRouteIngressPktMatchCfg inPktMatchCfg;

    uint32_t delAleEntryMask;
} Cpsw_ClearInterVlanRouteMultiEgressInArgs;

typedef struct Cpsw_SetTxShortIpgCfgInArgs_s
{
    bool configureGapThresh;

    uint32_t ipgTriggerThreshBlkCnt;

    uint32_t numMacPorts;

    CpswMacPort_PortTxShortIpgCfg portShortIpgCfg[CPSW_MAC_PORT_NUM];
} Cpsw_SetTxShortIpgCfgInArgs;

typedef struct Cpsw_TxShortIpgCfg_s
{
    uint32_t ipgTriggerThreshBlkCnt;

    uint32_t numMacPorts;

    CpswMacPort_PortTxShortIpgCfg portShortIpgCfg[CPSW_MAC_PORT_NUM];
} Cpsw_TxShortIpgCfg;

typedef struct Cpsw_PortRxFlowInfo_s
{
    uint32_t coreKey;

    uint32_t startIdx;

    uint32_t flowIdx;

    Enet_MacPort macPort;
} Cpsw_PortRxFlowInfo;

typedef struct Cpsw_VlanCfg_s
{
    bool vlanAware;

    Enet_VlanTagType vlanSwitch;

    uint16_t outerVlan;

    uint16_t innerVlan;
} Cpsw_VlanCfg;

typedef struct Cpsw_MdioLinkStateChangeInfo_s
{
    uint32_t phyAddr;

    bool aliveChanged;

    bool isAlive;

    bool linkChanged;

    bool isLinked;
} Cpsw_MdioLinkStateChangeInfo;

typedef void (*Cpsw_MdioLinkStateChangeCb)(Cpsw_MdioLinkStateChangeInfo *info,
                                           void *appArg);

typedef void (*Cpsw_PortLinkStatusChangeCb)(Enet_MacPort macPort,
                                            bool isLinkUp,
                                            void *appArg);

typedef struct Cpsw_Cfg_s
{
    uint32_t escalatePriorityLoadVal;

    const void *dmaCfg;

    Cpsw_VlanCfg vlanCfg;

    uint32_t txMtu[ENET_PRI_NUM];

    // /*! Configuration of the CPSW DMA */
    // EnetDma_Cfg dmaCfg;

    CpswHostPort_Cfg hostPortCfg;

    CpswAle_Cfg aleCfg;

    CpswCpts_Cfg cptsCfg;

    Mdio_Cfg mdioCfg;

    EnetRm_ResCfg resCfg;

    uint32_t intrPriority;

    Cpsw_MdioLinkStateChangeCb mdioLinkStateChangeCb;

    void *mdioLinkStateChangeCbArg;

    Cpsw_PortLinkStatusChangeCb portLinkStatusChangeCb;

    void *portLinkStatusChangeCbArg;

    bool enableQsgmii0RDC;

    bool enableQsgmii1RDC;
} Cpsw_Cfg;

/* ========================================================================== */
/*                         Global Variables Declarations                      */
/* ========================================================================== */

/* None */

/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */

/* None */

/* ========================================================================== */
/*                        Deprecated Function Declarations                    */
/* ========================================================================== */

/* None */

/* ========================================================================== */
/*                       Static Function Definitions                          */
/* ========================================================================== */

/* None */

#ifdef __cplusplus
}
#endif

#endif /* CPSW_H_ */