PDK API Guide for J721E
ds90ub941.h
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33 
53 /* @} */
54 
55 #ifndef _DS90UB941_H_
56 #define _DS90UB941_H_
57 
59 
60 #ifdef __cplusplus
61 extern "C" {
62 #endif
63 
77 #define BOARD_FPD_UB941_I2C_INSTANCE (0x00U) /* TBD */
78 
80 #define BOARD_FPD_UB941_I2C_SLV_ADDR (0x00U) /* TBD */
81 
84 #define BOARD_FPD_UB941_RESET_CTL_REG_ADDR (0x01U)
85 
86 #define BOARD_FPD_UB941_DEVICE_CFG_REG_ADDR (0x02U)
87 
88 #define BOARD_FPD_UB941_GENERAL_CFG_REG_ADDR (0x03U)
89 
90 #define BOARD_FPD_UB941_DES_ID_REG_ADDR (0x06U)
91 
92 #define BOARD_FPD_UB941_SLAVE_ID0_REG_ADDR (0x07U)
93 
94 #define BOARD_FPD_UB941_SLAVE_ID1_REG_ADDR (0x70U)
95 
96 #define BOARD_FPD_UB941_SLAVE_ID2_REG_ADDR (0x71U)
97 
98 #define BOARD_FPD_UB941_SLAVE_ID3_REG_ADDR (0x72U)
99 
100 #define BOARD_FPD_UB941_SLAVE_ID4_REG_ADDR (0x73U)
101 
102 #define BOARD_FPD_UB941_SLAVE_ID5_REG_ADDR (0x74U)
103 
104 #define BOARD_FPD_UB941_SLAVE_ID6_REG_ADDR (0x75U)
105 
106 #define BOARD_FPD_UB941_SLAVE_ID7_REG_ADDR (0x76U)
107 
108 #define BOARD_FPD_UB941_SLAVE_ALIAS_0_REG_ADDR (0x08U)
109 
110 #define BOARD_FPD_UB941_SLAVE_ALIAS_1_REG_ADDR (0x77U)
111 
112 #define BOARD_FPD_UB941_SLAVE_ALIAS_2_REG_ADDR (0x78U)
113 
114 #define BOARD_FPD_UB941_SLAVE_ALIAS_3_REG_ADDR (0x79U)
115 
116 #define BOARD_FPD_UB941_SLAVE_ALIAS_4_REG_ADDR (0x7AU)
117 
118 #define BOARD_FPD_UB941_SLAVE_ALIAS_5_REG_ADDR (0x7BU)
119 
120 #define BOARD_FPD_UB941_SLAVE_ALIAS_6_REG_ADDR (0x7CU)
121 
122 #define BOARD_FPD_UB941_SLAVE_ALIAS_7_REG_ADDR (0x7DU)
123 
124 
126 #define BOARD_FPD_UB941_GENERAL_STS_REG_ADDR (0x0CU)
127 
128 #define BOARD_FPD_UB941_I2C_CONTROL_REG_ADDR (0x17U)
129 
130 #define BOARD_FPD_UB941_SCL_HIGH_TIME_REG_ADDR (0x18U)
131 
132 #define BOARD_FPD_UB941_SCL_LOW_TIME_REG_ADDR (0x19U)
133 
134 #define BOARD_FPD_UB941_TX_PORT_SEL_REG_ADDR (0x1EU)
135 
136 #define BOARD_FPD_UB941_IND_ACC_CTL_REG_ADDR (0x40U)
137 
138 #define BOARD_FPD_UB941_IND_ACC_ADDR_REG_ADDR (0x41U)
139 
140 #define BOARD_FPD_UB941_IND_ADD_DATA_REG_ADDR (0x42U)
141 
142 #define BOARD_FPD_UB941_BRIDGE_CTL_REG_ADDR (0x4FU)
143 
144 #define BOARD_FPD_UB941_BRIDGE_CFG_REG_ADDR (0x54U)
145 
146 #define BOARD_FPD_UB941_BRIDGE_CFG2_REG_ADDR (0x56U)
147 
148 #define BOARD_FPD_UB941_DUAL_STS_DUAL_STS_P1_REG_ADDR (0x5AU)
149 
150 #define BOARD_FPD_UB941_DUAL_CTL1_REG_ADDR (0x5BU)
151 
152 #define BOARD_FPD_UB941_DUAL_CTL2_REG_ADDR (0x5CU)
153 
154 #define BOARD_FPD_UB941_PGCTL_PGCTL_P1_REG_ADDR (0x64U)
155 
156 #define BOARD_FPD_UB941_PGCFG_PGCFG_P1_REG_ADDR (0x65U)
157 
158 #define BOARD_FPD_UB941_PGIA_PGIA_P1_REG_ADDR (0x66U)
159 
160 #define BOARD_FPD_UB941_PGID_PGID_P1_REG_ADDR (0x67U)
161 
162 #define BOARD_FPD_UB941_DPHY_SKIP_TIMING_REG_ADDR (0x05U)
163 
164 #define BOARD_FPD_UB941_DSI_CONFIG_1_REG_ADDR (0x21U)
165 
167 #define BOARD_FPD_UB941_PGCDC1_REG_ADDR (0x03U)
168 
169 #define BOARD_FPD_UB941_PGTFS1_REG_ADDR (0x04U)
170 
171 #define BOARD_FPD_UB941_PGTFS2_REG_ADDR (0x05U)
172 
173 #define BOARD_FPD_UB941_PGTFS3_REG_ADDR (0x06U)
174 
175 #define BOARD_FPD_UB941_PGAFS1_REG_ADDR (0x07U)
176 
177 #define BOARD_FPD_UB941_PGAFS2_REG_ADDR (0x08U)
178 
179 #define BOARD_FPD_UB941_PGAFS3_REG_ADDR (0x09U)
180 
181 #define BOARD_FPD_UB941_PGHBP_REG_ADDR (0x0CU)
182 
183 #define BOARD_FPD_UB941_PGVBP_REG_ADDR (0x0DU)
184 
186 #define BOARD_FPD_UB941_ACT_HOR_WIDTH_REG_ADDR (0x20U)
187 
188 #define BOARD_FPD_UB941_ACT_VER_AND_HOR_WIDTH_REG_ADDR (0x03U)
189 
190 #define BOARD_FPD_UB941_TOT_VER_WIDTH_REG_ADDR (0x09U)
191 
192 //#define BOARD_FPD_UB941_TOT_VER_AND_HOR_WIDTH_REG_ADDR (0x03U)
194 #define BOARD_FPD_UB941_TOT_VER_AND_HOR_WIDTH_REG_ADDR (0xD4U)
195 
196 #define BOARD_FPD_UB941_TOT_HOR_AND_VER_WIDTH_REG_ADDR (0x20U)
197 
198 #define BOARD_FPD_UB941_HOR_BACK_PORCH_WIDTH_REG_ADDR (0xD8U)
199 
200 #define BOARD_FPD_UB941_VER_BACK_PORCH_WIDTH_REG_ADDR (0x23U)
201 
204 #define BOARD_FPD_UB941_DISABLE_DSI_SHIFT_CNT (3U)
205 
206 #define BOARD_FPD_UB941_DIGITAL_RESET1_SHIFT_CNT (1U)
207 
208 #define BOARD_FPD_UB941_DIGITAL_RESET0_SHIFT_CNT (1U)
209 
212 #define BOARD_FPD_UB941_DSI1_CLK_PN_SWAP_SHIFT_CNT (6U)
213 
214 #define BOARD_FPD_UB941_DSI1_DATA_PN_SWAP_SHIFT_CNT (5U)
215 
216 #define BOARD_FPD_UB941_DSI0_CLK_PN_SWAP_SHIFT_CNT (2U)
217 
218 #define BOARD_FPD_UB941_DSI0_DATA_PN_SWAP_SHIFT_CNT (1U)
219 
222 #define BOARD_FPD_UB941_IND_ACC_SEL_SHIFT_CNT (2U)
223 
224 #define BOARD_FPD_UB941_IND_ACC_READ_SHIFT_CNT (0U)
225 
228 #define BOARD_FPD_UB941_DSI_BYTES_PER_PIXEL_SHIFT_CNT (4U)
229 
232 #define BOARD_FPD_UB941_BRIDGE_LANE_MODE_SHIFT_CNT (2U)
233 
236 #define BOARD_FPD_UB941_FREQ_STBL_THR_SHIFT_CNT (3U)
237 
240 #define BOARD_FPD_UB941_FPD3_LINK_RDY_SHIFT_CNT (7U)
241 
242 #define BOARD_FPD_UB941_FPD3_TX_STS_SHIFT_CNT (6U)
243 
244 #define BOARD_FPD_UB941_DSI_CLK_DET_SHIFT_CNT (3U)
245 
246 #define BOARD_FPD_UB941_NO_DSI_CLK_SHIFT_CNT (1U)
247 
248 #define BOARD_FPD_UB941_FREQ_STABLE_SHIFT_CNT (0U)
249 
252 #define BOARD_FPD_UB941_RX_CRC_CHECKER_ENABLE_SHIFT_CNT (7U)
253 
254 #define BOARD_FPD_UB941_FILTER_ENABLE_SHIFT_CNT (4U)
255 
256 #define BOARD_FPD_UB941_I2C_PASS_THROUGH_SHIFT_CNT (3U)
257 
258 #define BOARD_FPD_UB941_PCLK_AUTO_SHIFT_CNT (1U)
259 
262 #define BOARD_FPD_UB941_FREEZE_DEV_ID_SHIFT_CNT (0U)
263 
266 #define BOARD_FPD_UB941_DSI_ERROR_SHIFT_CNT (6U)
267 
268 #define BOARD_FPD_UB941_DPHY_ERROR_SHIFT_CNT (5U)
269 
270 #define BOARD_FPD_UB941_LINK_LOST_SHIFT_CNT (4U)
271 
272 #define BOARD_FPD_UB941_BIST_CRC_ERROR_SHIFT_CNT (3U)
273 
274 #define BOARD_FPD_UB941_PCLK_DETECT_SHIFT_CNT (2U)
275 
276 #define BOARD_FPD_UB941_DES_ERROR_SHIFT_CNT (1U)
277 
278 #define BOARD_FPD_UB941_LINK_DETECT_SHIFT_CNT (0U)
279 
282 #define BOARD_FPD_UB941_I2C_PASS_ALL_SHIFT_CNT (7U)
283 
285 #define BOARD_FPD_UB941_PATTERN_GENERATOR_SHIFT_CNT (0U)
286 
287 #define BOARD_FPD_UB941_COLORS_BAR_PATTERN_SEL_SHIFT_CNT (2U)
288 
289 #define BOARD_FPD_UB941_PATTERN_SEL_SHIFT_CNT (4U)
290 
291 #define BOARD_FPD_UB941_AUTO_SCROLL_PATTERN_SHIFT_CNT (0U)
292 
293 #define BOARD_FPD_UB941_INVERTED_COLOR_PATTERN_SHIFT_CNT (1U)
294 
295 #define BOARD_FPD_UB941_PG_18B_SHIFT_CNT (4U)
296 
297 #define BOARD_FPD_UB941_PG_EXTCLK_SHIFT_CNT (5U)
298 
299 #define BOARD_FPD_UB941_PG_TSEL_SHIFT_CNT (6U)
300 
302 #define BOARD_FPD_UB941_DISABLE_DSI_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DISABLE_DSI_SHIFT_CNT)
303 
304 #define BOARD_FPD_UB941_DIGITAL_RESET1_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DIGITAL_RESET1_SHIFT_CNT)
305 
306 #define BOARD_FPD_UB941_DIGITAL_RESET0_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DIGITAL_RESET0_SHIFT_CNT)
307 
309 #define BOARD_FPD_UB941_DSI1_CLK_PN_SWAP_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DSI1_CLK_PN_SWAP_SHIFT_CNT)
310 
311 #define BOARD_FPD_UB941_DSI1_DATA_PN_SWAP_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DSI1_DATA_PN_SWAP_SHIFT_CNT)
312 
313 #define BOARD_FPD_UB941_DSI0_CLK_PN_SWAP_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DSI0_CLK_PN_SWAP_SHIFT_CNT)
314 
315 #define BOARD_FPD_UB941_DSI0_DATA_PN_SWAP_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DSI0_DATA_PN_SWAP_SHIFT_CNT)
316 
319 #define BOARD_FPD_UB941_IND_ACC_SEL_BIT_MASK (uint8_t)(0x07 << BOARD_FPD_UB941_IND_ACC_SEL_SHIFT_CNT)
320 
321 #define BOARD_FPD_UB941_IND_ACC_READ_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_IND_ACC_READ_SHIFT_CNT)
322 
325 #define BOARD_FPD_UB941_RX_CRC_CHECKER_ENABLE_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_RX_CRC_CHECKER_ENABLE_SHIFT_CNT)
326 
327 #define BOARD_FPD_UB941_FILTER_ENABLE_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_FILTER_ENABLE_SHIFT_CNT)
328 
329 #define BOARD_FPD_UB941_I2C_PASS_THROUGH_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_I2C_PASS_THROUGH_SHIFT_CNT)
330 
331 #define BOARD_FPD_UB941_PCLK_AUTO_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_PCLK_AUTO_SHIFT_CNT)
332 
335 #define BOARD_FPD_UB941_DSI_ERROR_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DSI_ERROR_SHIFT_CNT)
336 
337 #define BOARD_FPD_UB941_DPHY_ERROR_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DPHY_ERROR_SHIFT_CNT)
338 
339 #define BOARD_FPD_UB941_LINK_LOST_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_LINK_LOST_SHIFT_CNT)
340 
341 #define BOARD_FPD_UB941_BIST_CRC_ERROR_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_BIST_CRC_ERROR_SHIFT_CNT)
342 
343 #define BOARD_FPD_UB941_PCLK_DETECT_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_PCLK_DETECT_SHIFT_CNT)
344 
345 #define BOARD_FPD_UB941_DES_ERROR_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DES_ERROR_SHIFT_CNT)
346 
347 #define BOARD_FPD_UB941_LINK_DETECT_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_LINK_DETECT_SHIFT_CNT)
348 
351 #define BOARD_FPD_UB941_I2C_PASS_ALL_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_I2C_PASS_ALL_SHIFT_CNT)
352 
355 #define BOARD_FPD_UB941_FREEZE_DEV_ID_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_FREEZE_DEV_ID_SHIFT_CNT)
356 
359 #define BOARD_FPD_UB941_DSI_BYTES_PER_PIXEL_BIT_MASK (uint8_t)(0x03 << BOARD_FPD_UB941_DSI_BYTES_PER_PIXEL_SHIFT_CNT)
360 
363 #define BOARD_FPD_UB941_BRIDGE_LANE_MODE_BIT_MASK (uint8_t)(0x03 << BOARD_FPD_UB941_BRIDGE_LANE_MODE_SHIFT_CNT)
364 
367 #define BOARD_FPD_UB941_FREQ_STBL_THR_BIT_MASK (uint8_t)(0x03 << BOARD_FPD_UB941_FREQ_STBL_THR_SHIFT_CNT)
368 
371 #define BOARD_FPD_UB941_FPD3_LINK_RDY_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_FPD3_LINK_RDY_SHIFT_CNT)
372 
373 #define BOARD_FPD_UB941_FPD3_TX_STS_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_FPD3_TX_STS_SHIFT_CNT)
374 
375 #define BOARD_FPD_UB941_DSI_CLK_DET_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DSI_CLK_DET_SHIFT_CNT)
376 
377 #define BOARD_FPD_UB941_NO_DSI_CLK_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_NO_DSI_CLK_SHIFT_CNT)
378 
379 #define BOARD_FPD_UB941_FREQ_STABLE_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_FREQ_STABLE_SHIFT_CNT)
380 
382 #define BOARD_FPD_UB941_PATTERN_GENERATOR_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_PATTERN_GENERATOR_SHIFT_CNT)
383 
384 #define BOARD_FPD_UB941_COLORS_BAR_PATTERN_SEL_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_COLORS_BAR_PATTERN_SEL_SHIFT_CNT)
385 
386 #define BOARD_FPD_UB941_PATTERN_SEL_BIT_MASK (uint8_t)(0x0F << BOARD_FPD_UB941_PATTERN_SEL_SHIFT_CNT)
387 
388 #define BOARD_FPD_UB941_AUTO_SCROLL_PATTERN_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_AUTO_SCROLL_PATTERN_SHIFT_CNT)
389 
390 #define BOARD_FPD_UB941_INVERTED_COLOR_PATTERN_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_INVERTED_COLOR_PATTERN_SHIFT_CNT)
391 
392 #define BOARD_FPD_UB941_PG_18B_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_PG_18B_SHIFT_CNT)
393 
394 #define BOARD_FPD_UB941_PG_EXTCLK_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_PG_EXTCLK_SHIFT_CNT)
395 
396 #define BOARD_FPD_UB941_PG_TSEL_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_PG_TSEL_SHIFT_CNT)
397 
398 
401 #define BOARD_FPD_UB941_DSI_CONTINUOUS_CLK_ENABLE (1U)
402 
404 #define BOARD_FPD_UB941_DSI_CONTINUOUS_CLK_DISABLE (0U)
405 
406 #define BOARD_FPD_UB941_CLK_LANE_PN_MAINTIAN (0U)
407 
408 #define BOARD_FPD_UB941_CLK_LANE_PN_SWAP (1U)
409 
410 #define BOARD_FPD_UB941_DATA_LANE_PN_MAINTIAN (0U)
411 
412 #define BOARD_FPD_UB941_DATA_LANE_PN_SWAP (1U)
413 
414 #define BOARD_FPD_UB941_LINK_DETECT (0U)
415 
416 #define BOARD_FPD_UB941_DES_ERROR (1U)
417 
418 #define BOARD_FPD_UB941_PCLK_DETECT (2U)
419 
420 #define BOARD_FPD_UB941_BIST_CRC_ERROR (3U)
421 
422 #define BOARD_FPD_UB941_LINK_LOST (4U)
423 
424 #define BOARD_FPD_UB941_DPHY_ERROR (5U)
425 
426 #define BOARD_FPD_UB941_DSI_ERROR (6U)
427 
428 #define BOARD_FPD_UB941_LANES_1 (0U)
429 
430 #define BOARD_FPD_UB941_LANES_2 (1U)
431 
432 #define BOARD_FPD_UB941_LANES_3 (2U)
433 
434 #define BOARD_FPD_UB941_LANES_4 (3U)
435 
436 #define BOARD_FPD_UB941_PORT0_SEL (1U)
437 
438 #define BOARD_FPD_UB941_PORT1_SEL (2U)
439 
440 #define BOARD_FPD_UB941_PORT1_I2C_EN (4U)
441 
442 #define BOARD_FPD_UB941_DSI_PORT_INDIRECT_ACCESS (0U)
443 
444 #define BOARD_FPD_UB941_PATTERN_GEN_INDIRECT_ACESS (1U)
445 
446 #define BOARD_FPD_UB941_DSI_PORT0_REG (1U)
447 
448 #define BOARD_FPD_UB941_DSI_PORT1_REG (2U)
449 
450 #define BOARD_FPD_UB941_RESEVED (3U)
451 
452 #define BOARD_FPD_UB941_DSI_ANALOG_PLL_CNTRL_REG (4U)
453 
454 #define BOARD_FPD_UB941_FPD_LINK_III_PORT0_REG (5U)
455 
456 #define BOARD_FPD_UB941_FPD_LINK_III_PORT1_REG (6U)
457 
458 #define BOARD_FPD_UB941_FPD_LINK_III_PORT0_PORT1_REG (7U)
459 
460 #define BOARD_FPD_UB941_READ_ACCESS (0U)
461 
462 #define BOARD_FPD_UB941_WRITE_ACCESS (1U)
463 
464 #define BOARD_FPD_UB941_DSI_REF_CLK_MODE (0U)
465 
466 #define BOARD_FPD_UB941_EXT_REF_CLK_MODE (1U)
467 
468 #define BOARD_FPD_UB941_INT_REF_CLK_MODE (2U)
469 
470 #define BOARD_FPD_UB941_EXT_REF_CLK_MODE_2_2 (3U)
471 
472 #define BOARD_FPD_UB941_FREQ_STBL_40 (0U)
473 
474 #define BOARD_FPD_UB941_FREQ_STBL_80 (1U)
475 
476 #define BOARD_FPD_UB941_FREQ_STBL_320 (2U)
477 
478 #define BOARD_FPD_UB941_FREQ_STBL_1280 (3U)
479 
480 #define BOARD_FPD_UB941_READY_STS_UNSUCCESSFUL (0U)
481 
482 #define BOARD_FPD_UB941_READY_STS_SUCCESSFUL (1U)
483 
484 #define BOARD_FPD_UB941_TX_STS_UNSUCCESFUL (0U)
485 
486 #define BOARD_FPD_UB941_TX_STS_SUCCESSFUL (1U)
487 
488 #define BOARD_FPD_UB941_DSI_CLK_DET_STS_UNSUCCESFUL (0U)
489 
490 #define BOARD_FPD_UB941_DSI_CLK_DET_STS_SUCCESSFUL (1U)
491 
492 #define BOARD_FPD_UB941_NO_DSI_CLK_DETECTED (0U)
493 
494 #define BOARD_FPD_UB941_DSI_CLK_DETECTED (1U)
495 
496 #define BOARD_FPD_UB941_DSI_FREQ_UNSTABLE (0U)
497 
498 #define BOARD_FPD_UB941_DSI_FREQ_STABLE (1U)
499 
500 #define BOARD_FPD_UB941_MODE_SEL_24 (0U)
501 
502 #define BOARD_FPD_UB941_MODE_SEL_18 (1U)
503 
504 #define BOARD_FPD_UB941_INT_CLK_SRC (0U)
505 
506 #define BOARD_FPD_UB941_EXT_CLK_SRC (1U)
507 
508 #define BOARD_FPD_UB941_EXT_VIDEO_TIMING (0U)
509 
510 #define BOARD_FPD_UB941_OWN_VIDEO_TIMING (1U)
511 
512 #define BOARD_FPD_UB941_Indirect_Register_Read_ENABLE (1U)
513 
514 #define BOARD_FPD_UB941_INDIRECT_REG_RD_DISABLE (0U)
515 
517 #define BOARD_FPD_UB941_PATTERN_CHECKERBOARD (0U)
518 
519 #define BOARD_FPD_UB941_PATTERN_WHITE_BLACK (1U)
520 
521 #define BOARD_FPD_UB941_PATTERN_BLACK_WHITE (2U)
522 
523 #define BOARD_FPD_UB941_PATTERN_RED_CYAN (3U)
524 
525 #define BOARD_FPD_UB941_PATTERN_GREEN_MAGNETA (4U)
526 
527 #define BOARD_FPD_UB941_PATTERN_BLUE_YELLOW (5U)
528 
529 #define BOARD_FPD_UB941_PATTERN_HORIZONTALLY_SCALE_BLK2WHT_WHT2BLK (6U)
530 
531 #define BOARD_FPD_UB941_PATTERN_HORIZONTALLY_SCALE_BLK2RED_WHT2CYN (7U)
532 
533 #define BOARD_FPD_UB941_PATTERN_HORIZONTALLY_SCALE_BLK2GRN_WHT2MAG (8U)
534 
535 #define BOARD_FPD_UB941_PATTERN_HORIZONTALLY_SCALE_BLK2BLU_WHT2YEL (9U)
536 
537 #define BOARD_FPD_UB941_PATTERN_VERTICALLY_SCALE_BLK2WHT_WHT2BLK (10U)
538 
539 #define BOARD_FPD_UB941_PATTERN_VERTICALLY_SCALE_BLK2RED_WHT2CYN (11U)
540 
541 #define BOARD_FPD_UB941_PATTERN_VERTICALLY_SCALE_BLK2GRN_WHT2MAG (12U)
542 
543 #define BOARD_FPD_UB941_PATTERN_VERTICALLY_SCALE_BLK2BLU_WHT2YEL (13U)
544 
545 #define BOARD_FPD_UB941_PATTERN_CUSTOM_COLORS (14U)
546 
547 #define BOARD_FPD_UB941_PATTERN_VCOM (15U)
548 
550 #define BOARD_FPD_UB941_IND_ACC_CTL_READ_WRITE_BIT_MASK (1U)
551 
552 #define BOARD_FPD_UB941_FPD3_TX_MODE_BIT_MASK (7U)
553 
554 #define BOARD_FPD_UB941_AUTO_DETECT_FPD3_MODE (0U)
555 
556 #define BOARD_FPD_UB941_FORCED_SINGLE_FPD3_TRANSMITTER_MODE (1U)
557 
558 #define BOARD_FPD_UB941_FORCED_DUAL_FPD3_TRANSMITTER_MODE (3U)
559 
560 #define BOARD_FPD_UB941_AUTO_DETECT_FPD3_SINGLE_MODE (4U)
561 
562 #define BOARD_FPD_UB941_FORCED_INDEPENDENT_2_2_MODE (5U)
563 
564 #define BOARD_FPD_UB941_FORCED_SPLITTER_MODE (7U)
565 
566 #define BOARD_FPD_UB941_DSI_CONTINUOUS_CLK_SHIFT_CNT (7U)
567 
568 #define BOARD_FPD_UB941_DSI_CONTINUOUS_CLK_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DSI_CONTINUOUS_CLK_SHIFT_CNT)
569 
570 #define BOARD_FPD_UB941_DIGITAL_RESET_BIT_MASK (uint8_t)(0x01 << BOARD_FPD_UB941_DIGITAL_RESET_SHIFT_CNT)
571 
572 #define BOARD_FPD_UB941_DIGITAL_RESET_SHIFT_CNT (1U)
573 
574 #define BOARD_FPD_UB941_I2C_ACCESS_PORT_MASK (7U)
575 
576 /* @} */
577 
603 Board_STATUS Board_fpdUb941SetResetModeCtrl(void *handle,
604  Board_FpdModuleObj *fpdModParams,
605  uint8_t cfgMode);
606 
620 Board_STATUS Board_fpdUb941SetDigtialRst1ModeCtrl(void *handle,
621  Board_FpdModuleObj *fpdModParams,
622  uint8_t cfgMode);
623 
637 Board_STATUS Board_fpdUb941SetDigtialRst0ModeCtrl(void *handle,
638  Board_FpdModuleObj *fpdModParams,
639  uint8_t cfgMode);
640 
659 Board_STATUS Board_fpdUb941SetDsi1ClkPinOrd(void *handle,
660  Board_FpdModuleObj *fpdModParams,
661  uint8_t operMode);
662 
681 Board_STATUS Board_fpdUb941SelDsi1DataPinOrd(void *handle,
682  Board_FpdModuleObj *fpdModParams,
683  uint8_t operMode);
684 
703 Board_STATUS Board_fpdUb941SelDsi0ClkPinOrd(void *handle,
704  Board_FpdModuleObj *fpdModParams,
705  uint8_t operMode);
706 
725 Board_STATUS Board_fpdUb941SelDsi0DataPinOrd(void *handle,
726  Board_FpdModuleObj *fpdModParams,
727  uint8_t operMode);
728 
743 Board_STATUS Board_fpdUb941DevIdCfg(void *handle,
744  Board_FpdModuleObj *fpdModParams,
745  uint8_t serSlvAddr);
746 
759 Board_STATUS Board_fpdUb941GetDsiGenSts(void *handle,
760  Board_FpdModuleObj *fpdModParams,
761  uint8_t *errStatus);
762 
775 Board_STATUS Board_fpdUb941SetI2CPassAllModeCtrl(void *handle,
776  Board_FpdModuleObj *fpdModParams,
777  uint8_t cfgMode);
778 
796 Board_STATUS Board_fpdUb941SelI2CAccessPort(void *handle,
797  Board_FpdModuleObj *fpdModParams,
798  uint8_t portSel);
799 
830 Board_STATUS Board_fpdUb941IndirRegAccBlkSel(void *handle,
831  Board_FpdModuleObj *fpdModParams,
832  uint8_t regBlk);
833 
848 Board_STATUS Board_fpdUb941InDirRegAccModeSel(void *handle,
849  Board_FpdModuleObj *fpdModParams,
850  uint8_t accessMode);
851 
864 Board_STATUS Board_fpdUb941SetRxCRCCheckerEn(void *handle,
865  Board_FpdModuleObj *fpdModParams,
866  uint8_t cfgMode);
867 
880 Board_STATUS Board_fpdUb941SetFilterEn(void *handle,
881  Board_FpdModuleObj *fpdModParams,
882  uint8_t cfgMode);
895 Board_STATUS Board_fpdUb941SetI2CPassThrModeCfg(void *handle,
896  Board_FpdModuleObj *fpdModParams,
897  uint8_t cfgMode);
898 
911 Board_STATUS Board_fpdUb941SetPCLKAutoEnModeCfg(void *handle,
912  Board_FpdModuleObj *fpdModParams,
913  uint8_t cfgMode);
914 
933 Board_STATUS Board_fpdUb941DsiIndirRegWr(void *handle,
934  Board_FpdModuleObj *fpdModParams,
935  uint8_t regBlkType,
936  uint8_t cfgRegAddr,
937  uint8_t cfgRegData);
938 
951 Board_STATUS Board_fpdUb941SetPixelBytes(void *handle,
952  Board_FpdModuleObj *fpdModParams,
953  uint8_t bytesPerPixel);
954 
967 Board_STATUS Board_fpdUb941SetBridgeClkModeCtrl(void *handle,
968  Board_FpdModuleObj *fpdModParams,
969  uint8_t clkMode);
970 
987 Board_STATUS Board_fpdUb941SetFreqStblThr(void *handle,
988  Board_FpdModuleObj *fpdModParams,
989  uint8_t freqStblThr);
990 
1005 Board_STATUS Board_fpdUb941GetFpd3LinkRdySts(void *handle,
1006  Board_FpdModuleObj *fpdModParams,
1007  bool *stsFlag);
1008 
1023 Board_STATUS Board_fpdUb941GetFpd3LinkTxSts(void *handle,
1024  Board_FpdModuleObj *fpdModParams,
1025  bool *stsFlag);
1026 
1041 Board_STATUS Board_fpdUb941GetDsiClkDetSts(void *handle,
1042  Board_FpdModuleObj *fpdModParams,
1043  bool *stsFlag);
1044 
1060 Board_STATUS Board_fpdUb941GetSelPortDsiClkDetSts(void *handle,
1061  Board_FpdModuleObj *fpdModParams,
1062  bool *stsFlag);
1063 
1078 Board_STATUS Board_fpdUb941GetFreqStabilitySts(void *handle,
1079  Board_FpdModuleObj *fpdModParams,
1080  bool *stsFlag);
1081 
1082 
1097 Board_STATUS Board_fpdUb941SelPGClkSrc(void *handle,
1098  Board_FpdModuleObj *fpdModParams,
1099  uint8_t clkSrc);
1100 
1115 Board_STATUS Board_fpdUb941SelPGMode(void *handle,
1116  Board_FpdModuleObj *fpdModParams,
1117  uint8_t modeSel);
1118 
1135 Board_STATUS Board_fpdUb941SetPGTModeCtrl(void *handle,
1136  Board_FpdModuleObj *fpdModParams,
1137  uint8_t pgTSel);
1150 Board_STATUS Board_fpdUb941SetIndirRegRdEn(void *handle,
1151  Board_FpdModuleObj *fpdModParams,
1152  uint8_t cfgMode);
1153 
1171 Board_STATUS Board_fpdUb941Tx_Mode(void *handle,
1172  Board_FpdModuleObj *fpdModParams,
1173  uint8_t operMode);
1174 
1187 Board_STATUS Board_fpdUb941SetSerClkModeCtrl(void *handle,
1188  Board_FpdModuleObj *fpdModParams,
1189  uint8_t cfgMode);
1190 
1206 Board_STATUS Board_fpdUb941SetDsiLaneModeCtrl(void *handle,
1207  Board_FpdModuleObj *fpdModParams,
1208  uint8_t laneMode);
1209 
1222 Board_STATUS Board_fpdUb941SetDigitalRst1ModeCtrl(void *handle,
1223  Board_FpdModuleObj *fpdModParams,
1224  uint8_t cfgMode);
1225 
1241 Board_STATUS Board_fpdUb941SetI2CBusFreq(void *handle,
1242  Board_FpdModuleObj *fpdModParams,
1243  uint8_t cfgBitRate);
1244 
1257 Board_STATUS Board_fpdUb941RmtDesAliasCfg(void *handle,
1258  Board_FpdModuleObj *fpdModParams,
1259  Board_FpdRmtDevObj *fpdRmtParams);
1260 
1273 Board_STATUS Board_fpdUb941SetInvtdClrPattEn(void *handle,
1274  Board_FpdModuleObj *fpdModParams,
1275  uint8_t cfgMode);
1276 
1289 Board_STATUS Board_fpdUb941SetAutoScrollPattEn(void *handle,
1290  Board_FpdModuleObj *fpdModParams,
1291  uint8_t cfgMode);
1292 
1305 Board_STATUS Board_fpdUb941ColorBarEn(void *handle,
1306  Board_FpdModuleObj *fpdModParams,
1307  uint8_t cfgMode);
1308 
1336 Board_STATUS Board_fpdUb941SelPatt(void *handle,
1337  Board_FpdModuleObj *fpdModParams,
1338  uint8_t patternSel);
1339 
1352 Board_STATUS Board_fpdUb941PattGenEn(void *handle,
1353  Board_FpdModuleObj *fpdModParams,
1354  uint8_t cfgMode);
1355 
1368 void Board_fpdUb941GetI2CAddr(uint8_t *domain,
1369  uint8_t *chNum,
1370  uint8_t *i2cAddr);
1371 
1372 #ifdef __cplusplus
1373 }
1374 #endif /* __cplusplus */
1375 
1376 #endif /* _DS90UB941 */
1377 
1378 /* @} */
Board_STATUS Board_fpdUb941SetIndirRegRdEn(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
configure indirect register read enable mode
Board_STATUS Board_fpdUb941SetFreqStblThr(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t freqStblThr)
Set frequency stability threshold.
Board_STATUS Board_fpdUb941SetDigtialRst1ModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
Digital reset1 mode control.
Board_STATUS Board_fpdUb941SetI2CPassAllModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
I2C pass all mode control.
Board_STATUS Board_fpdUb941SelPGClkSrc(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t clkSrc)
Select pattern generator clock source.
Board_STATUS Board_fpdUb941SetDsi1ClkPinOrd(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t operMode)
DSI1 clock lane pin order select.
void Board_fpdUb941GetI2CAddr(uint8_t *domain, uint8_t *chNum, uint8_t *i2cAddr)
Get ub941 i2c address.
Board_STATUS Board_fpdUb941SetI2CBusFreq(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgBitRate)
I2C bus frequency set.
Board_STATUS Board_fpdUb941SetDigtialRst0ModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
Digital reset0 mode control.
Board_STATUS Board_fpdUb941SelDsi0DataPinOrd(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t operMode)
DSI0 data lane pin order select.
Board_STATUS Board_fpdUb941SetInvtdClrPattEn(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
Inverted color pattern select.
Board_STATUS Board_fpdUb941GetDsiGenSts(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t *errStatus)
Get DSI general error status.
Board_STATUS Board_fpdUb941GetFreqStabilitySts(void *handle, Board_FpdModuleObj *fpdModParams, bool *stsFlag)
Get frequency stability status.
Board_STATUS Board_fpdUb941IndirRegAccBlkSel(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t regBlk)
Indirect register acces block select.
Board_STATUS Board_fpdUb941GetDsiClkDetSts(void *handle, Board_FpdModuleObj *fpdModParams, bool *stsFlag)
Get DSI clock detect status.
Board_STATUS Board_fpdUb941SelPGMode(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t modeSel)
Select pattern generator mode.
Board_STATUS Board_fpdUb941SetFilterEn(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
Set filter enable.
FPD module object structure.
Definition: common.h:152
Board_STATUS Board_fpdUb941SetPCLKAutoEnModeCfg(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
configure PCLK auto enable mode
Board_STATUS Board_fpdUb941SetAutoScrollPattEn(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
configure auto scroll for pattern
Board_STATUS Board_fpdUb941InDirRegAccModeSel(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t accessMode)
Indirect register access mode select.
Board_STATUS Board_fpdUb941SetBridgeClkModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t clkMode)
Set FPD bridge clock mode.
Board_STATUS Board_fpdUb941SetPixelBytes(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t bytesPerPixel)
Set DSI bytes per pixel.
Board_STATUS Board_fpdUb941SelI2CAccessPort(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t portSel)
Select I2C Access port.
Board_STATUS Board_fpdUb941SelDsi1DataPinOrd(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t operMode)
DSI1 data lane pin order select.
Board_STATUS Board_fpdUb941DsiIndirRegWr(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t regBlkType, uint8_t cfgRegAddr, uint8_t cfgRegData)
DSI indirect register write.
Board_STATUS Board_fpdUb941RmtDesAliasCfg(void *handle, Board_FpdModuleObj *fpdModParams, Board_FpdRmtDevObj *fpdRmtParams)
Remote deserializer slave device id config.
Board_STATUS Board_fpdUb941SelDsi0ClkPinOrd(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t operMode)
DSI0 clock lane pin order select.
Board_STATUS Board_fpdUb941Tx_Mode(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t operMode)
configure transmit mode
Board_STATUS Board_fpdUb941SetSerClkModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
configure serializer clock mode control mode
Board_STATUS Board_fpdUb941SetDigitalRst1ModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
Digital Reset mode control.
domgrp_t domain
Definition: tisci_pm_core.h:130
Board_STATUS Board_fpdUb941GetFpd3LinkTxSts(void *handle, Board_FpdModuleObj *fpdModParams, bool *stsFlag)
Get FPD Link-III transmit status.
Board_STATUS Board_fpdUb941SetRxCRCCheckerEn(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
Receive CRC checker enable.
The macro definitions and function prototypes which are common across different board devices.
Board_STATUS Board_fpdUb941DevIdCfg(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t serSlvAddr)
Set deserializer device Id.
Board_STATUS Board_fpdUb941ColorBarEn(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
configure color bars
FPD remote device object structure.
Definition: common.h:141
Board_STATUS Board_fpdUb941SelPatt(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t patternSel)
configure color bars
Board_STATUS Board_fpdUb941SetResetModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
DSI Reset mode control.
Board_STATUS Board_fpdUb941GetFpd3LinkRdySts(void *handle, Board_FpdModuleObj *fpdModParams, bool *stsFlag)
Get FPD Link-III link ready status.
Board_STATUS Board_fpdUb941GetSelPortDsiClkDetSts(void *handle, Board_FpdModuleObj *fpdModParams, bool *stsFlag)
Get selected port DSI clock detect status.
Board_STATUS Board_fpdUb941SetDsiLaneModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t laneMode)
configure clock lane mode control mode
Board_STATUS Board_fpdUb941SetPGTModeCtrl(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t pgTSel)
Pattern generator timing mode control.
Board_STATUS Board_fpdUb941PattGenEn(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
configure pattern display
Board_STATUS Board_fpdUb941SetI2CPassThrModeCfg(void *handle, Board_FpdModuleObj *fpdModParams, uint8_t cfgMode)
configure I2C pass through mode