@@ -66,9 +66,11 @@
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#include <app_cfg.h>
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#define DDR_HEAP_MEM_SIZE (DDR_MCU1_0_LOCAL_HEAP_SIZE)
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+
#define ENABLE_SCISERVER
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#undef ENABLE_UDMA
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#undef ENABLE_UDMA_COPY
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#undef ENABLE_TIOVX
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#undef ENABLE_SCICLIENT
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#endif /* APP_CFG_MCU1_0_H_ */
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@@ -88,6 +88,7 @@
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#include <utils/dss/include/app_dss_defaults.h>
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#include <utils/perf_stats/include/app_perf_stats.h>
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#include <utils/sciclient/include/app_sciclient.h>
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+
#include <utils/sciserver/include/app_sciserver.h>
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#include <utils/sensors/include/app_sensors.h>
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#include <utils/pcie/include/app_pcie_queue.h>
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#include <utils/ethfw/include/app_ethfw.h>
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@@ -31,7 +31,6 @@ STATIC_LIBS += app_utils_console_io
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STATIC_LIBS += app_utils_ipc
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STATIC_LIBS += app_utils_remote_service
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STATIC_LIBS += app_utils_udma
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-
STATIC_LIBS += app_utils_sciclient
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STATIC_LIBS += app_utils_misc
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STATIC_LIBS += app_utils_sensors
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STATIC_LIBS += app_utils_perf_stats
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@@ -80,7 +79,6 @@ ADDITIONAL_STATIC_LIBS += ti.drv.uart.aer5f
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ADDITIONAL_STATIC_LIBS += ipc.aer5f
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ADDITIONAL_STATIC_LIBS += fvid2.aer5f
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ADDITIONAL_STATIC_LIBS += udma.aer5f
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-
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
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ADDITIONAL_STATIC_LIBS += ti.drv.i2c.aer5f
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endif
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@@ -5,10 +5,16 @@ ifeq ($(TARGET_CPU),R5F)
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include $(PRELUDE)
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DEFS+=CPU_mcu1_0
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DEFS+=BUILD_MCU1_0
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DEFS+=BUILD_MCU
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# This enables ARM Thumb mode which reduces firmware size and enables faster boot
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COPT +=--code_state=16
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TARGET := vx_app_tirtos_linux_mcu1_0
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TARGETTYPE := exe
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CSOURCES := $(call all-c-files)
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ASSEMBLY := mcuCopyVecs2Exc.asm
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XDC_BLD_FILE = $($(_MODULE)_SDIR)/../../bios_cfg/config_r5f.bld
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XDC_IDIRS = $($(_MODULE)_SDIR)/../../bios_cfg/
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@@ -31,6 +37,11 @@ include $($(_MODULE)_SDIR)/../../concerto_r5f_inc.mak
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# CPU instance specific libraries
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STATIC_LIBS += app_tirtos_common_mcu1_0
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STATIC_LIBS += app_tirtos_linux
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STATIC_LIBS += app_utils_sciserver
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+
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ADDITIONAL_STATIC_LIBS += sciclient_direct.aer5f
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ADDITIONAL_STATIC_LIBS += sciserver_tirtos.aer5f
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+
ADDITIONAL_STATIC_LIBS += rm_pm_hal.aer5f
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include $(FINALE)
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@@ -1,4 +1,7 @@
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/* linker options */
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--retain="*(.bootCode)"
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--retain="*(.startupCode)"
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--retain="*(.startupData)"
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--fill_value=0
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--stack_size=0x2000
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--heap_size=0x1000
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@@ -6,31 +9,54 @@
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#define ATCM_START 0x00000000
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-e __VECS_ENTRY_POINT
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--retain="*(.mcuCopyVecsToExc)"
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SECTIONS
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{
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.vecs : {
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*(.vecs)
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} palign(8) > R5F_TCMB0_VECS
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.vecs : {
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__VECS_ENTRY_POINT = .;
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-
} palign(8) >
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+
} palign(8) > R5F_TCMB0_VECS
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xdc.meta (COPY): { *(xdc.meta) } > R5F_TCMB0
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.init_text : {
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boot.*(.text)
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*(.text:ti_sysbios_family_arm_MPU_*)
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*(.text:ti_sysbios_family_arm_v7r_Cache_*)
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} > R5F_TCMB0
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.text:xdc_runtime_Startup_reset__I : {} palign(8) > R5F_TCMB0
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-
.
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-
.
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-
.
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-
.
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-
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-
.
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-
.
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-
.
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.bootCode : {} palign(8) > R5F_TCMB0
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.startupCode : {} palign(8) > R5F_TCMB0
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.startupData : {} palign(8) > R5F_TCMB0, type = NOINIT
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.mcuCopyVecsToExc : {} palign(8) > R5F_TCMB0
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+
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.text : {} palign(8) > DDR_MCU1_0
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.const : {} palign(8) > DDR_MCU1_0
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.cinit : {} palign(8) > DDR_MCU1_0
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.pinit : {} palign(8) > DDR_MCU1_0
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.bss : {} align(4) > DDR_MCU1_0
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.far : {} align(8) > DDR_MCU1_0
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.data : {} palign(128) > DDR_MCU1_0
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.sysmem : {} align(8) > DDR_MCU1_0
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.stack : {} align(4) > DDR_MCU1_0
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.data_buffer : {} palign(128) > DDR_MCU1_0
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.boardcfg_data : {} palign(8) > DDR_MCU1_0
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.resource_table : {
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__RESOURCE_TABLE = .;
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} > DDR_MCU1_0_RESOURCE_TABLE
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.const.devgroup.MCU_WAKEUP : {} align(4) > DDR_MCU1_0
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.const.devgroup.MAIN : {} align(4) > DDR_MCU1_0
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.const.devgroup.DMSC_INTERNAL : {} align(4) > DDR_MCU1_0
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.bss.devgroup.MAIN : {} palign(4) > DDR_MCU1_0
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.bss.devgroup.MCU_WAKEUP : {} palign(4) > DDR_MCU1_0
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.bss.devgroup.DMSC_INTERNAL : {} palign(4) > DDR_MCU1_0
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.bss.devgroup* : {} align(4) > DDR_MCU1_0
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.const.devgroup* : {} align(4) > DDR_MCU1_0
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+
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+
.bss:taskStackSection : {} > DDR_MCU1_0
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.bss:ddr_shared_mem (NOLOAD) : {} > DDR_MCU1_0_LOCAL_HEAP
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35
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.bss:app_log_mem (NOLOAD) : {} > APP_LOG_MEM
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.bss:tiovx_obj_desc_mem (NOLOAD) : {} > TIOVX_OBJ_DESC_MEM
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@@ -69,7 +69,9 @@ MEMORY
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/* R5F_TCMA [ size 32.00 KB ] */
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R5F_TCMA ( X ) : ORIGIN = 0x00000000 , LENGTH = 0x00008000
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/* R5F_TCMB0 [ size 32.00 KB ] */
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-
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+
R5F_TCMB0_VECS ( RWIX ) : ORIGIN = 0x41010000 , LENGTH = 0x00000100
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+
/* R5F_TCMB0 [ size 32.00 KB ] */
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+
R5F_TCMB0 ( RWIX ) : ORIGIN = 0x41010100 , LENGTH = 0x00007F00
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75
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/* DDR for MCU1_0 for Linux IPC [ size 1024.00 KB ] */
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DDR_MCU1_0_IPC ( RWIX ) : ORIGIN = 0xA0000000 , LENGTH = 0x00100000
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/* DDR for MCU1_0 for Linux resource table [ size 1024 B ] */
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@@ -62,6 +62,7 @@
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#include <app.h>
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#include <utils/console_io/include/app_log.h>
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+
#include <utils/sciserver/include/app_sciserver.h>
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#include <stdio.h>
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#include <string.h>
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#include <xdc/runtime/Error.h>
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@@ -105,12 +106,16 @@ int main(void)
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/* This is for debug purpose - see the description of function header */
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StartupEmulatorWaitFxn();
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+
appSciserverInit();
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+
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Error_init(&eb);
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Task_Params_init(&tskParams);
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tskParams.arg0 = (UArg) NULL;
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tskParams.arg1 = (UArg) NULL;
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-
|
116
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+
/* Setting this task priority to 3 and make Sciserver
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+
priority lo as 3+1 and high as 3+2 */
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+
tskParams.priority = 3u;
|
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tskParams.stack = gTskStackMain;
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tskParams.stackSize = sizeof (gTskStackMain);
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task = Task_create(appMain, &tskParams, &eb);
|
@@ -78,6 +78,9 @@ Timer.checkFrequency = false;
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78
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var Clock = xdc.useModule('ti.sysbios.knl.Clock');
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79
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Clock.timerId = 1;
|
80
80
|
|
81
|
+
var Reset = xdc.useModule("xdc.runtime.Reset");
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+
Reset.fxns[Reset.fxns.length++] = "&mcuCopyVecs2Exc";
|
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+
|
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/*
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* Initialize MPU and enable it
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*
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@@ -0,0 +1,59 @@
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1
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+
;
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; Copyright (c) 2020, Texas Instruments Incorporated
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; All rights reserved.
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4
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+
;
|
5
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+
; Redistribution and use in source and binary forms, with or without
|
6
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+
; modification, are permitted provided that the following conditions
|
7
|
+
; are met:
|
8
|
+
;
|
9
|
+
; * Redistributions of source code must retain the above copyright
|
10
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+
; notice, this list of conditions and the following disclaimer.
|
11
|
+
;
|
12
|
+
; * Redistributions in binary form must reproduce the above copyright
|
13
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+
; notice, this list of conditions and the following disclaimer in the
|
14
|
+
; documentation and/or other materials provided with the distribution.
|
15
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+
;
|
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+
; * Neither the name of Texas Instruments Incorporated nor the names of
|
17
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+
; its contributors may be used to endorse or promote products derived
|
18
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+
; from this software without specific prior written permission.
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+
;
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+
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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+
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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+
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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+
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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+
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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+
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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+
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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+
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
29
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+
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+
;
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32
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+
;
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33
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+
; ======== mcuCopyVecs2Exc.asm ========
|
34
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+
; Copies sysbios defined vector to Exception Handler area
|
35
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+
;
|
36
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+
.text
|
37
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+
.sect ".mcuCopyVecsToExc"
|
38
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+
;==============================================================================
|
39
|
+
; void mcuCopyVecs2Exc( void )
|
40
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+
;==============================================================================
|
41
|
+
.global ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
|
42
|
+
|
43
|
+
.global mcuCopyVecs2Exc
|
44
|
+
mcuCopyVecs2Exc:
|
45
|
+
.asmfunc
|
46
|
+
movw r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
|
47
|
+
movt r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
|
48
|
+
mov r1, #0 ; Exeception Handler address
|
49
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+
mov r2, #64 ; 64 bytes
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50
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+
loop:
|
51
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+
ldr r3, [r0], #4
|
52
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+
str r3, [r1], #4
|
53
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+
subs r2, r2, #4
|
54
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+
bgt loop
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55
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+
exit:
|
56
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+
bx lr
|
57
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+
.endasmfunc
|
58
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+
|
59
|
+
.end
|
@@ -48,7 +48,7 @@ STATIC_LIBS += app_utils_hwa
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|
48
48
|
STATIC_LIBS += app_utils_dss
|
49
49
|
STATIC_LIBS += app_utils_pcie_queue
|
50
50
|
STATIC_LIBS += vx_target_kernels_sample_r5f
|
51
|
-
|
51
|
+
STATIC_LIBS += app_utils_sciclient
|
52
52
|
STATIC_LIBS += app_utils_ethfw
|
53
53
|
|
54
54
|
ETHFW_LIBS = ethfw
|
@@ -75,6 +75,7 @@ ADDITIONAL_STATIC_LIBS += enet_example_utils.aer5f
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|
75
75
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ADDITIONAL_STATIC_LIBS += pm_lib.aer5f
|
76
76
|
ADDITIONAL_STATIC_LIBS += ti.timesync.hal.aer5f
|
77
77
|
ADDITIONAL_STATIC_LIBS += ti.timesync.ptp.aer5f
|
78
|
+
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
|
78
79
|
|
79
80
|
include $(FINALE)
|
80
81
|
|
@@ -35,12 +35,12 @@ STATIC_LIBS += app_tirtos_common_mcu2_1
|
|
35
35
|
STATIC_LIBS += app_tirtos_linux
|
36
36
|
|
37
37
|
STATIC_LIBS += app_utils_hwa
|
38
|
+
STATIC_LIBS += app_utils_sciclient
|
38
39
|
|
39
40
|
ADDITIONAL_STATIC_LIBS += csirx.aer5f
|
40
41
|
ADDITIONAL_STATIC_LIBS += csitx.aer5f
|
41
42
|
ADDITIONAL_STATIC_LIBS += vhwa.aer5f
|
42
|
-
|
43
|
-
|
43
|
+
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
|
44
44
|
|
45
45
|
include $(FINALE)
|
46
46
|
|
@@ -29,6 +29,9 @@ include $($(_MODULE)_SDIR)/../../concerto_r5f_inc.mak
|
|
29
29
|
# CPU instance specific libraries
|
30
30
|
STATIC_LIBS += app_tirtos_common_mcu3_0
|
31
31
|
STATIC_LIBS += app_tirtos_linux
|
32
|
+
STATIC_LIBS += app_utils_sciclient
|
33
|
+
|
34
|
+
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
|
32
35
|
|
33
36
|
include $(FINALE)
|
34
37
|
|
@@ -29,6 +29,9 @@ include $($(_MODULE)_SDIR)/../../concerto_r5f_inc.mak
|
|
29
29
|
# CPU instance specific libraries
|
30
30
|
STATIC_LIBS += app_tirtos_common_mcu3_1
|
31
31
|
STATIC_LIBS += app_tirtos_linux
|
32
|
+
STATIC_LIBS += app_utils_sciclient
|
33
|
+
|
34
|
+
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
|
32
35
|
|
33
36
|
include $(FINALE)
|
34
37
|
|
@@ -5,10 +5,16 @@ ifeq ($(TARGET_CPU),R5F)
|
|
5
5
|
include $(PRELUDE)
|
6
6
|
|
7
7
|
DEFS+=CPU_mcu1_0
|
8
|
+
DEFS+=BUILD_MCU1_0
|
9
|
+
DEFS+=BUILD_MCU
|
10
|
+
|
11
|
+
# This enables ARM Thumb mode which reduces firmware size and enables faster boot
|
12
|
+
COPT +=--code_state=16
|
8
13
|
|
9
14
|
TARGET := vx_app_tirtos_qnx_mcu1_0
|
10
15
|
TARGETTYPE := exe
|
11
16
|
CSOURCES := $(call all-c-files)
|
17
|
+
ASSEMBLY := mcuCopyVecs2Exc.asm
|
12
18
|
|
13
19
|
XDC_BLD_FILE = $($(_MODULE)_SDIR)/../../bios_cfg/config_r5f.bld
|
14
20
|
XDC_IDIRS = $($(_MODULE)_SDIR)/../../bios_cfg/
|
@@ -31,6 +37,11 @@ include $($(_MODULE)_SDIR)/../../concerto_r5f_inc.mak
|
|
31
37
|
# CPU instance specific libraries
|
32
38
|
STATIC_LIBS += app_tirtos_common_mcu1_0
|
33
39
|
STATIC_LIBS += app_tirtos_qnx
|
40
|
+
STATIC_LIBS += app_utils_sciserver
|
41
|
+
|
42
|
+
ADDITIONAL_STATIC_LIBS += sciclient_direct.aer5f
|
43
|
+
ADDITIONAL_STATIC_LIBS += sciserver_tirtos.aer5f
|
44
|
+
ADDITIONAL_STATIC_LIBS += rm_pm_hal.aer5f
|
34
45
|
|
35
46
|
include $(FINALE)
|
36
47
|
|
@@ -1,4 +1,7 @@
|
|
1
1
|
/* linker options */
|
2
|
+
--retain="*(.bootCode)"
|
3
|
+
--retain="*(.startupCode)"
|
4
|
+
--retain="*(.startupData)"
|
2
5
|
--fill_value=0
|
3
6
|
--stack_size=0x2000
|
4
7
|
--heap_size=0x1000
|
@@ -6,31 +9,54 @@
|
|
6
9
|
#define ATCM_START 0x00000000
|
7
10
|
|
8
11
|
-e __VECS_ENTRY_POINT
|
12
|
+
--retain="*(.mcuCopyVecsToExc)"
|
9
13
|
|
10
14
|
SECTIONS
|
11
15
|
{
|
16
|
+
.vecs : {
|
17
|
+
*(.vecs)
|
18
|
+
} palign(8) > R5F_TCMB0_VECS
|
12
19
|
.vecs : {
|
13
20
|
__VECS_ENTRY_POINT = .;
|
14
|
-
} palign(8) >
|
21
|
+
} palign(8) > R5F_TCMB0_VECS
|
22
|
+
xdc.meta (COPY): { *(xdc.meta) } > R5F_TCMB0
|
15
23
|
.init_text : {
|
16
24
|
boot.*(.text)
|
17
25
|
*(.text:ti_sysbios_family_arm_MPU_*)
|
18
26
|
*(.text:ti_sysbios_family_arm_v7r_Cache_*)
|
19
27
|
} > R5F_TCMB0
|
20
28
|
.text:xdc_runtime_Startup_reset__I : {} palign(8) > R5F_TCMB0
|
21
|
-
.
|
22
|
-
.
|
23
|
-
.
|
24
|
-
.
|
25
|
-
|
26
|
-
.
|
27
|
-
.
|
28
|
-
.
|
29
|
+
.bootCode : {} palign(8) > R5F_TCMB0
|
30
|
+
.startupCode : {} palign(8) > R5F_TCMB0
|
31
|
+
.startupData : {} palign(8) > R5F_TCMB0, type = NOINIT
|
32
|
+
.mcuCopyVecsToExc : {} palign(8) > R5F_TCMB0
|
33
|
+
|
34
|
+
.text : {} palign(8) > DDR_MCU1_0
|
35
|
+
.const : {} palign(8) > DDR_MCU1_0
|
36
|
+
.cinit : {} palign(8) > DDR_MCU1_0
|
37
|
+
.pinit : {} palign(8) > DDR_MCU1_0
|
38
|
+
.bss : {} align(4) > DDR_MCU1_0
|
39
|
+
.far : {} align(8) > DDR_MCU1_0
|
40
|
+
.data : {} palign(128) > DDR_MCU1_0
|
41
|
+
.sysmem : {} align(8) > DDR_MCU1_0
|
42
|
+
.stack : {} align(4) > DDR_MCU1_0
|
43
|
+
.data_buffer : {} palign(128) > DDR_MCU1_0
|
44
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+
.boardcfg_data : {} palign(8) > DDR_MCU1_0
|
29
45
|
|
30
46
|
.resource_table : {
|
31
47
|
__RESOURCE_TABLE = .;
|
32
48
|
} > DDR_MCU1_0_RESOURCE_TABLE
|
33
49
|
|
50
|
+
.const.devgroup.MCU_WAKEUP : {} align(4) > DDR_MCU1_0
|
51
|
+
.const.devgroup.MAIN : {} align(4) > DDR_MCU1_0
|
52
|
+
.const.devgroup.DMSC_INTERNAL : {} align(4) > DDR_MCU1_0
|
53
|
+
.bss.devgroup.MAIN : {} palign(4) > DDR_MCU1_0
|
54
|
+
.bss.devgroup.MCU_WAKEUP : {} palign(4) > DDR_MCU1_0
|
55
|
+
.bss.devgroup.DMSC_INTERNAL : {} palign(4) > DDR_MCU1_0
|
56
|
+
.bss.devgroup* : {} align(4) > DDR_MCU1_0
|
57
|
+
.const.devgroup* : {} align(4) > DDR_MCU1_0
|
58
|
+
|
59
|
+
.bss:taskStackSection : {} > DDR_MCU1_0
|
34
60
|
.bss:ddr_shared_mem (NOLOAD) : {} > DDR_MCU1_0_LOCAL_HEAP
|
35
61
|
.bss:app_log_mem (NOLOAD) : {} > APP_LOG_MEM
|
36
62
|
.bss:tiovx_obj_desc_mem (NOLOAD) : {} > TIOVX_OBJ_DESC_MEM
|
@@ -69,7 +69,9 @@ MEMORY
|
|
69
69
|
/* R5F_TCMA [ size 32.00 KB ] */
|
70
70
|
R5F_TCMA ( X ) : ORIGIN = 0x00000000 , LENGTH = 0x00008000
|
71
71
|
/* R5F_TCMB0 [ size 32.00 KB ] */
|
72
|
-
|
72
|
+
R5F_TCMB0_VECS ( RWIX ) : ORIGIN = 0x41010000 , LENGTH = 0x00000100
|
73
|
+
/* R5F_TCMB0 [ size 32.00 KB ] */
|
74
|
+
R5F_TCMB0 ( RWIX ) : ORIGIN = 0x41010100 , LENGTH = 0x00007F00
|
73
75
|
/* DDR for MCU1_0 for Linux IPC [ size 1024.00 KB ] */
|
74
76
|
DDR_MCU1_0_IPC ( RWIX ) : ORIGIN = 0xA0000000 , LENGTH = 0x00100000
|
75
77
|
/* DDR for MCU1_0 for Linux resource table [ size 1024 B ] */
|
@@ -62,6 +62,7 @@
|
|
62
62
|
|
63
63
|
#include <app.h>
|
64
64
|
#include <utils/console_io/include/app_log.h>
|
65
|
+
#include <utils/sciserver/include/app_sciserver.h>
|
65
66
|
#include <stdio.h>
|
66
67
|
#include <string.h>
|
67
68
|
#include <xdc/runtime/Error.h>
|
@@ -105,12 +106,16 @@ int main(void)
|
|
105
106
|
/* This is for debug purpose - see the description of function header */
|
106
107
|
StartupEmulatorWaitFxn();
|
107
108
|
|
109
|
+
appSciserverInit();
|
110
|
+
|
108
111
|
Error_init(&eb);
|
109
112
|
Task_Params_init(&tskParams);
|
110
113
|
|
111
114
|
tskParams.arg0 = (UArg) NULL;
|
112
115
|
tskParams.arg1 = (UArg) NULL;
|
113
|
-
|
116
|
+
/* Setting this task priority to 3 and make Sciserver
|
117
|
+
priority lo as 3+1 and high as 3+2 */
|
118
|
+
tskParams.priority = 3u;
|
114
119
|
tskParams.stack = gTskStackMain;
|
115
120
|
tskParams.stackSize = sizeof (gTskStackMain);
|
116
121
|
task = Task_create(appMain, &tskParams, &eb);
|
@@ -78,6 +78,9 @@ Timer.checkFrequency = false;
|
|
78
78
|
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
|
79
79
|
Clock.timerId = 1;
|
80
80
|
|
81
|
+
var Reset = xdc.useModule("xdc.runtime.Reset");
|
82
|
+
Reset.fxns[Reset.fxns.length++] = "&mcuCopyVecs2Exc";
|
83
|
+
|
81
84
|
/*
|
82
85
|
* Initialize MPU and enable it
|
83
86
|
*
|
@@ -0,0 +1,59 @@
|
|
1
|
+
;
|
2
|
+
; Copyright (c) 2020, Texas Instruments Incorporated
|
3
|
+
; All rights reserved.
|
4
|
+
;
|
5
|
+
; Redistribution and use in source and binary forms, with or without
|
6
|
+
; modification, are permitted provided that the following conditions
|
7
|
+
; are met:
|
8
|
+
;
|
9
|
+
; * Redistributions of source code must retain the above copyright
|
10
|
+
; notice, this list of conditions and the following disclaimer.
|
11
|
+
;
|
12
|
+
; * Redistributions in binary form must reproduce the above copyright
|
13
|
+
; notice, this list of conditions and the following disclaimer in the
|
14
|
+
; documentation and/or other materials provided with the distribution.
|
15
|
+
;
|
16
|
+
; * Neither the name of Texas Instruments Incorporated nor the names of
|
17
|
+
; its contributors may be used to endorse or promote products derived
|
18
|
+
; from this software without specific prior written permission.
|
19
|
+
;
|
20
|
+
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
21
|
+
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
|
22
|
+
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
23
|
+
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
|
24
|
+
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
25
|
+
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
26
|
+
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
|
27
|
+
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
28
|
+
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
|
29
|
+
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
30
|
+
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
31
|
+
;
|
32
|
+
;
|
33
|
+
; ======== mcuCopyVecs2Exc.asm ========
|
34
|
+
; Copies sysbios defined vector to Exception Handler area
|
35
|
+
;
|
36
|
+
.text
|
37
|
+
.sect ".mcuCopyVecsToExc"
|
38
|
+
;==============================================================================
|
39
|
+
; void mcuCopyVecs2Exc( void )
|
40
|
+
;==============================================================================
|
41
|
+
.global ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
|
42
|
+
|
43
|
+
.global mcuCopyVecs2Exc
|
44
|
+
mcuCopyVecs2Exc:
|
45
|
+
.asmfunc
|
46
|
+
movw r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
|
47
|
+
movt r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
|
48
|
+
mov r1, #0 ; Exeception Handler address
|
49
|
+
mov r2, #64 ; 64 bytes
|
50
|
+
loop:
|
51
|
+
ldr r3, [r0], #4
|
52
|
+
str r3, [r1], #4
|
53
|
+
subs r2, r2, #4
|
54
|
+
bgt loop
|
55
|
+
exit:
|
56
|
+
bx lr
|
57
|
+
.endasmfunc
|
58
|
+
|
59
|
+
.end
|
@@ -48,7 +48,7 @@ STATIC_LIBS += app_utils_hwa
|
|
48
48
|
STATIC_LIBS += app_utils_dss
|
49
49
|
STATIC_LIBS += app_utils_pcie_queue
|
50
50
|
STATIC_LIBS += vx_target_kernels_sample_r5f
|
51
|
-
|
51
|
+
STATIC_LIBS += app_utils_sciclient
|
52
52
|
STATIC_LIBS += app_utils_ethfw
|
53
53
|
|
54
54
|
ETHFW_LIBS = ethfw
|
@@ -75,6 +75,7 @@ ADDITIONAL_STATIC_LIBS += enet_example_utils.aer5f
|
|
75
75
|
ADDITIONAL_STATIC_LIBS += pm_lib.aer5f
|
76
76
|
ADDITIONAL_STATIC_LIBS += ti.timesync.hal.aer5f
|
77
77
|
ADDITIONAL_STATIC_LIBS += ti.timesync.ptp.aer5f
|
78
|
+
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
|
78
79
|
|
79
80
|
include $(FINALE)
|
80
81
|
|
@@ -35,11 +35,12 @@ STATIC_LIBS += app_tirtos_common_mcu2_1
|
|
35
35
|
STATIC_LIBS += app_tirtos_qnx
|
36
36
|
|
37
37
|
STATIC_LIBS += app_utils_hwa
|
38
|
+
STATIC_LIBS += app_utils_sciclient
|
38
39
|
|
39
40
|
ADDITIONAL_STATIC_LIBS += csirx.aer5f
|
40
41
|
ADDITIONAL_STATIC_LIBS += csitx.aer5f
|
41
42
|
ADDITIONAL_STATIC_LIBS += vhwa.aer5f
|
42
|
-
|
43
|
+
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
|
43
44
|
|
44
45
|
include $(FINALE)
|
45
46
|
|
@@ -29,6 +29,9 @@ include $($(_MODULE)_SDIR)/../../concerto_r5f_inc.mak
|
|
29
29
|
# CPU instance specific libraries
|
30
30
|
STATIC_LIBS += app_tirtos_common_mcu3_0
|
31
31
|
STATIC_LIBS += app_tirtos_qnx
|
32
|
+
STATIC_LIBS += app_utils_sciclient
|
33
|
+
|
34
|
+
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
|
32
35
|
|
33
36
|
include $(FINALE)
|
34
37
|
|
@@ -29,6 +29,9 @@ include $($(_MODULE)_SDIR)/../../concerto_r5f_inc.mak
|
|
29
29
|
# CPU instance specific libraries
|
30
30
|
STATIC_LIBS += app_tirtos_common_mcu3_1
|
31
31
|
STATIC_LIBS += app_tirtos_qnx
|
32
|
+
STATIC_LIBS += app_utils_sciclient
|
33
|
+
|
34
|
+
ADDITIONAL_STATIC_LIBS += sciclient.aer5f
|
32
35
|
|
33
36
|
include $(FINALE)
|
34
37
|
|
@@ -0,0 +1,90 @@
|
|
1
|
+
/*
|
2
|
+
*
|
3
|
+
* Copyright (c) 2018 Texas Instruments Incorporated
|
4
|
+
*
|
5
|
+
* All rights reserved not granted herein.
|
6
|
+
*
|
7
|
+
* Limited License.
|
8
|
+
*
|
9
|
+
* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
|
10
|
+
* license under copyrights and patents it now or hereafter owns or controls to make,
|
11
|
+
* have made, use, import, offer to sell and sell ("Utilize") this software subject to the
|
12
|
+
* terms herein. With respect to the foregoing patent license, such license is granted
|
13
|
+
* solely to the extent that any such patent is necessary to Utilize the software alone.
|
14
|
+
* The patent license shall not apply to any combinations which include this software,
|
15
|
+
* other than combinations with devices manufactured by or for TI ("TI Devices").
|
16
|
+
* No hardware patent is licensed hereunder.
|
17
|
+
*
|
18
|
+
* Redistributions must preserve existing copyright notices and reproduce this license
|
19
|
+
* (including the above copyright notice and the disclaimer and (if applicable) source
|
20
|
+
* code license limitations below) in the documentation and/or other materials provided
|
21
|
+
* with the distribution
|
22
|
+
*
|
23
|
+
* Redistribution and use in binary form, without modification, are permitted provided
|
24
|
+
* that the following conditions are met:
|
25
|
+
*
|
26
|
+
* * No reverse engineering, decompilation, or disassembly of this software is
|
27
|
+
* permitted with respect to any software provided in binary form.
|
28
|
+
*
|
29
|
+
* * any redistribution and use are licensed by TI for use only with TI Devices.
|
30
|
+
*
|
31
|
+
* * Nothing shall obligate TI to provide you with source code for the software
|
32
|
+
* licensed and provided to you in object code.
|
33
|
+
*
|
34
|
+
* If software source code is provided to you, modification and redistribution of the
|
35
|
+
* source code are permitted provided that the following conditions are met:
|
36
|
+
*
|
37
|
+
* * any redistribution and use of the source code, including any resulting derivative
|
38
|
+
* works, are licensed by TI for use only with TI Devices.
|
39
|
+
*
|
40
|
+
* * any redistribution and use of any object code compiled from the source code
|
41
|
+
* and any resulting derivative works, are licensed by TI for use only with TI Devices.
|
42
|
+
*
|
43
|
+
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
44
|
+
*
|
45
|
+
* may be used to endorse or promote products derived from this software without
|
46
|
+
* specific prior written permission.
|
47
|
+
*
|
48
|
+
* DISCLAIMER.
|
49
|
+
*
|
50
|
+
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
|
51
|
+
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
52
|
+
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
53
|
+
* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
54
|
+
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
55
|
+
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
56
|
+
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
|
57
|
+
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
|
58
|
+
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
59
|
+
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
60
|
+
*
|
61
|
+
*/
|
62
|
+
|
63
|
+
#ifndef APP_SCISERVER_H_
|
64
|
+
#define APP_SCISERVER_H_
|
65
|
+
|
66
|
+
/**
|
67
|
+
* \defgroup group_vision_apps_utils_server SCISERVER initialization APIs (TI-RTOS only)
|
68
|
+
*
|
69
|
+
* \brief This section contains APIs for SCISERVER initialization
|
70
|
+
*
|
71
|
+
* \ingroup group_vision_apps_utils
|
72
|
+
*
|
73
|
+
* @{
|
74
|
+
*/
|
75
|
+
|
76
|
+
#include <stdint.h>
|
77
|
+
|
78
|
+
/** \brief Sciserver init
|
79
|
+
*
|
80
|
+
*/
|
81
|
+
int32_t appSciserverInit();
|
82
|
+
|
83
|
+
/** \brief Sciserver de-init
|
84
|
+
*
|
85
|
+
*/
|
86
|
+
int32_t appSciserverDeInit();
|
87
|
+
|
88
|
+
/* @} */
|
89
|
+
|
90
|
+
#endif
|
@@ -0,0 +1,104 @@
|
|
1
|
+
/*
|
2
|
+
*
|
3
|
+
* Copyright (c) 2018 Texas Instruments Incorporated
|
4
|
+
*
|
5
|
+
* All rights reserved not granted herein.
|
6
|
+
*
|
7
|
+
* Limited License.
|
8
|
+
*
|
9
|
+
* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
|
10
|
+
* license under copyrights and patents it now or hereafter owns or controls to make,
|
11
|
+
* have made, use, import, offer to sell and sell ("Utilize") this software subject to the
|
12
|
+
* terms herein. With respect to the foregoing patent license, such license is granted
|
13
|
+
* solely to the extent that any such patent is necessary to Utilize the software alone.
|
14
|
+
* The patent license shall not apply to any combinations which include this software,
|
15
|
+
* other than combinations with devices manufactured by or for TI ("TI Devices").
|
16
|
+
* No hardware patent is licensed hereunder.
|
17
|
+
*
|
18
|
+
* Redistributions must preserve existing copyright notices and reproduce this license
|
19
|
+
* (including the above copyright notice and the disclaimer and (if applicable) source
|
20
|
+
* code license limitations below) in the documentation and/or other materials provided
|
21
|
+
* with the distribution
|
22
|
+
*
|
23
|
+
* Redistribution and use in binary form, without modification, are permitted provided
|
24
|
+
* that the following conditions are met:
|
25
|
+
*
|
26
|
+
* * No reverse engineering, decompilation, or disassembly of this software is
|
27
|
+
* permitted with respect to any software provided in binary form.
|
28
|
+
*
|
29
|
+
* * any redistribution and use are licensed by TI for use only with TI Devices.
|
30
|
+
*
|
31
|
+
* * Nothing shall obligate TI to provide you with source code for the software
|
32
|
+
* licensed and provided to you in object code.
|
33
|
+
*
|
34
|
+
* If software source code is provided to you, modification and redistribution of the
|
35
|
+
* source code are permitted provided that the following conditions are met:
|
36
|
+
*
|
37
|
+
* * any redistribution and use of the source code, including any resulting derivative
|
38
|
+
* works, are licensed by TI for use only with TI Devices.
|
39
|
+
*
|
40
|
+
* * any redistribution and use of any object code compiled from the source code
|
41
|
+
* and any resulting derivative works, are licensed by TI for use only with TI Devices.
|
42
|
+
*
|
43
|
+
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
|
44
|
+
*
|
45
|
+
* may be used to endorse or promote products derived from this software without
|
46
|
+
* specific prior written permission.
|
47
|
+
*
|
48
|
+
* DISCLAIMER.
|
49
|
+
*
|
50
|
+
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
|
51
|
+
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
52
|
+
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
53
|
+
* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
54
|
+
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
55
|
+
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
56
|
+
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
|
57
|
+
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
|
58
|
+
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
59
|
+
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
60
|
+
*
|
61
|
+
*/
|
62
|
+
|
63
|
+
#include <utils/console_io/include/app_log.h>
|
64
|
+
#include <ti/drv/sciclient/sciclient.h>
|
65
|
+
#include <ti/drv/sciclient/sciserver_tirtos.h>
|
66
|
+
#include <stdio.h>
|
67
|
+
|
68
|
+
/** \brief Aligned address at which the X509 header is placed. */
|
69
|
+
#define SCISERVER_COMMON_X509_HEADER_ADDR (0x41cffb00)
|
70
|
+
|
71
|
+
int32_t appSciserverInit()
|
72
|
+
{
|
73
|
+
int32_t retVal = CSL_PASS;
|
74
|
+
|
75
|
+
Sciclient_ConfigPrms_t clientParams;
|
76
|
+
|
77
|
+
retVal = Sciclient_configPrmsInit(&clientParams);
|
78
|
+
|
79
|
+
if(retVal==CSL_PASS)
|
80
|
+
{
|
81
|
+
retVal = Sciclient_boardCfgParseHeader(
|
82
|
+
(uint8_t *) SCISERVER_COMMON_X509_HEADER_ADDR,
|
83
|
+
&clientParams.inPmPrms, &clientParams.inRmPrms);
|
84
|
+
}
|
85
|
+
|
86
|
+
if(retVal==CSL_PASS)
|
87
|
+
{
|
88
|
+
retVal = Sciclient_init(&clientParams);
|
89
|
+
}
|
90
|
+
|
91
|
+
Sciserver_TirtosCfgPrms_t serverParams;
|
92
|
+
|
93
|
+
retVal = Sciserver_tirtosInitPrms_Init(&serverParams);
|
94
|
+
|
95
|
+
serverParams.taskPriority[SCISERVER_TASK_USER_LO] = 4;
|
96
|
+
serverParams.taskPriority[SCISERVER_TASK_USER_HI] = 5;
|
97
|
+
|
98
|
+
if(retVal==CSL_PASS)
|
99
|
+
{
|
100
|
+
retVal = Sciserver_tirtosInit(&serverParams);
|
101
|
+
}
|
102
|
+
|
103
|
+
return retVal;
|
104
|
+
}
|
@@ -0,0 +1,21 @@
|
|
1
|
+
ifeq ($(TARGET_PLATFORM),J7)
|
2
|
+
ifeq ($(TARGET_OS),SYSBIOS)
|
3
|
+
ifeq ($(TARGET_CPU),R5F)
|
4
|
+
ifeq ($(BUILD_CPU_MCU1_0),yes)
|
5
|
+
|
6
|
+
include $(PRELUDE)
|
7
|
+
TARGET := app_utils_sciserver
|
8
|
+
TARGETTYPE := library
|
9
|
+
|
10
|
+
CSOURCES := app_sciserver.c
|
11
|
+
|
12
|
+
DEFS+=SOC_J721E
|
13
|
+
DEFS+=BUILD_MCU1_0
|
14
|
+
DEFS+=BUILD_MCU
|
15
|
+
|
16
|
+
include $(FINALE)
|
17
|
+
|
18
|
+
endif
|
19
|
+
endif
|
20
|
+
endif
|
21
|
+
endif
|