This files defines CDD Ipc configuration structures
|
void | Cdd_IpcNewMessageNotify (uint32 comId) |
| New Message notification function. More...
|
|
void | Cdd_IpcNewCtrlMessageNotify (uint32 remoteProcId) |
| New Control Message notification function. More...
|
|
| ISR (Cdd_IpcIrqMbxFromMcu_20) |
| A Mailbox can raise multiple interrupts. In this implementation, the Mailbox new message interrupt is used determine presence of data from the remote core in the vring. More...
|
|
| ISR (Cdd_IpcIrqMbxFromMcu_21) |
| ISR for New Message, from MCU 2 1. More...
|
|
◆ CDD_IPC_PRE_COMPILE_VARIANT
#define CDD_IPC_PRE_COMPILE_VARIANT (STD_ON) |
Pre-Compile Build Variant flag. STD_ON for VariantPreCompile / STD_OFF for VariantPostBuild.
◆ CDD_IPC_DEV_ERROR_DETECT
#define CDD_IPC_DEV_ERROR_DETECT (STD_ON) |
Enable/disable CDD Ipc dev detect error.
◆ CDD_IPC_ISR_TYPE
◆ CDD_IPC_VERSION_INFO_API
#define CDD_IPC_VERSION_INFO_API (STD_ON) |
Enable/disable version info API.
◆ CDD_IPC_DEINIT_API
#define CDD_IPC_DEINIT_API (STD_ON) |
Enable/disable De Initialization API.
◆ CDD_IPC_ANNOUNCE_API
#define CDD_IPC_ANNOUNCE_API (STD_ON) |
Enable/disable Service Announcement API.
◆ CDD_IPC_REGISTER_READBACK_API
#define CDD_IPC_REGISTER_READBACK_API (STD_ON) |
Enable/disable Critical Register read back API.
◆ CDD_IPC_SAFETY_DIAGNOSTIC_API
#define CDD_IPC_SAFETY_DIAGNOSTIC_API (STD_ON) |
Enable/disable safety diagnostics API.
◆ CDD_IPC_IS_INIT_DONE_API
#define CDD_IPC_IS_INIT_DONE_API (STD_ON) |
Enable/disable Cdd_IpcIsInitDone API.
◆ CDD_IPC_GET_MAX_MSG_SIZE_API
#define CDD_IPC_GET_MAX_MSG_SIZE_API (STD_ON) |
Enable/disable Cdd_IpcGetMaxMsgSize API.
◆ CDD_IPC_OS_COUNTER_ID
#define CDD_IPC_OS_COUNTER_ID ((CounterType)OsCounter_0) |
Counter ID for counter used to count wait ticks.
◆ DemConf_DemEventParameter_CDD_IPC_DEM_NO_EVENT
#define DemConf_DemEventParameter_CDD_IPC_DEM_NO_EVENT (0xFFFFU) |
◆ CDD_IPC_DEM_NO_EVENT
◆ CDD_IPC_E_HARDWARE_ERROR
#define CDD_IPC_E_HARDWARE_ERROR (DemConf_DemEventParameter_CDD_IPC_E_HARDWARE_ERROR) |
◆ CDD_IPC_CORE_MCU1_0
#define CDD_IPC_CORE_MCU1_0 (1U) |
◆ CDD_IPC_CORE_MCU1_1
#define CDD_IPC_CORE_MCU1_1 (2U) |
◆ CDD_IPC_CORE_MCU2_0
#define CDD_IPC_CORE_MCU2_0 (3U) |
◆ CDD_IPC_CORE_MCU2_1
#define CDD_IPC_CORE_MCU2_1 (4U) |
◆ CDD_IPC_CORE_MCU3_0
#define CDD_IPC_CORE_MCU3_0 (5U) |
◆ CDD_IPC_CORE_MCU3_1
#define CDD_IPC_CORE_MCU3_1 (6U) |
◆ CDD_IPC_CORE_C66X_1
#define CDD_IPC_CORE_C66X_1 (7U) |
◆ CDD_IPC_CORE_C66X_2
#define CDD_IPC_CORE_C66X_2 (8U) |
◆ CDD_IPC_CORE_C7X_1
#define CDD_IPC_CORE_C7X_1 (9U) |
◆ CDD_IPC_CORE_MAX_PROCS
#define CDD_IPC_CORE_MAX_PROCS (11U) |
◆ CDD_IPC_OWN_CORE_ID
Used core identifiers.
Own core ID
◆ CDD_IPC_REMOTE_CORE_MCU2_0_USED
#define CDD_IPC_REMOTE_CORE_MCU2_0_USED |
Remote core MCU 2 0 is being used
◆ CDD_IPC_REMOTE_CORE_MCU2_1_USED
#define CDD_IPC_REMOTE_CORE_MCU2_1_USED |
Remote core MCU 2 1 is being used
◆ CDD_IPC_VERTIO_OBJECT_SIZE
#define CDD_IPC_VERTIO_OBJECT_SIZE (0x1000U) |
◆ CddIpcConf_IpcComChanId_Cdd_IpcMcu20
#define CddIpcConf_IpcComChanId_Cdd_IpcMcu20 (0U) |
◆ CddIpcConf_IpcComChanId_Cdd_IpcMcu21
#define CddIpcConf_IpcComChanId_Cdd_IpcMcu21 (1U) |
◆ CDD_IPC_RPMSG_OBJ_SIZE
#define CDD_IPC_RPMSG_OBJ_SIZE (256U) |
Size of RP Message Object
◆ CDD_IPC_CH_0_BUFF_SIZE
#define CDD_IPC_CH_0_BUFF_SIZE ((256U * (496U + 32U)) + CDD_IPC_RPMSG_OBJ_SIZE) |
Size of buffer allocated to the channel
◆ CDD_IPC_CH_1_BUFF_SIZE
#define CDD_IPC_CH_1_BUFF_SIZE ((256U * (496U + 32U)) + CDD_IPC_RPMSG_OBJ_SIZE) |
Size of buffer allocated to the channel
◆ CDD_IPC_MAX_CHANNEL_CFG
#define CDD_IPC_MAX_CHANNEL_CFG (2U) |
Maximum number of communication channels configured
◆ IPC_VRING_BUFFER_SIZE
#define IPC_VRING_BUFFER_SIZE (0x1C00000U) |
VRing Buffer Size required for all core combinations.
◆ IPC_MPU1_0
Core definitions.
ARM A72 - VM0
◆ IPC_MCU1_0
◆ IPC_MCU1_1
◆ IPC_MCU2_0
◆ IPC_MCU2_1
◆ IPC_MCU3_0
◆ IPC_MCU3_1
◆ IPC_C66X_1
◆ IPC_C66X_2
◆ IPC_C7X_1
◆ IPC_MPU1_1
◆ IPC_MAX_PROCS
#define IPC_MAX_PROCS (11U) |
◆ CDD_IPC_CORE_ID_MAX
#define CDD_IPC_CORE_ID_MAX (11U) |
IPC maximum possible core ID.
◆ IPC_MAILBOX_CLUSTER_CNT
#define IPC_MAILBOX_CLUSTER_CNT (12U) |
◆ CDD_IPC_NEW_MSG_NTFY_FXN
◆ CDD_IPC_NEW_CTRL_MSG_NTFY_FXN
◆ Cdd_IpcNewMessageNotify()
void Cdd_IpcNewMessageNotify |
( |
uint32 |
comId | ) |
|
New Message notification function.
◆ Cdd_IpcNewCtrlMessageNotify()
void Cdd_IpcNewCtrlMessageNotify |
( |
uint32 |
remoteProcId | ) |
|
New Control Message notification function.
◆ ISR() [1/2]
ISR |
( |
Cdd_IpcIrqMbxFromMcu_20 |
| ) |
|
A Mailbox can raise multiple interrupts. In this implementation, the Mailbox new message interrupt is used determine presence of data from the remote core in the vring.
Typically, we would have 1 interrupt for each remote core. Due to system resource needs, multiple remote cores could use a single interrupt.
Depending on the SoC variant, the isr to registered with interrupt will change. Please refer CDD IPC example application to associate right ISR with interrupt.ISR for New Message, from MCU 2 0
◆ ISR() [2/2]
ISR |
( |
Cdd_IpcIrqMbxFromMcu_21 |
| ) |
|
ISR for New Message, from MCU 2 1.
◆ IPC_Mailbox_BasePhyAddr
◆ g_Ipc_mp_procInfo
Processor IDs to name mapping for all processor in Jacinto7.
◆ g_IPC_MailboxInfo
◆ CddIpcConfiguraions_PC
const struct Cdd_IpcConfigType_s CddIpcConfiguraions_PC |
◆ Cdd_IpcDrvVertIoObj
Communication Channels configured.