MCUSW
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This document details AUTOSAR BSW ADC module implementation
The ADC module initializes, configures and controls the ADC hardware as detailed in AUTOSAR BSW ADC Driver Specification. Following section highlights key aspects of this implementation, which would be interest for integrator.
Please refer the ADC design, which is included as part of release (Adc Design Document)
Programming of clock source for the adc, is beyond the scope of this document. The driver expects user of this module has programmed required clock source. The example application demonstrates configuring clock sources for the adc.
Minimum sampling clock source given as input to the ADC is 25 MHZ and it is observed that ADC hardware samples data faster than CPU reads it. Adc sampled output is inconsistent because of this. So it is reccommended to increase delay parameters AdcChannelAveragingMode, AdcChannelOpenDelay and AdcChannelSampleDelay according to the requirement.
All adc instances are supported by this driver implementation. The following table lists the mapping between instance of hardware and AdcHwUnitId of the configurator
AdcHwUnitId | Adc Instance | Associated ISR (if notification is enabled) |
---|---|---|
0 | MCU INSTANCE 0 | Adc_IrqUnit0 |
1 | MCU INSTANCE 1 | Adc_IrqUnit1 |
The Adc Driver implementation supports multiple configuration variants (refer section Introduction), the driver expects generated Adc_Cfg.h to be present as (File Structure). Please refer (Build) to specify path to the generated configuration. The associated adc configuration generated files Adc_Cfg.c and Adc_PBcfg.c to be present as shown (File Structure)
The generated configuration files should not be modified manually. The config tool Elektrobit Tresos should be used to modify the configuration files.
The following section details on the un-supported features and additional features added.
To configure the clock source for Adc, one would have to access/configure common registers. It’s recommended that clock sources for the Adc hardware are done in SBL / Start up code.
This driver implementation introduces below listed configurable options.
Please refer the ADC design section NON Standard configurable parameters (Refer to Design Document provided in CSP), which is included as part of release (Adc Design Document)
As noted from the previous MCAL implementation, some of the critical configuration registers could potentially be corrupted by other entities (s/w or h/w). One of the recommended detection methods would be to periodically read-back the configuration and confirm configuration is consistent. The service API defined below shall be implemented to enable this detection
Service Name | Adc_RegisterReadback |
Syntax | Std_ReturnType Adc_RegisterReadback (Adc_HWUnitType HWUnit, Adc_RegisterReadbackType *RegRbPtr) |
Service ID[hex] | 0x0F |
Sync/Async | Synchronous |
Reentrancy | Non Reentrant |
Parameters (in) | HWUnit : ADC Hardware microcontroller peripheral unit ID |
Parameters (out) | RegRbPtr : A pointer of type Adc_RegisterReadbackType, which holds the read back values |
Return Value | E_OK: Register read back has been done E_NOT_OK: Register read back failed (in case of Adc not initialized or RegRbPtr is NULL_PTR) |
Description | Reads the important registers of the hardware unit and returns the value in the structure. |
The safety diagnostic implementation of ADC1A - Converted Self-Test and ADC1B- Converter Calibration Test can be done in Functional Internal Diagnostic Debug Mode. This API enables the Functional Internal Diagnostic Debug mode and selects a known voltage source(REFP or VMID) that connects to the AFE.
Service Name | Adc_EnableInternalDiagnostic |
Syntax | Std_ReturnType Adc_EnableInternalDiagnostic(Adc_GroupType Group, Adc_RefSelType RefSelect) |
Service ID[hex] | NA |
Sync/Async | Synchronous |
Reentrancy | Non Reentrant |
Parameters (in) | Group : ADC Channel Group RefSelect : Reference Select for functional internal diagnostic debug mode |
Parameters (out) | None |
Return Value | E_OK: Internal Diagnostic Debug mode enabled E_NOT_OK: Internal Diagnostic Debug mode enable failed (in case of Adc not initialized or invalid group or conversion in progress) |
Description | It enables the Functional Internal Diagnostic Debug mode. |
This API disables the Functional Internal Diagnostic Debug mode.
Service Name | Adc_DisableInternalDiagnostic |
Syntax | Std_ReturnType Adc_DisableInternalDiagnostic(Adc_GroupType Group) |
Service ID[hex] | NA |
Sync/Async | Synchronous |
Reentrancy | Non Reentrant |
Parameters (in) | Group : ADC Channel Group |
Parameters (out) | None |
Return Value | E_OK: Internal Diagnostic Debug mode disabled E_NOT_OK: Internal Diagnostic Debug mode disabled failed (in case of Adc not initialized or invalid group or conversion in progress) |
Description | It disables the Functional Internal Diagnostic Debug mode. |
The Driver doesn’t register any interrupts handler (ISR), it’s expected that consumer of this driver registers the required interrupt handler.
For every Adc hardwarebunit with notification enabled, an ISR requires to be registered. The Interrupt number associated with instance of the Adc is detailed in TRM (also, please refer the demo application). Please refer AdcApp_InterruptConfig () in Adc demo application.
Refer section (Adc Instance, Adc Hw Unit ID mapping and ISR mapping), for association between hw unit ID and ISR
The driver doesn't configure the functional clock and power for the adc modules. Its expected that SBL power-up the required modules. Please refer SBL documentation.
Please follow steps detailed in section (Build) to build library or example
Please refer (Running Examples)
Various objects of this implementation (e.g. variables, functions, constants) are defined under different sections. The linker command file at (Examples Linker File (Select memory location to hold example binary)) defines separate section for these objects. When the driver is integrated, its expected that these sections are created and placed in appropriate memory locations. (Locations of these objects depend on the system design and performance needs)
Section | ADC_CODE | ADC_VAR | ADC_VAR_NOINIT | ADC_CONST | ADC_CONFIG |
ADC_DATA_NO_INIT_UNSPECIFIED_SECTION | USED | ||||
ADC_DATA_INIT_32_SECTION | USED | ||||
ADC_TEXT_SECTION | USED | ||||
ADC_DATA_INIT_UNSPECIFIED_SECTION | USED | ||||
ADC_CONST_32_SECTION | USED | ||||
ADC_ISR_TEXT_SECTION | USED | ||||
ADC_CONFIG_SECTION | USED |
This driver implementation has been validated with cache enabled. For optimal performance it’s recommended to place (Memory Mapping) sections in cache enabled memory area.
This implementation depends on the DET in order to report development errors and can be turned OFF. Refer section (Development Error Reporting) for detailed error codes.
This implementation requires 1 level of exclusive access to guard critical sections. Invokes SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_0 (), SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_0 () to enter critical section and exit.
In the example implementation (File Structure SchM_Adc.c) , all the interrupts on CPU are disabled. However, disabling of the enabled Adc interrupt should suffice.
Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface (Adc.h File Structure) lists the SID
Type of Error | Related Error code | Value (Hex) |
API service called without module initialization | ADC_E_UINIT | 0x0A |
API service called when adc group conversion ongoing | ADC_E_BUSY | 0x0B |
API service for initialization is called when already initialized | ADC_E_ALREADY_INITIALIZED | 0x0D |
API parameter checking: invalid config | ADC_E_PARAM_CONFIG | 0xE |
API parameter checking: invalid pointer | ADC_E_PARAM_POINTER | 0x14 |
API parameter checking: invalid group id | ADC_E_PARAM_GROUP | 0x15 |
API parameter checking: invalid conversion mode | ADC_E_WRONG_CONV_MODE | 0x16 |
API parameter checking: invalid trigger source | ADC_E_WRONG_TRIGG_SRC | 0x17 </tr |
API parameter checking: No notification configured | ADC_E_NOTIF_CAPABILITY | 0x18 |
API parameter checking: Result Buffer not initialized | ADC_E_BUFFER_UNINIT | 0x19 |
API parameter checking: Group/Channel not in idle state | ADC_E_NOT_DISENGAGED | 0x1A |
API parameter checking: Unsupported power state request | ADC_E_POWER_STATE_NOT_SUPPORTED | 0x1B |
API parameter checking: Requested power state can not be reached directly. | ADC_E_TRANSITION_NOT_POSSIBLE | 0x1C |
API parameter checking: ADC not prepared for target power state. | ADC_E_PERIPHERAL_NOT_PREPARED | 0x1D |
Production error are reported to DEM via the service DEM_ReportErrorStatus(). In addition to standard errors, this implementation reports "ADC_E_HARDWARE_ERROR" when ADC HW calibration/FSM state fails.
ADC supports a "self-test" mode where the input is tested against known reference voltages with an expected output. A full scale value is expected when the internal reference is REFP (Vref), and half-scale when connected to VMID (Vref).
The ADC MCAL driver provides the API - Adc_EnableInternalDiagnostic() and Adc_DisableInternalDiagnostic() to to configure the ADC's converter self-test mode for detecting shorts and open circuits at the inputs.
ADC supports a "self-test" mode where the input is tested against known reference voltages with an expected output. A full scale value is expected when the internal reference is REFP (Vref), and half-scale when connected to VMID (Vref).
The ADC MCAL driver provides the API - Adc_EnableInternalDiagnostic() and Adc_DisableInternalDiagnostic() to to configure the ADC's converter self-test mode for detecting drift in ADC measurments by performing conversions on known references.
Software Readback of Written Configuration ensures that the configuration register are written with the expected value. Periodic readback of configuration registers can provide a diagnostic for inadvertent writes to these registers.
The ADC MCAL driver provides the API - Adc_RegisterReadback() to readback static and written configuration registers to implement this diagnostic feature.
Refer API Documentation for details
The example application demonstrates use of Adc module, the list below identifies key steps performed the example. The configuration file is present at (File Structure)
ADC_APP: Sample Application - STARTS !!! ADC_APP: Variant - Post Build being used !!! ADC_APP: GROUPs 2: HWUNIT 2: LOOP COUNT 5: NUM STREAMS 1:!!! ADC_APP: ADC MCAL Version Info ADC_APP: --------------------- ADC_APP: Vendor ID : 44 ADC_APP: Module ID : 123 ADC_APP: SW Major Version : 0 ADC_APP: SW Minor Version : 1 ADC_APP: SW Patch Version : 0 Result Buffer Content --------------------- ADC Group 0 Log: ---------------- Channel Stream HW_CH ADC Value Volt ---------------------------------------------------- 0 0 ADC_IN0 0x00000da7 1536 mV ADC Group 1 Log: ---------------- Channel Stream HW_CH ADC Value Volt ADC Group 0 Log: ---------------- Channel Set Idx HW_CH ADC Value Volt ---------------------------------------------------- 0 0 ADC_IN0 0x00000d99 1530 mV 0 1 ADC_IN0 0x00000dae 1539 mV 0 2 ADC_IN0 0x00000db0 1540 mV 0 3 ADC_IN0 0x00000da8 1536 mV 0 4 ADC_IN0 0x00000da7 1536 mV ADC Group 1 Log: ---------------- Channel Set Idx HW_CH ADC Value Volt ---------------------------------------------------- 0 0 ADC_IN0 0x00000dbe 1546 mV 0 1 ADC_IN0 0x00000f1a 1699 mV 0 2 ADC_IN0 0x00000f20 1701 mV 0 3 ADC_IN0 0x00000f20 1701 mV 0 4 ADC_IN0 0x00000f20 1701 mV Warning: ADC Group 1 values are out of range!! ADC_APP: ADC Stack Usage: 816 bytes ADC_APP: ADC Test Passed!!! ADC_APP: Sample Application - DONE !!!
Revision | Date | Author | Description | Status |
---|---|---|---|---|
0.1 | 25 Mar 2019 | Sunil M S | First version | Pending Review |
0.2 | 1 Apr 2019 | Sunil M S | Addressed review comments | Approved |
0.3 | 16 Oct 2018 | Sujith S | Added Logs from J721E testing | Approved |
0.4 | 02 Nov 2020 | Nikki S | J7200 updated | Approved |
0.5 | 17 Mar 2022 | Rohit T | Removed J721E & J7200 specific contents | Approved |
0.6 | 08 Dec 2022 | Subham Swain | Adding J721s2 specific contents | Approved |
0.7 | 10 April 2023 | Rohit T | Fixed doxygen warnings | Approved |