csirx.h

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/*
 *  Copyright (c) Texas Instruments Incorporated 2018-2019
 *  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/* @} */

#ifndef CSIRX_H_
#define CSIRX_H_

/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */

#include <ti/csl/csl_csirx.h>
#include <ti/drv/fvid2/fvid2.h>
#include <ti/drv/csirx/soc/csirx_soc.h>
#include <ti/drv/csirx/include/csirx_cfg.h>
#include <ti/drv/csirx/include/csirx_event.h>
#include <ti/drv/udma/udma.h>

#ifdef __cplusplus
extern "C" {
#endif

/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */

#define CSIRX_CAPT_DRV_ID               (FVID2_CSIRX_DRV_BASE + 0x00000000U)

/* Capture IOCTL's */
#define IOCTL_CSIRX_GET_INST_STATUS     (FVID2_CSIRX_DRV_IOCTL_BASE + 0x0000U)

#define IOCTL_CSIRX_PRINT_DEBUG_LOGS    (FVID2_CSIRX_DRV_IOCTL_BASE + 0x0100U)

#define IOCTL_CSIRX_SET_DPHY_CONFIG     (FVID2_CSIRX_DRV_IOCTL_BASE + 0x0200U)

#define IOCTL_CSIRX_REGISTER_EVENT     (FVID2_CSIRX_DRV_IOCTL_BASE + 0x0300U)

#define IOCTL_CSIRX_UNREGISTER_EVENT   (FVID2_CSIRX_DRV_IOCTL_BASE + 0x0400U)

#define IOCTL_CSIRX_GET_INST_CH_NUM    (FVID2_CSIRX_DRV_IOCTL_BASE + 0x0500U)

#define IOCTL_CSIRX_CH_START           (FVID2_CSIRX_DRV_IOCTL_BASE + 0x0600U)

#define IOCTL_CSIRX_CH_STOP            (FVID2_CSIRX_DRV_IOCTL_BASE + 0x0700U)
/* @} */

#define CSIRX_CH_TYPE_CAPT                        ((uint32_t) 0x0U)

#define CSIRX_CH_TYPE_OTF                         ((uint32_t) 0x1U)

#define CSIRX_CH_TYPE_LPBK                        ((uint32_t) 0x2U)
/* @} */

#define CSIRX_CAPT_STREAM_ID                       ((uint32_t) 0x0U)

#define CSIRX_LPBK_STREAM_ID                       ((uint32_t) 0x1U)

#define CSIRX_OTF_STREAM0_ID                       ((uint32_t) 0x2U)

#define CSIRX_OTF_STREAM1_ID                       ((uint32_t) 0x3U)

/* @} */
#define CSIRX_BUF_ALIGNMENT                       (UDMA_CACHELINE_ALIGNMENT)

/* ========================================================================== */
/*                         Structure Declarations                             */
/* ========================================================================== */

typedef struct
{
    uint32_t chId;
    uint32_t chType;
    uint32_t vcNum;
    uint32_t inCsiDataType;
    Fvid2_Format outFmt;
    Udma_ChRxPrms rxChParams;
    uint8_t ringOrderId;
} Csirx_ChCfg;

typedef struct
{
    uint32_t enableCsiv2p0Support;
    uint32_t numDataLanes;
    uint32_t dataLanesMap[CSIRX_CAPT_DATA_LANES_MAX];
    uint32_t enableErrbypass;
    uint32_t numPixelsStrm0;
    uint32_t enableStrm[CSIRX_NUM_STREAM];
} Csirx_InstCfg;

typedef struct
{
    uint32_t        numCh;
    Csirx_ChCfg     chCfg[CSIRX_NUM_CH];
    Csirx_InstCfg   instCfg;
    uint64_t        frameDropBuf;
    uint32_t        frameDropBufLen;
    uint32_t enableChDq;
} Csirx_CreateParams;

typedef struct
{
    Udma_DrvHandle  drvHandle;
} Csirx_InitParams;

typedef struct
{
    int32_t retVal;
} Csirx_CreateStatus;

typedef struct
{
    uint32_t queueCount[CSIRX_NUM_CH];
    uint32_t dequeueCount[CSIRX_NUM_CH];
    uint32_t dropCount[CSIRX_NUM_CH];
    uint32_t errorFrameCount[CSIRX_NUM_CH];
    uint32_t overflowCount;
    uint32_t spuriousUdmaIntrCount;
    uint32_t frontFIFOOvflCount;
    uint32_t crcCount;
    uint32_t eccCount;
    uint32_t correctedEccCount;
    uint32_t dataIdErrorCount;
    uint32_t invalidAccessCount;
    uint32_t invalidSpCount;
    uint32_t strmFIFOOvflCount[CSIRX_NUM_STREAM];
} Csirx_InstStatus;

/* ========================================================================== */
/*                  Internal/Private Function Declarations                    */
/* ========================================================================== */

/* None */

/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */
int32_t Csirx_init(const Csirx_InitParams *initParams);

int32_t Csirx_deInit(void);
/* ========================================================================== */
/*      Internal Function Declarations (Needed for other static inlines)      */
/* ========================================================================== */

static inline void Csirx_initParamsInit(Csirx_InitParams *initPrms);

static inline void Csirx_createParamsInit(Csirx_CreateParams *createPrms);

static inline void Csirx_chCfgInit(Csirx_ChCfg *chCfg);

static inline void Csirx_instCfgInit(Csirx_InstCfg *instCfg);

static inline void Csirx_instStatusInit(Csirx_InstStatus *status);

/* ========================================================================== */
/*                       Static Function Definitions                          */
/* ========================================================================== */

static inline void Csirx_initParamsInit(Csirx_InitParams *initPrms)
{
    initPrms->drvHandle = NULL;
}

static inline void Csirx_createParamsInit(Csirx_CreateParams *createPrms)
{
    uint32_t loopCnt;

    if (NULL != createPrms)
    {
        createPrms->numCh = 0U;
        for (loopCnt = 0U ; loopCnt < CSIRX_NUM_CH ; loopCnt++)
        {
            Csirx_chCfgInit(&createPrms->chCfg[loopCnt]);
        }
        Csirx_instCfgInit(&createPrms->instCfg);
        createPrms->frameDropBufLen = 0U;
        createPrms->frameDropBuf    = 0U;
        createPrms->enableChDq      = 0U;
    }
}

static inline void Csirx_chCfgInit(Csirx_ChCfg *chCfgPrms)
{
    chCfgPrms->chId = CSIRX_CH_ID_DEFAULT;
    chCfgPrms->chType = CSIRX_CH_TYPE_CAPT;
    chCfgPrms->vcNum = CSIRX_VC_NUM_DEFAULT;
    chCfgPrms->inCsiDataType = CSIRX_IN_DT_DEFAULT;
    Fvid2Format_init(&chCfgPrms->outFmt);
    chCfgPrms->outFmt.width = 0U;
    chCfgPrms->outFmt.height = 0U;
    Fvid2Utils_memset(&chCfgPrms->outFmt.pitch[0U],
           0x0,
           sizeof (chCfgPrms->outFmt.pitch));

    /* Initialization of UDMA channel params */
    chCfgPrms->ringOrderId = UDMA_DEFAULT_RING_ORDER_ID;
    UdmaChRxPrms_init(&chCfgPrms->rxChParams, UDMA_CH_TYPE_RX);
    chCfgPrms->rxChParams.chanType    = (uint8_t)CSL_UDMAP_CHAN_TYPE_REF_TR_RING;
    /* Make CSI2RX DMA channels as highest priority,
       it is assumed that order 8-15 is mapped as RT at system level */
    chCfgPrms->rxChParams.busPriority = 0U;
    chCfgPrms->rxChParams.busQos      = 0U;
    chCfgPrms->rxChParams.busOrderId  = 8U;
    chCfgPrms->rxChParams.dmaPriority =
                                TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_HIGH;
}

static inline void Csirx_instCfgInit(Csirx_InstCfg *modCfgPrms)
{
    uint32_t loopCnt;

    modCfgPrms->enableCsiv2p0Support = (uint32_t)TRUE;
    modCfgPrms->numDataLanes         = CSIRX_CAPT_DATA_LANES_MAX;
    modCfgPrms->enableErrbypass      = (uint32_t)TRUE;
    modCfgPrms->numPixelsStrm0       = (uint32_t)0U;
    for(loopCnt = 0U ; loopCnt < CSIRX_CAPT_DATA_LANES_MAX ; loopCnt++)
    {
        modCfgPrms->dataLanesMap[loopCnt] = (loopCnt + 1U);
    }
    for(loopCnt = 0U ; loopCnt < CSIRX_NUM_STREAM ; loopCnt++)
    {
        modCfgPrms->enableStrm[loopCnt] = 0;
    }
}

static inline void Csirx_instStatusInit(Csirx_InstStatus *captStatus)
{
    uint32_t loopCnt, strmIdx;

    captStatus->overflowCount         = 0U;
    captStatus->spuriousUdmaIntrCount = 0U;
    captStatus->spuriousUdmaIntrCount = 0U;
    captStatus->frontFIFOOvflCount    = 0U;
    captStatus->crcCount              = 0U;
    captStatus->eccCount              = 0U;
    captStatus->correctedEccCount     = 0U;
    captStatus->dataIdErrorCount      = 0U;
    captStatus->invalidAccessCount    = 0U;
    captStatus->invalidSpCount        = 0U;
    for (strmIdx = 0U ; strmIdx < CSIRX_NUM_STREAM ; strmIdx++)
    {
        captStatus->strmFIFOOvflCount[strmIdx]= 0U;
    }
    for(loopCnt = 0U ; loopCnt < CSIRX_NUM_CH ; loopCnt++)
    {
        captStatus->queueCount[loopCnt]      = 0U;
        captStatus->dequeueCount[loopCnt]    = 0U;
        captStatus->dropCount[loopCnt]       = 0U;
        captStatus->errorFrameCount[loopCnt] = 0U;
    }
}

#ifdef __cplusplus
}
#endif

#endif /* #ifndef CSIRX_H_ */
/* @} */