csirx_soc.h File Reference

Introduction

CSIRX Low Level Driver SOC specific file.

Go to the source code of this file.

Data Structures
struct	Csirx_DPhyCfg
	D-PHY configuration structure. More...

Macros
#define	CSIRX_NUM_VIRTUAL_CONTEXT   (8U)
	CSIRX DRV Virtual Context: Number of virtual contexts per CSI RX port. More...
#define	CSIRX_NUM_STREAM   (2U)
	CSIRX DRV Numbers: Number of stream per CSI RX module. More...
#define	CSIRX_CORE_PIXEL_OUTPUT_BUS_WIDTH   (32U)
	Output bus width from CSIRX core in bits. More...
CSIRX Module Instance ID
Different instances of CSI Rx Module instances.
#define	CSIRX_INSTANCE_ID_0   ((uint32_t) 0x0U)
	CSIRX Module Instance ID: CSI2RX Module 0. More...
#define	CSIRX_INSTANCE_ID_1   ((uint32_t) 0x1U)
	CSIRX Module Instance ID: CSI2RX Module 1. More...
#define	CSIRX_INSTANCE_ID_MAX   ((uint32_t) 0x2U)
CSIRX SoC integration details
Different instances of CSI Rx capture module supported in the SoC and their configuration/integration supported in the SoC.
#define	CSIRX_NUM_STRMS_CAPT   CSIRX_INSTANCE_ID_MAX
	Total number of capture processing streams available in the SoC. More...
#define	CSIRX_NUM_STRMS_OTF   ((uint32_t) 1U)
	Total number of OTF(VP/VISS) streams available in the SoC. Note: OTF stream is only supported on 'CSIRX_INSTANCE_ID_0' only. More...
#define	CSIRX_NUM_STRMS_LPBK   CSIRX_INSTANCE_ID_MAX
	Total number of Loop-back streams available in the SoC. More...
#define	CSIRX_NUM_CH_CAPT   ((uint32_t) 32U)
	Number of capture channels per CSIRX instance. More...
#define	CSIRX_NUM_CH_CAPT_MAX
	Number of capture channels that can run in parallel in the SoC. More...
#define	CSIRX_NUM_CH_OTF_MAX   ((uint32_t) 1U)
	Number of OTF channels that can run in parallel in the SoC. More...
#define	CSIRX_NUM_CH_LPBK_MAX   ((uint32_t) 4U)
	Number of Loop-back channels that can run in parallel in the SoC. Note: Though each CSI instance have one loop-back stream, only one can be used in the SoC which can be configured on any instance. More...
#define	CSIRX_NUM_CH_MAX
	Maximum number of channels that can be processed per CSIRX module These many valid channel configurations can exists per CSIRX DRV instance. More...
#define	CSIRX_CAPT_DATA_LANES_MAX   ((uint32_t)4U)
	Defines total number of physical data lanes that can be used per CSIRX instance. More...
CSIRX D-PHY lane band speed
Lane band speed options for CSIRX D-PHY.
#define	CSIRX_LANE_BAND_SPEED_80_TO_100_MBPS   ((uint32_t) 0x00U)
	Lane Band Speed: 80 Mbps to 100 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_100_TO_120_MBPS   ((uint32_t) 0x01U)
	Lane Band Speed: 100 Mbps to 120 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_120_TO_160_MBPS   ((uint32_t) 0x02U)
	Lane Band Speed: 120 Mbps to 160 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_160_TO_200_MBPS   ((uint32_t) 0x03U)
	Lane Band Speed: 160 Mbps to 200 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_200_TO_240_MBPS   ((uint32_t) 0x04U)
	Lane Band Speed: 200 Mbps to 240 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_240_TO_280_MBPS   ((uint32_t) 0x05U)
	Lane Band Speed: 240 Mbps to 280 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_280_TO_320_MBPS   ((uint32_t) 0x06U)
	Lane Band Speed: 280 Mbps to 320 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_320_TO_360_MBPS   ((uint32_t) 0x07U)
	Lane Band Speed: 320 Mbps to 360 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_360_TO_400_MBPS   ((uint32_t) 0x08U)
	Lane Band Speed: 360 Mbps to 400 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_400_TO_480_MBPS   ((uint32_t) 0x09U)
	Lane Band Speed: 400 Mbps to 480 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_480_TO_560_MBPS   ((uint32_t) 0x0AU)
	Lane Band Speed: 480 Mbps to 560 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_560_TO_640_MBPS   ((uint32_t) 0x0BU)
	Lane Band Speed: 560 Mbps to 640 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_640_TO_720_MBPS   ((uint32_t) 0x0CU)
	Lane Band Speed: 640 Mbps to 720 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_720_TO_800_MBPS   ((uint32_t) 0x0DU)
	Lane Band Speed: 720 Mbps to 800 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_800_TO_880_MBPS   ((uint32_t) 0x0EU)
	Lane Band Speed: 800 Mbps to 880 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_880_TO_1040_MBPS   ((uint32_t) 0x0FU)
	Lane Band Speed: 880 Mbps to 1040 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_1040_TO_1200_MBPS   ((uint32_t) 0x10U)
	Lane Band Speed: 1040 Mbps to 1200 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_1200_TO_1350_MBPS   ((uint32_t) 0x11U)
	Lane Band Speed: 1200 Mbps to 1350 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_1350_TO_1500_MBPS   ((uint32_t) 0x12U)
	Lane Band Speed: 1350 Mbps to 1500 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_1500_TO_1750_MBPS   ((uint32_t) 0x13U)
	Lane Band Speed: 1500 Mbps to 1750 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_1750_TO_2000_MBPS   ((uint32_t) 0x14U)
	Lane Band Speed: 1750 Mbps to 2000 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_2000_TO_2250_MBPS   ((uint32_t) 0x15U)
	Lane Band Speed: 2000 Mbps to 2250 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_2250_TO_2500_MBPS   ((uint32_t) 0x16U)
	Lane Band Speed: 2250 Mbps to 2500 Mbps. More...
#define	CSIRX_LANE_BAND_SPEED_RESERVED   ((uint32_t) 0x17U)
	Lane Band Speed: Reserved. More...

Functions
static void	Csirx_initDPhyCfg (Csirx_DPhyCfg *dphyCfg)
	Csirx_DPhyCfg structure init function. Called through 'IOCTL_CSIRX_SET_DPHY_CONFIG' IOCTL. More...
void	CsirxDrv_dphyrxWrapPsmClockConfig (uint32_t addr, uint32_t value)
void	CsirxDrv_dphyrxCorePpiClockConfig (uint32_t addr, const Csirx_DPhyCfg *dphyCfg)
void	CsirxDrv_dphyrxCoreLaneReady (uint32_t addr, uint32_t numLanes)
void	CsirxDrv_dphyrxCoreCommonReady (uint32_t addr)
int32_t	CsirxDrv_checkDphyrxConfig (const Csirx_DPhyCfg *programmedCfg, const Csirx_DPhyCfg *newCfg)
void	CsirxDrv_dphyrxPsoDisable (uint32_t addr, uint32_t value)
void	CsirxDrv_dphyCommonReset (uint32_t addr, uint32_t value)
void	CsirxDrv_dphyrxSetLaneBandSpeed (uint32_t addr, const Csirx_DPhyCfg *dphyCfg)