csl_ospi.h File Reference

Introduction

Header file containing various enumerations, macro definitions and function.

declarations for the OSPI IP.

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OSPI clock mode
This enumerator defines the four possible clock modes, dach mode has different values of clock phase(CKPH) and clock polarity(CKP)
#define	CSL_OSPI_CLK_MODE_0   (0U)
#define	CSL_OSPI_CLK_MODE_1
#define	CSL_OSPI_CLK_MODE_2
#define	CSL_OSPI_CLK_MODE_3
typedef uint32_t	CSL_OspiClkMode

OSPI chip select
This enumerator defines the chip selects available to OSPI. OSPI module have four chip selects to connect to four external devices.
#define	CSL_OSPI_CS0   ((uint32_t) 0U)
#define	CSL_OSPI_CS1   ((uint32_t) 1U)
#define	CSL_OSPI_CS2   ((uint32_t) 2U)
#define	CSL_OSPI_CS3   ((uint32_t) 3U)
typedef uint32_t	CSL_OspiChipSelect

OSPI decoder select
This enumerator defines the decoder select. Chip select 3
#define	CSL_OSPI_DECODER_SELECT4   ((uint32_t) 0U)
#define	CSL_OSPI_DECODER_SELECT16   ((uint32_t) 1U)
typedef uint32_t	CSL_OspiDecSelect

OSPI num of addr bytes in memory mapped mode
This enumerator defines the number of Address bytes to be sent before transfer in memory mapped mode for each chip select
#define	CSL_OSPI_MEM_MAP_NUM_ADDR_BYTES_1   ((uint32_t) 0U)
#define	CSL_OSPI_MEM_MAP_NUM_ADDR_BYTES_2   ((uint32_t) 1U)
#define	CSL_OSPI_MEM_MAP_NUM_ADDR_BYTES_3   ((uint32_t) 2U)
#define	CSL_OSPI_MEM_MAP_NUM_ADDR_BYTES_4   ((uint32_t) 3U)
typedef uint32_t	CSL_OspiMemMapNumAddrBytes

PHY operation mode flags
This enumerator defines whether to force half cycle or try achieve full cycle lock.
#define	CSL_OSPI_CFG_PHY_OP_MODE_DEFAULT   ((uint32_t) 0U)
#define	CSL_OSPI_CFG_PHY_OP_MODE_MASTER   ((uint32_t) 1U)
#define	CSL_OSPI_CFG_PHY_OP_MODE_BYPASS   ((uint32_t) 2U)
#define	CSL_OSPI_CFG_PHY_DLL_MODE_DEFAULT   (CSL_OSPI_LOCK_CYCLE_HALF)
#define	CSL_OSPI_LOCK_CYCLE_FULL   ((uint16_t) 0U)
#define	CSL_OSPI_LOCK_CYCLE_HALF   ((uint16_t) 1U)
typedef uint32_t	CSL_OspiPhyOpMode

OSPI write completion auto polling state
This enumerator defines the write completion auto polling control states
#define	CSL_OSPI_WRITE_COMP_AUTO_POLLING_ENABLE   ((uint32_t) 1U)
#define	CSL_OSPI_WRITE_COMP_AUTO_POLLING_DISABLE   ((uint32_t) 0U)
typedef uint32_t	CSL_OspiWriteCompAutoPolling

OSPI interrupt mask flags
This enumerator defines the flags of interrupt for OSPI module
#define	CSL_OSPI_INTR_MASK_MODE_M_FAIL   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_MODE_M_FAIL_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_UNDERFLOW_DET   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_UNDERFLOW_DET_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_IND_OP_DONE   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_INDIRECT_OP_DONE_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_IND_RD_REJECT   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_INDIRECT_READ_REJECT_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_PROT_WR_ATTEMPT   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_PROT_WR_ATTEMPT_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_ILLEGAL_ACCESS_DET   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_ILLEGAL_ACCESS_DET_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_IND_XFER_LVL_BREACH   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_INDIRECT_XFER_LEVEL_BREACH_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_RECV_OVERFLOW_DET   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_RECV_OVERFLOW_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_TX_FIFO_NOT_FULL   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_TX_FIFO_NOT_FULL_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_TX_FIFO_FULL   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_TX_FIFO_FULL_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_RX_FIFO_NOT_EMPTY   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_RX_FIFO_NOT_EMPTY_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_RX_FIFO_FULL   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_RX_FIFO_FULL_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_IND_RD_SRAM_FULL   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_INDRD_SRAM_FULL_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_POLL_EXP_INT   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_POLL_EXP_INT_FLD_MASK)
#define	CSL_OSPI_INTR_MASK_IRQ_STAT_RESV   (CSL_OSPI_FLASH_CFG_IRQ_STATUS_REG_IRQ_STAT_RESV_FLD_MASK)
typedef uint32_t	CSL_OspiIntrMask

Macros
#define	CSL_OSPI_POLL_IDLE_TIMEOUT   (5000U) /* in millisecond */
	OSPI operation timeout value. More...
#define	CSL_OSPI_POLL_IDLE_DELAY   (1U) /* in Millisecond */
#define	CSL_OSPI_POLL_IDLE_RETRY   (3U)
#define	CSL_OSPI_REG_RETRY   (10U)
#define	CSL_OSPI_FIFO_WIDTH   (4U)
#define	CSL_OSPI_CMD_LEN_DEFAULT   (1U) /*In bytes */
	OSPI Command default Length. More...
#define	CSL_OSPI_CMD_LEN_EXTENDED   (5U) /*In bytes */
#define	CSL_OSPI_CHIP_SELECT(x)   ((~((1U) << (x))) & 0xFU)
#define	CSL_OSPI_BAUD_RATE_DIVISOR(x)   (((x) - 2U) >> 1U)
	OSPI controller master mode baud rate divisor. SPI bard rate = master_ref_clk/BD, where BD is: 0000 = /2 0001 = /4 0010 = /6 ... 1111 = /32. More...
#define	CSL_OSPI_BAUD_RATE_DIVISOR_DEFAULT   (CSL_OSPI_BAUD_RATE_DIVISOR(32U))
#define	CSL_OSPI_DEV_DELAY_ARRAY_SIZE   (4U)
	OSPI device delay parameter array size. More...
#define	CSL_OSPI_DEV_DELAY_CSSOT   (46U) /* Chip Select Start of Transfer Delay */
	OSPI device delays in cycles of SPI master ref clock. More...
#define	CSL_OSPI_DEV_DELAY_CSEOT   (46U) /* Chip Select End of Transfer Delay */
#define	CSL_OSPI_DEV_DELAY_CSDADS   (192U) /* Chip Select De-Assert Different Slaves Delay */
#define	CSL_OSPI_DEV_DELAY_CSDA   (192U) /* Chip Select De-Assert Delay */
#define	CSL_OSPI_SRAM_SIZE_WORDS   (128U)
	SRAM partition configuration definitions. More...
#define	CSL_OSPI_SRAM_PARTITION_RD   (64U)
#define	CSL_OSPI_SRAM_PARTITION_WR
#define	CSL_OSPI_SRAM_PARTITION_DEFAULT   (CSL_OSPI_SRAM_PARTITION_RD - 1U)
#define	CSL_OSPI_SRAM_WARERMARK_RD_LVL   (CSL_OSPI_SRAM_PARTITION_RD / 4U)
	SRAM fill level watermark. More...
#define	CSL_OSPI_SRAM_WATERMARK_WR_LVL   (CSL_OSPI_SRAM_PARTITION_WR / 4U)
#define	CSL_OSPI_INTR_MASK_IND_XFER
#define	CSL_OSPI_INTR_MASK_ALL
#define	CSL_OSPI_CMD_READ_SINGLE_DUMMY_CLOCKS   (0U)
	Number of dummy cycles for a command read. More...
#define	CSL_OSPI_CMD_READ_OCTAL_DUMMY_CLOCKS   (8U)
#define	CSL_OSPI_FLASH_CFG_PHY_MASTER_CONTROL_REG_PHY_MASTER_MODE   (0U)
	PHY Master control register master/bypass mode field value. More...
#define	CSL_OSPI_FLASH_CFG_PHY_MASTER_CONTROL_REG_PHY_BYPASS_MODE   (1U)
OSPI number of transfer lines
This enum defines the number of lines controller needs to use.
#define	CSL_OSPI_CFG_XFER_LINES_SINGLE   ((uint32_t) 0U)
#define	CSL_OSPI_CFG_XFER_LINES_DUAL   ((uint32_t) 1U)
#define	CSL_OSPI_CFG_XFER_LINES_QUAD   ((uint32_t) 2U)
#define	CSL_OSPI_CFG_XFER_LINES_OCTAL   ((uint32_t) 3U)
OSPI PHY sample edge select
This enumerator defines whether to sample on rising edge or falling edge
#define	CSL_OSPI_CFG_PHY_SAMPLE_EDGE_DEFAULT   (CSL_OSPI_CFG_PHY_SAMPLE_EDGE_FALLING)
#define	CSL_OSPI_CFG_PHY_SAMPLE_EDGE_FALLING   ((uint16_t) 0U)
#define	CSL_OSPI_CFG_PHY_SAMPLE_EDGE_RISING   ((uint16_t) 1U)

Functions
void	CSL_ospiEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable)
	This function enables/disables the OSPI By definition, target can handle read/write transaction as long as it is enabled. More...
void	CSL_ospiDacEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable)
	This function enables/disables the OSPI Direct Access Controller. More...
void	CSL_ospiXipEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable)
	This function enables/disables the OSPI XIP Controller. More...
void	CSL_ospiSetModeBits (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t flashModeVal)
	This function sets the Mode bits which are sent to the device following address. More...
void	CSL_ospiPhyEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable)
	This function enables/disables the OSPI PHY mode. More...
void	CSL_ospiPipelinePhyEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable)
	This function enables/disables the OSPI pipeline PHY mode. More...
void	CSL_ospiDtrEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable)
	This function enables/disables the OSPI DTR protocol. More...
void	CSL_ospiSetPreScaler (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t clkDividerVal)
	Set the OSPI clock register divider value. More...
void	CSL_ospiSetClkMode (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t clkMode)
	This function configures the OSPI to work in different clock modes. More...
void	CSL_ospiSetChipSelect (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t chipSelect, uint32_t decSelect)
	This function configures the chip select polarity for a selected chip select. This can only be done if OSPI module is not busy. More...
void	CSL_ospiSetDevDelay (const CSL_ospi_flash_cfgRegs *pRegs, const uint32_t *delays)
	This function configures the device delays This can only be done if OSPI controller is idle. More...
void	CSL_ospiSetDevSize (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t numAddrBytes, uint32_t pageSize, uint32_t blkSize)
	Set device size configrations. More...
void	CSL_ospiSetIndTrigAddr (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t indTrigAddr)
	Set Indirect Trigger Address. More...
void	CSL_ospiSetWrCompAutoPolling (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t pollingState)
	Set write completion auto polling configuration. More...
void	CSL_ospiSetPollingDummyCycles (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t dummyCycles)
	Set write completion auto polling configuration. More...
void	CSL_ospiSetSramPartition (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t partition)
	Set SRAM partition configuration. More...
void	CSL_ospiIntrEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t intrFlag, uint32_t enable)
	This Function enables/diables only specified OSPI interrupts. More...
uint32_t	CSL_ospiIntrStatus (const CSL_ospi_flash_cfgRegs *pRegs)
	This function returns the status of interrupts. It specifies whether an interrupt is active or inactive. After an interrupt is serviced, the software must set to 0 the corresponding flag in the interrupt status register. More...
void	CSL_ospiIntrClear (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t intrFlag)
	This Function clears the status of specified interrupts. More...
uint32_t	CSL_ospiGetSramLvl (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t read)
	This Function gets the OSPI SRAM FIFO fill level bytes. More...
int32_t	CSL_ospiCmdRead (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t cmd, uint32_t rxLen)
	Read operation in config mode. More...
int32_t	CSL_ospiCmdExtRead (const CSL_ospi_flash_cfgRegs *pRegs, const uint8_t *cmdBuf, uint32_t cmdLen, uint32_t rxLen, uint32_t dummyCycles)
	Extended opcode read operation in config mode. More...
int32_t	CSL_ospiCmdWrite (const CSL_ospi_flash_cfgRegs *pRegs, const uint8_t *cmdBuf, uint32_t cmdLen, const uint8_t *txBuf, uint32_t txLen)
	Write operation in config mode. More...
void	CSL_ospiConfigRead (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t cmd, uint32_t mode, uint32_t dummyClk)
	Setup read operation transfer mode. More...
void	CSL_ospiIndReadExecute (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t rxLen)
	Execute read operation in indirect transfer mode. More...
void	CSL_ospiClrIndReadComplete (const CSL_ospi_flash_cfgRegs *pRegs)
	Clear indirect read operation done status. More...
uint32_t	CSL_ospiIndReadComplete (const CSL_ospi_flash_cfgRegs *pRegs)
	Check if indirect read operation is done. More...
void	CSL_ospiReadFifoData (uintptr_t indAddr, uint8_t *dest, uint32_t rdLen)
	Read data from the SRAM FIFO. More...
void	CSL_ospiWriteSetup (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t cmd, uint32_t mode)
	Setup write operation transfer mode. More...
uint32_t	CSL_ospiIsIndWriteComplete (const CSL_ospi_flash_cfgRegs *pRegs)
	Check if indirect write operation is done. More...
void	CSL_ospiClrIndWriteComplete (const CSL_ospi_flash_cfgRegs *pRegs)
	Clear indirect write operation done status. More...
void	CSL_ospiIndWriteExecute (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t txLen)
	Execute write operation in indirect transfer mode. More...
void	CSL_ospiIndWriteCancel (const CSL_ospi_flash_cfgRegs *pRegs)
	Cancel write operation in indirect transfer mode. More...
void	CSL_ospiWriteFifoData (uintptr_t indAddr, const uint8_t *src, uint32_t wrLen)
	Write data to the SRAM FIFO. More...
void	CSL_ospiLoopbackClkEnable (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t enable)
	Enable the adapted loopback clock circuit. More...
uint32_t	CSL_ospiIsIdle (const CSL_ospi_flash_cfgRegs *pRegs)
	Check if OSPI is idle or not. More...
void	CSL_ospiFlashExecCmd (const CSL_ospi_flash_cfgRegs *pRegs)
	Excecute the flash read/write command. More...
uint32_t	CSL_ospiFlashExecCmdComplete (const CSL_ospi_flash_cfgRegs *pRegs)
	Check the flash command execution status. More...
void	CSL_ospiConfigPhy (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t lockCycle, uint32_t masterDelay, const uint32_t *pSlaveDelay)
	Configure the PHY. More...
void	CSL_ospiFlashStig (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t cmd, uint32_t addr, uint32_t data)
	Set configurations for a flash STIG command. More...
void	CSL_ospiIndSetStartAddr (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t startAddr, uint32_t read)
	Configure the read or wrtie start address in Indirect mode. More...
void	CSL_ospiSetDataReadCapDelay (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t delay)
	Set the read data capture delay. More...
void	CSL_ospiSetCsSotDelay (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t delay)
	Set the Chip Select Start of Transfer delay. More...
void	CSL_ospiSetDualByteOpcodeMode (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t opcodeMode)
	Set the dual byte opcode mode. More...
uint32_t	CSL_ospiGetDualByteOpcodeMode (const CSL_ospi_flash_cfgRegs *pRegs)
	Get the dual byte opcode mode. More...
void	CSL_ospiExtOpcodeSet (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t opcodeLo, uint32_t opcodeUp)
	Set the dual byte opcode parameters. More...
void	CSL_ospiExtOpcodeGet (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t *opcodeLo, uint32_t *opcodeUp)
	Get the dual byte opcode parameters. More...
void	CSL_ospiConfigPhyDLL (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t txDelay, uint32_t rxDelay, uint32_t opMode, uint32_t lockCycle, uint32_t funcClk)
	Configure the PHY TX/RX DLL delays. More...
void	CSL_ospiPhyResyncDll (const CSL_ospi_flash_cfgRegs *pRegs, uint32_t lockCycle)
	Resync the PHY DLLs after configuring the TX delays. More...