PDK API Guide for J721E
Data Structures | Macros
cslr_dss.h File Reference

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Data Structures

struct  CSL_dss_common_mRegs
 
struct  CSL_dss_common_s0Regs
 
struct  CSL_dss_vidl1Regs
 
struct  CSL_dss_vidl2Regs
 
struct  CSL_dss_vid1Regs
 
struct  CSL_dss_vid2Regs
 
struct  CSL_dss_ovr1Regs
 
struct  CSL_dss_vp1Regs
 
struct  CSL_dss_ovr2Regs
 
struct  CSL_dss_vp2Regs
 
struct  CSL_dss_ovr3Regs
 
struct  CSL_dss_vp3Regs
 
struct  CSL_dss_ovr4Regs
 
struct  CSL_dss_vp4Regs
 
struct  CSL_dss_wbRegs
 
struct  CSL_dss_common_s1Regs
 
struct  CSL_dss_common_s2Regs
 

Macros

#define CSL_DSS_COMMON_M_DSS_REVISION   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS   (0x00000020U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW   (0x00000028U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS   (0x0000002CU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET   (0x00000030U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR   (0x00000034U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0   (0x00000038U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1   (0x0000003CU)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2   (0x00000040U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3   (0x00000044U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0   (0x00000048U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1   (0x0000004CU)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2   (0x00000050U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3   (0x00000054U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0   (0x00000058U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1   (0x0000005CU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2   (0x00000060U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3   (0x00000064U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0   (0x00000068U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1   (0x0000006CU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2   (0x00000070U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3   (0x00000074U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE   (0x00000078U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS   (0x0000007CU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC   (0x00000080U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY   (0x00000084U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY   (0x00000088U)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE   (0x00000090U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE   (0x00000098U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE   (0x0000009CU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER   (0x000000A0U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG   (0x000000A4U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL   (0x000000A8U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_STATUS   (0x000000ACU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE   (0x000000B0U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_1   (0x000000B8U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_2   (0x000000BCU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_3   (0x000000C0U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_4   (0x000000C4U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_5   (0x000000C8U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_6   (0x000000CCU)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL   (0x000000D0U)
 
#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0   (0x000000D4U)
 
#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1   (0x000000D8U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS   (0x000000E4U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1   (0x000000E8U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3   (0x000000ECU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE   (0x000000F0U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS   (0x000000F4U)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE   (0x000000F8U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_MASK   (0x0000003FU)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_MAX   (0x0000003FU)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_MASK   (0x000000C0U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_MASK   (0x00000700U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_MAX   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_MASK   (0x0000F800U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_MODID_MASK   (0xFFFF0000U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_MODID_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_DSS_REVISION_MODID_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKFREE   (0x0U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKGATED   (0x1U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_MASK   (0x00000018U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_MASK   (0x000000C0U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_MASK   (0x00003F00U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_MAX   (0x0000003FU)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_MASK   (0xFFFFC000U)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_MAX   (0x0003FFFFU)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTONGOING   (0x0U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTCOMP   (0x1U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MASK   (0x0000001EU)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTONGOING   (0x0U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTCOMP   (0x1U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_MASK   (0x000001E0U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_VAL_RSTONGOING   (0x0U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_VAL_RSTCOMP   (0x1U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MASK   (0x00000200U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_SHIFT   (0x00000009U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_NOTIDLE   (0x0U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_IDLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_MASK   (0xFFFFFC00U)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_MAX   (0x003FFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREEN   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREDIS   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MASK   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MASK   (0x0000003CU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MASK   (0x00000040U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MASK   (0x00000180U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_SHIFT   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MASK   (0xFFFFFE00U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_SHIFT   (0x00000009U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MAX   (0x007FFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MASK   (0x0000FFF0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MAX   (0x00000FFFU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MASK   (0x000F0000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MASK   (0xFFF00000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MAX   (0x00000FFFU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_MASK   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_MAX   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VID1   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VID2   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_WB   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MASK   (0x00000038U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MAX   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VID1   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VID2   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_WB   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_MASK   (0x000001C0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_MAX   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VID1   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VID2   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_WB   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_MASK   (0x00000E00U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_SHIFT   (0x00000009U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_MAX   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VID1   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VID2   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_WB   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_MASK   (0x00007000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_MAX   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VID1   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VID2   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_WB   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_MASK   (0x1FFF8000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_MAX   (0x00003FFFU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_MASK   (0x20000000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_SHIFT   (0x0000001DU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_MASK   (0x40000000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_SHIFT   (0x0000001EU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MASK   (0x80000000U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_SHIFT   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_INDIVIDUALPIPE   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_ALLPIPES   (0x1U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_MASK   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_MAX   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_MASK   (0x00000038U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_MAX   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_MASK   (0x00000040U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_MASK   (0x00000180U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_SHIFT   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_MASK   (0xFFFFFE00U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_SHIFT   (0x00000009U)
 
#define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_MAX   (0x007FFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_VAL_DBGDIS   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_VAL_DBGEN   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_MASK   (0x000001FEU)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_MAX   (0x000000FFU)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VID1SEL   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL1SEL   (0x8U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VID2SEL   (0x10U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL2SEL   (0x18U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_WBSEL   (0x20U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR1SEL   (0x21U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR2SEL   (0x22U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR3SEL   (0x23U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR4SEL   (0x24U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP1SEL   (0x25U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP2SEL   (0x27U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP3SEL   (0x29U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP4SEL   (0x2BU)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_MISCSEL   (0x2DU)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_MASK   (0xFFFFFE00U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_SHIFT   (0x00000009U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_MAX   (0x007FFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGEN   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGDIS   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_MASK   (0x00000006U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_MASK   (0x00000078U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGEN   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGDIS   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_MASK   (0x00000F80U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_SHIFT   (0x00000007U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_VAL_CLKGATINGEN   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_VAL_CLKGATINGDIS   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_MASK   (0x0003C000U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGEN   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGDIS   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_MASK   (0x003C0000U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_SHIFT   (0x00000012U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_VAL_CLKGATINGEN   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_VAL_CLKGATINGDIS   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_MASK   (0xFFC00000U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_SHIFT   (0x00000016U)
 
#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_MAX   (0x000003FFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_VAL_8XE   (0x0U)
 
#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_VAL_8XT   (0x1U)
 
#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_NULL   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP1   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP2   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP3   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP4   (0x8U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_NULL   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP1   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP2   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP3   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP4   (0x8U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_MASK   (0x001F0000U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_NULL   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_VIDL2   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR1   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR2   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR3   (0x8U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR4   (0x10U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_MASK   (0x0F000000U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_SHIFT   (0x00000018U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_NULL   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP1   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP2   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP3   (0x4U)
 
#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP4   (0x8U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_VAL_MSSBYPASS   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_VAL_MSSENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_MASK   (0x00000006U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_MERGEENB   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_SPLITENB   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_SYNCENB   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_VAL_OE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_VAL_LR   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_VAL_MSSBYPASS   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_VAL_MSSENABLE   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_MASK   (0x00000006U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_MAX   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_MERGEENB   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_SPLITENB   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_SYNCENB   (0x2U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_VAL_OE   (0x0U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_VAL_LR   (0x1U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_MASK   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_MASK   (0x000003E0U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_MASK   (0x00007C00U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_MASK   (0x000F8000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_MASK   (0x01F00000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_SHIFT   (0x00000014U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_MASK   (0xFE000000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_SHIFT   (0x00000019U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_MAX   (0x0000007FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_MASK   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_MASK   (0x000003E0U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_MASK   (0x00007C00U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_MASK   (0x000F8000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_MASK   (0x01F00000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_SHIFT   (0x00000014U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_MASK   (0xFE000000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_SHIFT   (0x00000019U)
 
#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_MAX   (0x0000007FU)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_VAL_PIPEGODIS   (0x0U)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_VAL_PIPEGOEN   (0x1U)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW   (0x00000028U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS   (0x0000002CU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET   (0x00000030U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR   (0x00000034U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0   (0x00000038U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1   (0x0000003CU)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2   (0x00000040U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3   (0x00000044U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0   (0x00000048U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1   (0x0000004CU)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2   (0x00000050U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3   (0x00000054U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0   (0x00000058U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1   (0x0000005CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2   (0x00000060U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3   (0x00000064U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0   (0x00000068U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1   (0x0000006CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2   (0x00000070U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3   (0x00000074U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE   (0x00000078U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS   (0x0000007CU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC   (0x00000080U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY   (0x00000084U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY   (0x00000088U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES   (0x00000020U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2   (0x00000024U)
 
#define CSL_DSS_VIDL1_BA_0   (0x00000028U)
 
#define CSL_DSS_VIDL1_BA_1   (0x0000002CU)
 
#define CSL_DSS_VIDL1_BA_UV_0   (0x00000030U)
 
#define CSL_DSS_VIDL1_BA_UV_1   (0x00000034U)
 
#define CSL_DSS_VIDL1_BUF_SIZE_STATUS   (0x00000038U)
 
#define CSL_DSS_VIDL1_BUF_THRESHOLD   (0x0000003CU)
 
#define CSL_DSS_VIDL1_CSC_COEF0   (0x00000040U)
 
#define CSL_DSS_VIDL1_CSC_COEF1   (0x00000044U)
 
#define CSL_DSS_VIDL1_CSC_COEF2   (0x00000048U)
 
#define CSL_DSS_VIDL1_CSC_COEF3   (0x0000004CU)
 
#define CSL_DSS_VIDL1_CSC_COEF4   (0x00000050U)
 
#define CSL_DSS_VIDL1_CSC_COEF5   (0x00000054U)
 
#define CSL_DSS_VIDL1_CSC_COEF6   (0x00000058U)
 
#define CSL_DSS_VIDL1_GLOBAL_ALPHA   (0x000001FCU)
 
#define CSL_DSS_VIDL1_MFLAG_THRESHOLD   (0x00000208U)
 
#define CSL_DSS_VIDL1_PICTURE_SIZE   (0x0000020CU)
 
#define CSL_DSS_VIDL1_PIXEL_INC   (0x00000210U)
 
#define CSL_DSS_VIDL1_PRELOAD   (0x00000218U)
 
#define CSL_DSS_VIDL1_ROW_INC   (0x0000021CU)
 
#define CSL_DSS_VIDL1_BA_EXT_0   (0x0000022CU)
 
#define CSL_DSS_VIDL1_BA_EXT_1   (0x00000230U)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_0   (0x00000234U)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_1   (0x00000238U)
 
#define CSL_DSS_VIDL1_CSC_COEF7   (0x0000023CU)
 
#define CSL_DSS_VIDL1_ROW_INC_UV   (0x00000248U)
 
#define CSL_DSS_VIDL1_TILE   (0x0000024CU)
 
#define CSL_DSS_VIDL1_TILE2   (0x00000250U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES   (0x00000254U)
 
#define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR   (0x00000258U)
 
#define CSL_DSS_VIDL1_CLUT_0   (0x00000260U)
 
#define CSL_DSS_VIDL1_CLUT_1   (0x00000264U)
 
#define CSL_DSS_VIDL1_CLUT_2   (0x00000268U)
 
#define CSL_DSS_VIDL1_CLUT_3   (0x0000026CU)
 
#define CSL_DSS_VIDL1_CLUT_4   (0x00000270U)
 
#define CSL_DSS_VIDL1_CLUT_5   (0x00000274U)
 
#define CSL_DSS_VIDL1_CLUT_6   (0x00000278U)
 
#define CSL_DSS_VIDL1_CLUT_7   (0x0000027CU)
 
#define CSL_DSS_VIDL1_CLUT_8   (0x00000280U)
 
#define CSL_DSS_VIDL1_CLUT_9   (0x00000284U)
 
#define CSL_DSS_VIDL1_CLUT_10   (0x00000288U)
 
#define CSL_DSS_VIDL1_CLUT_11   (0x0000028CU)
 
#define CSL_DSS_VIDL1_CLUT_12   (0x00000290U)
 
#define CSL_DSS_VIDL1_CLUT_13   (0x00000294U)
 
#define CSL_DSS_VIDL1_CLUT_14   (0x00000298U)
 
#define CSL_DSS_VIDL1_CLUT_15   (0x0000029CU)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES   (0x000002A0U)
 
#define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE   (0x000002A4U)
 
#define CSL_DSS_VIDL1_SAFETY_POSITION   (0x000002A8U)
 
#define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE   (0x000002ACU)
 
#define CSL_DSS_VIDL1_SAFETY_SIZE   (0x000002B0U)
 
#define CSL_DSS_VIDL1_SAFETY_LFSR_SEED   (0x000002B4U)
 
#define CSL_DSS_VIDL1_LUMAKEY   (0x000002B8U)
 
#define CSL_DSS_VIDL1_DMA_BUFSIZE   (0x000002BCU)
 
#define CSL_DSS_VIDL1_CROP   (0x000002C0U)
 
#define CSL_DSS_VIDL1_SECURE   (0x000002C4U)
 
#define CSL_DSS_VIDL1_PIPE_GO   (0x000002C8U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEOENB   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEODIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR24P_888   (0xCU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010   (0xEU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010   (0xFU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP1   (0x12U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP2   (0x13U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP4   (0x14U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP8   (0x15U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010   (0x2EU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010   (0x2FU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MASK   (0x00000180U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_SHIFT   (0x00000007U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MAX   (0x00000003U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000200U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x00000009U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MASK   (0x00000400U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MASK   (0x00000800U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MASK   (0x00001000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_FLIP   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_NOFLIP   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_MASK   (0x00002000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_VAL_CROPEN   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_VAL_CROPDIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MASK   (0x0001C000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MASK   (0x00020000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT   (0x00000011U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MASK   (0x00040000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_SHIFT   (0x00000012U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MASK   (0x00080000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_SHIFT   (0x00000013U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MASK   (0x00100000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MASK   (0x00200000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_SHIFT   (0x00000015U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MASK   (0x00400000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_SHIFT   (0x00000016U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MASK   (0x01000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_SHIFT   (0x00000018U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MASK   (0x0E000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_SHIFT   (0x00000019U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MASK   (0x10000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_MASK   (0x20000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT   (0x0000001DU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MASK   (0x40000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MASK   (0x0000000EU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK   (0x00000070U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT   (0x00000004U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_MASK   (0x01F00000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_MASK   (0x02000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_SHIFT   (0x00000019U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY   (0x0U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY   (0x1U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_BA_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BA_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BA_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BA_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BA_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BA_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BA_UV_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BA_UV_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_VIDL1_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_VIDL1_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_VIDL1_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_VIDL1_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MASK   (0x000000FFU)
 
#define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MAX   (0x000000FFU)
 
#define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MASK   (0xFFFFFF00U)
 
#define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_SHIFT   (0x00000008U)
 
#define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MASK   (0x000000FFU)
 
#define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MAX   (0x000000FFU)
 
#define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MASK   (0xFFFFFF00U)
 
#define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_SHIFT   (0x00000008U)
 
#define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VIDL1_PRELOAD_PRELOAD_MASK   (0x00000FFFU)
 
#define CSL_DSS_VIDL1_PRELOAD_PRELOAD_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_PRELOAD_PRELOAD_MAX   (0x00000FFFU)
 
#define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MASK   (0xFFFFF000U)
 
#define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VIDL1_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_ROW_INC_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_TILE_TILEINDEX_MASK   (0x007FFFFFU)
 
#define CSL_DSS_VIDL1_TILE_TILEINDEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_TILE_TILEINDEX_MAX   (0x007FFFFFU)
 
#define CSL_DSS_VIDL1_TILE2_NUM_TILES_MASK   (0x007FFFFFU)
 
#define CSL_DSS_VIDL1_TILE2_NUM_TILES_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_TILE2_NUM_TILES_MAX   (0x007FFFFFU)
 
#define CSL_DSS_VIDL1_TILE2_RESERVED_MASK   (0xFF800000U)
 
#define CSL_DSS_VIDL1_TILE2_RESERVED_SHIFT   (0x00000017U)
 
#define CSL_DSS_VIDL1_TILE2_RESERVED_MAX   (0x000001FFU)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_MASK   (0x000000FEU)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_MAX   (0x0000007FU)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8   (0xCU)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10   (0xEU)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_MASK   (0x00000300U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_SHIFT   (0x00000008U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_MAX   (0x00000003U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4   (0x2U)
 
#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2   (0x3U)
 
#define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_0_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_0_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_0_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_0_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_1_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_1_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_1_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_1_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_2_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_2_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_2_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_2_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_3_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_3_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_3_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_3_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_4_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_4_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_4_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_4_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_5_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_5_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_5_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_5_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_6_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_6_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_6_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_6_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_7_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_7_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_7_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_7_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_8_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_8_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_8_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_8_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_9_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_9_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_9_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_9_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_10_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_10_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_10_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_10_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_11_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_11_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_11_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_11_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_12_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_12_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_12_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_12_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_13_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_13_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_13_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_13_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_14_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_14_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_14_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_14_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL1_CLUT_15_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL1_CLUT_15_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL1_CLUT_15_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CLUT_15_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)
 
#define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MASK   (0x00000FFFU)
 
#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MAX   (0x00000FFFU)
 
#define CSL_DSS_VIDL1_LUMAKEY_RESERVED_MASK   (0x0000F000U)
 
#define CSL_DSS_VIDL1_LUMAKEY_RESERVED_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VIDL1_LUMAKEY_RESERVED_MAX   (0x0000000FU)
 
#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MASK   (0x0FFF0000U)
 
#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MAX   (0x00000FFFU)
 
#define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MASK   (0xF0000000U)
 
#define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MAX   (0x0000000FU)
 
#define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_MASK   (0x0000001FU)
 
#define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_VIDL1_CROP_CROPLEFT_MASK   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CROP_CROPLEFT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_CROP_CROPLEFT_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CROP_CROPRIGHT_MASK   (0x00001F00U)
 
#define CSL_DSS_VIDL1_CROP_CROPRIGHT_SHIFT   (0x00000008U)
 
#define CSL_DSS_VIDL1_CROP_CROPRIGHT_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CROP_CROPTOP_MASK   (0x001F0000U)
 
#define CSL_DSS_VIDL1_CROP_CROPTOP_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL1_CROP_CROPTOP_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_CROP_CROPBOTTOM_MASK   (0x1F000000U)
 
#define CSL_DSS_VIDL1_CROP_CROPBOTTOM_SHIFT   (0x00000018U)
 
#define CSL_DSS_VIDL1_CROP_CROPBOTTOM_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL1_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL1_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_VIDL1_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_VIDL1_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VIDL1_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL1_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_VIDL1_PIPE_GO_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VIDL1_PIPE_GO_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL1_PIPE_GO_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES   (0x00000020U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2   (0x00000024U)
 
#define CSL_DSS_VIDL2_BA_0   (0x00000028U)
 
#define CSL_DSS_VIDL2_BA_1   (0x0000002CU)
 
#define CSL_DSS_VIDL2_BA_UV_0   (0x00000030U)
 
#define CSL_DSS_VIDL2_BA_UV_1   (0x00000034U)
 
#define CSL_DSS_VIDL2_BUF_SIZE_STATUS   (0x00000038U)
 
#define CSL_DSS_VIDL2_BUF_THRESHOLD   (0x0000003CU)
 
#define CSL_DSS_VIDL2_CSC_COEF0   (0x00000040U)
 
#define CSL_DSS_VIDL2_CSC_COEF1   (0x00000044U)
 
#define CSL_DSS_VIDL2_CSC_COEF2   (0x00000048U)
 
#define CSL_DSS_VIDL2_CSC_COEF3   (0x0000004CU)
 
#define CSL_DSS_VIDL2_CSC_COEF4   (0x00000050U)
 
#define CSL_DSS_VIDL2_CSC_COEF5   (0x00000054U)
 
#define CSL_DSS_VIDL2_CSC_COEF6   (0x00000058U)
 
#define CSL_DSS_VIDL2_GLOBAL_ALPHA   (0x000001FCU)
 
#define CSL_DSS_VIDL2_MFLAG_THRESHOLD   (0x00000208U)
 
#define CSL_DSS_VIDL2_PICTURE_SIZE   (0x0000020CU)
 
#define CSL_DSS_VIDL2_PIXEL_INC   (0x00000210U)
 
#define CSL_DSS_VIDL2_PRELOAD   (0x00000218U)
 
#define CSL_DSS_VIDL2_ROW_INC   (0x0000021CU)
 
#define CSL_DSS_VIDL2_BA_EXT_0   (0x0000022CU)
 
#define CSL_DSS_VIDL2_BA_EXT_1   (0x00000230U)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_0   (0x00000234U)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_1   (0x00000238U)
 
#define CSL_DSS_VIDL2_CSC_COEF7   (0x0000023CU)
 
#define CSL_DSS_VIDL2_ROW_INC_UV   (0x00000248U)
 
#define CSL_DSS_VIDL2_TILE   (0x0000024CU)
 
#define CSL_DSS_VIDL2_TILE2   (0x00000250U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES   (0x00000254U)
 
#define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR   (0x00000258U)
 
#define CSL_DSS_VIDL2_CLUT_0   (0x00000260U)
 
#define CSL_DSS_VIDL2_CLUT_1   (0x00000264U)
 
#define CSL_DSS_VIDL2_CLUT_2   (0x00000268U)
 
#define CSL_DSS_VIDL2_CLUT_3   (0x0000026CU)
 
#define CSL_DSS_VIDL2_CLUT_4   (0x00000270U)
 
#define CSL_DSS_VIDL2_CLUT_5   (0x00000274U)
 
#define CSL_DSS_VIDL2_CLUT_6   (0x00000278U)
 
#define CSL_DSS_VIDL2_CLUT_7   (0x0000027CU)
 
#define CSL_DSS_VIDL2_CLUT_8   (0x00000280U)
 
#define CSL_DSS_VIDL2_CLUT_9   (0x00000284U)
 
#define CSL_DSS_VIDL2_CLUT_10   (0x00000288U)
 
#define CSL_DSS_VIDL2_CLUT_11   (0x0000028CU)
 
#define CSL_DSS_VIDL2_CLUT_12   (0x00000290U)
 
#define CSL_DSS_VIDL2_CLUT_13   (0x00000294U)
 
#define CSL_DSS_VIDL2_CLUT_14   (0x00000298U)
 
#define CSL_DSS_VIDL2_CLUT_15   (0x0000029CU)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES   (0x000002A0U)
 
#define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE   (0x000002A4U)
 
#define CSL_DSS_VIDL2_SAFETY_POSITION   (0x000002A8U)
 
#define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE   (0x000002ACU)
 
#define CSL_DSS_VIDL2_SAFETY_SIZE   (0x000002B0U)
 
#define CSL_DSS_VIDL2_SAFETY_LFSR_SEED   (0x000002B4U)
 
#define CSL_DSS_VIDL2_LUMAKEY   (0x000002B8U)
 
#define CSL_DSS_VIDL2_DMA_BUFSIZE   (0x000002BCU)
 
#define CSL_DSS_VIDL2_CROP   (0x000002C0U)
 
#define CSL_DSS_VIDL2_SECURE   (0x000002C4U)
 
#define CSL_DSS_VIDL2_PIPE_GO   (0x000002C8U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_VAL_VIDEOENB   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_VAL_VIDEODIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR24P_888   (0xCU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010   (0xEU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010   (0xFU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP1   (0x12U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP2   (0x13U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP4   (0x14U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP8   (0x15U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010   (0x2EU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010   (0x2FU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_MASK   (0x00000180U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_SHIFT   (0x00000007U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_MAX   (0x00000003U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000200U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x00000009U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_MASK   (0x00000400U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_MASK   (0x00000800U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_MASK   (0x00001000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_VAL_FLIP   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_VAL_NOFLIP   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_MASK   (0x00002000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_VAL_CROPEN   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_VAL_CROPDIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_MASK   (0x0001C000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_MASK   (0x00020000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_SHIFT   (0x00000011U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_MASK   (0x00040000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_SHIFT   (0x00000012U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_MASK   (0x00080000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_SHIFT   (0x00000013U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_MASK   (0x00100000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_MASK   (0x00200000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_SHIFT   (0x00000015U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_MASK   (0x00400000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_SHIFT   (0x00000016U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_MASK   (0x01000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_SHIFT   (0x00000018U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_MASK   (0x0E000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_SHIFT   (0x00000019U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_MASK   (0x10000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_MASK   (0x20000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT   (0x0000001DU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_MASK   (0x40000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_MASK   (0x0000000EU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_MASK   (0x00000070U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT   (0x00000004U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_MASK   (0x01F00000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_MASK   (0x02000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_SHIFT   (0x00000019U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY   (0x0U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY   (0x1U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_BA_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BA_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BA_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BA_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BA_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BA_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BA_UV_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BA_UV_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_VIDL2_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_VIDL2_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_VIDL2_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_VIDL2_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_MASK   (0x000000FFU)
 
#define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_MAX   (0x000000FFU)
 
#define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_MASK   (0xFFFFFF00U)
 
#define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_SHIFT   (0x00000008U)
 
#define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_MASK   (0x000000FFU)
 
#define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_MAX   (0x000000FFU)
 
#define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_MASK   (0xFFFFFF00U)
 
#define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_SHIFT   (0x00000008U)
 
#define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VIDL2_PRELOAD_PRELOAD_MASK   (0x00000FFFU)
 
#define CSL_DSS_VIDL2_PRELOAD_PRELOAD_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_PRELOAD_PRELOAD_MAX   (0x00000FFFU)
 
#define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_MASK   (0xFFFFF000U)
 
#define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VIDL2_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_ROW_INC_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_TILE_TILEINDEX_MASK   (0x007FFFFFU)
 
#define CSL_DSS_VIDL2_TILE_TILEINDEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_TILE_TILEINDEX_MAX   (0x007FFFFFU)
 
#define CSL_DSS_VIDL2_TILE2_NUM_TILES_MASK   (0x007FFFFFU)
 
#define CSL_DSS_VIDL2_TILE2_NUM_TILES_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_TILE2_NUM_TILES_MAX   (0x007FFFFFU)
 
#define CSL_DSS_VIDL2_TILE2_RESERVED_MASK   (0xFF800000U)
 
#define CSL_DSS_VIDL2_TILE2_RESERVED_SHIFT   (0x00000017U)
 
#define CSL_DSS_VIDL2_TILE2_RESERVED_MAX   (0x000001FFU)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_MASK   (0x000000FEU)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_MAX   (0x0000007FU)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8   (0xCU)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10   (0xEU)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_MASK   (0x00000300U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_SHIFT   (0x00000008U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_MAX   (0x00000003U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4   (0x2U)
 
#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2   (0x3U)
 
#define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_0_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_0_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_0_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_0_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_1_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_1_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_1_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_1_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_2_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_2_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_2_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_2_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_3_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_3_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_3_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_3_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_4_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_4_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_4_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_4_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_5_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_5_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_5_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_5_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_6_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_6_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_6_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_6_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_7_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_7_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_7_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_7_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_8_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_8_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_8_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_8_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_9_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_9_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_9_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_9_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_10_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_10_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_10_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_10_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_11_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_11_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_11_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_11_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_12_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_12_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_12_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_12_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_13_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_13_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_13_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_13_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_14_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_14_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_14_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_14_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VIDL2_CLUT_15_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VIDL2_CLUT_15_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VIDL2_CLUT_15_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CLUT_15_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)
 
#define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_MASK   (0x00000FFFU)
 
#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_MAX   (0x00000FFFU)
 
#define CSL_DSS_VIDL2_LUMAKEY_RESERVED_MASK   (0x0000F000U)
 
#define CSL_DSS_VIDL2_LUMAKEY_RESERVED_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VIDL2_LUMAKEY_RESERVED_MAX   (0x0000000FU)
 
#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_MASK   (0x0FFF0000U)
 
#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_MAX   (0x00000FFFU)
 
#define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_MASK   (0xF0000000U)
 
#define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_MAX   (0x0000000FU)
 
#define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_MASK   (0x0000001FU)
 
#define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_VIDL2_CROP_CROPLEFT_MASK   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CROP_CROPLEFT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_CROP_CROPLEFT_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CROP_CROPRIGHT_MASK   (0x00001F00U)
 
#define CSL_DSS_VIDL2_CROP_CROPRIGHT_SHIFT   (0x00000008U)
 
#define CSL_DSS_VIDL2_CROP_CROPRIGHT_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CROP_CROPTOP_MASK   (0x001F0000U)
 
#define CSL_DSS_VIDL2_CROP_CROPTOP_SHIFT   (0x00000010U)
 
#define CSL_DSS_VIDL2_CROP_CROPTOP_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_CROP_CROPBOTTOM_MASK   (0x1F000000U)
 
#define CSL_DSS_VIDL2_CROP_CROPBOTTOM_SHIFT   (0x00000018U)
 
#define CSL_DSS_VIDL2_CROP_CROPBOTTOM_MAX   (0x0000001FU)
 
#define CSL_DSS_VIDL2_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL2_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_VIDL2_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_VIDL2_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VIDL2_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL2_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_MASK   (0x00000001U)
 
#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_VIDL2_PIPE_GO_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VIDL2_PIPE_GO_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VIDL2_PIPE_GO_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VID1_ACCUH_0   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUH_1   (0x00000004U)
 
#define CSL_DSS_VID1_ACCUH2_0   (0x00000008U)
 
#define CSL_DSS_VID1_ACCUH2_1   (0x0000000CU)
 
#define CSL_DSS_VID1_ACCUV_0   (0x00000010U)
 
#define CSL_DSS_VID1_ACCUV_1   (0x00000014U)
 
#define CSL_DSS_VID1_ACCUV2_0   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUV2_1   (0x0000001CU)
 
#define CSL_DSS_VID1_ATTRIBUTES   (0x00000020U)
 
#define CSL_DSS_VID1_ATTRIBUTES2   (0x00000024U)
 
#define CSL_DSS_VID1_BA_0   (0x00000028U)
 
#define CSL_DSS_VID1_BA_1   (0x0000002CU)
 
#define CSL_DSS_VID1_BA_UV_0   (0x00000030U)
 
#define CSL_DSS_VID1_BA_UV_1   (0x00000034U)
 
#define CSL_DSS_VID1_BUF_SIZE_STATUS   (0x00000038U)
 
#define CSL_DSS_VID1_BUF_THRESHOLD   (0x0000003CU)
 
#define CSL_DSS_VID1_CSC_COEF0   (0x00000040U)
 
#define CSL_DSS_VID1_CSC_COEF1   (0x00000044U)
 
#define CSL_DSS_VID1_CSC_COEF2   (0x00000048U)
 
#define CSL_DSS_VID1_CSC_COEF3   (0x0000004CU)
 
#define CSL_DSS_VID1_CSC_COEF4   (0x00000050U)
 
#define CSL_DSS_VID1_CSC_COEF5   (0x00000054U)
 
#define CSL_DSS_VID1_CSC_COEF6   (0x00000058U)
 
#define CSL_DSS_VID1_FIRH   (0x0000005CU)
 
#define CSL_DSS_VID1_FIRH2   (0x00000060U)
 
#define CSL_DSS_VID1_FIRV   (0x00000064U)
 
#define CSL_DSS_VID1_FIRV2   (0x00000068U)
 
#define CSL_DSS_VID1_FIR_COEF_H0(index)   (0x0000006CU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID1_FIR_COEF_H0_C(index)   (0x00000090U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID1_FIR_COEF_H12(index)   (0x000000B4U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID1_FIR_COEF_H12_C(index)   (0x000000F4U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID1_FIR_COEF_V0(index)   (0x00000134U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID1_FIR_COEF_V0_C(index)   (0x00000158U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID1_FIR_COEF_V12(index)   (0x0000017CU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID1_FIR_COEF_V12_C(index)   (0x000001BCU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID1_GLOBAL_ALPHA   (0x000001FCU)
 
#define CSL_DSS_VID1_MFLAG_THRESHOLD   (0x00000208U)
 
#define CSL_DSS_VID1_PICTURE_SIZE   (0x0000020CU)
 
#define CSL_DSS_VID1_PIXEL_INC   (0x00000210U)
 
#define CSL_DSS_VID1_PRELOAD   (0x00000218U)
 
#define CSL_DSS_VID1_ROW_INC   (0x0000021CU)
 
#define CSL_DSS_VID1_SIZE   (0x00000220U)
 
#define CSL_DSS_VID1_BA_EXT_0   (0x0000022CU)
 
#define CSL_DSS_VID1_BA_EXT_1   (0x00000230U)
 
#define CSL_DSS_VID1_BA_UV_EXT_0   (0x00000234U)
 
#define CSL_DSS_VID1_BA_UV_EXT_1   (0x00000238U)
 
#define CSL_DSS_VID1_CSC_COEF7   (0x0000023CU)
 
#define CSL_DSS_VID1_ROW_INC_UV   (0x00000248U)
 
#define CSL_DSS_VID1_TILE   (0x0000024CU)
 
#define CSL_DSS_VID1_TILE2   (0x00000250U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES   (0x00000254U)
 
#define CSL_DSS_VID1_FBDC_CLEAR_COLOR   (0x00000258U)
 
#define CSL_DSS_VID1_CLUT_0   (0x00000260U)
 
#define CSL_DSS_VID1_CLUT_1   (0x00000264U)
 
#define CSL_DSS_VID1_CLUT_2   (0x00000268U)
 
#define CSL_DSS_VID1_CLUT_3   (0x0000026CU)
 
#define CSL_DSS_VID1_CLUT_4   (0x00000270U)
 
#define CSL_DSS_VID1_CLUT_5   (0x00000274U)
 
#define CSL_DSS_VID1_CLUT_6   (0x00000278U)
 
#define CSL_DSS_VID1_CLUT_7   (0x0000027CU)
 
#define CSL_DSS_VID1_CLUT_8   (0x00000280U)
 
#define CSL_DSS_VID1_CLUT_9   (0x00000284U)
 
#define CSL_DSS_VID1_CLUT_10   (0x00000288U)
 
#define CSL_DSS_VID1_CLUT_11   (0x0000028CU)
 
#define CSL_DSS_VID1_CLUT_12   (0x00000290U)
 
#define CSL_DSS_VID1_CLUT_13   (0x00000294U)
 
#define CSL_DSS_VID1_CLUT_14   (0x00000298U)
 
#define CSL_DSS_VID1_CLUT_15   (0x0000029CU)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES   (0x000002A0U)
 
#define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE   (0x000002A4U)
 
#define CSL_DSS_VID1_SAFETY_POSITION   (0x000002A8U)
 
#define CSL_DSS_VID1_SAFETY_REF_SIGNATURE   (0x000002ACU)
 
#define CSL_DSS_VID1_SAFETY_SIZE   (0x000002B0U)
 
#define CSL_DSS_VID1_SAFETY_LFSR_SEED   (0x000002B4U)
 
#define CSL_DSS_VID1_LUMAKEY   (0x000002B8U)
 
#define CSL_DSS_VID1_DMA_BUFSIZE   (0x000002BCU)
 
#define CSL_DSS_VID1_CROP   (0x000002C0U)
 
#define CSL_DSS_VID1_SECURE   (0x000002C4U)
 
#define CSL_DSS_VID1_PIPE_GO   (0x000002C8U)
 
#define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUH_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_ACCUH_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUH_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUH_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_ACCUH_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUH_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUH2_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_ACCUH2_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUH2_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUH2_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_ACCUH2_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUH2_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUV_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_ACCUV_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUV_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUV_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_ACCUV_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUV_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUV2_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_ACCUV2_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUV2_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_ACCUV2_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_ACCUV2_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ACCUV2_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_VAL_VIDEOENB   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_VAL_VIDEODIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR24P_888   (0xCU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010   (0xEU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010   (0xFU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP1   (0x12U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP2   (0x13U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP4   (0x14U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP8   (0x15U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010   (0x2EU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010   (0x2FU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_MASK   (0x00000180U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE   (0x2U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE   (0x3U)
 
#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000200U)
 
#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x00000009U)
 
#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_MASK   (0x00000400U)
 
#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_MASK   (0x00000800U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FLIP_MASK   (0x00001000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FLIP_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VID1_ATTRIBUTES_FLIP_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FLIP_VAL_FLIP   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_FLIP_VAL_NOFLIP   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_CROP_MASK   (0x00002000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_CROP_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VID1_ATTRIBUTES_CROP_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_CROP_VAL_CROPEN   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_CROP_VAL_CROPDIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_MASK   (0x0001C000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_MASK   (0x00020000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT   (0x00000011U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_MASK   (0x00040000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_SHIFT   (0x00000012U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_MASK   (0x00080000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_SHIFT   (0x00000013U)
 
#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_MASK   (0x00100000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_MASK   (0x00200000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_SHIFT   (0x00000015U)
 
#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_MASK   (0x00400000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_SHIFT   (0x00000016U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_MASK   (0x01000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_MASK   (0x0E000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_SHIFT   (0x00000019U)
 
#define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_MASK   (0x10000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_MASK   (0x20000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT   (0x0000001DU)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_MASK   (0x40000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_MASK   (0x0000000EU)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK   (0x00000070U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT   (0x00000004U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_MASK   (0x0000F800U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_MASK   (0x01F00000U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_MASK   (0x02000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_SHIFT   (0x00000019U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY   (0x0U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY   (0x1U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_VID1_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_BA_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_BA_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BA_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_BA_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_BA_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BA_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_BA_UV_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_BA_UV_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BA_UV_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_BA_UV_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_BA_UV_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BA_UV_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_VID1_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_VID1_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_VID1_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_VID1_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_VID1_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID1_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VID1_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID1_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID1_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VID1_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID1_FIRH_FIRHINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_FIRH_FIRHINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIRH_FIRHINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_FIRH_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_FIRH_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_FIRH_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_FIRH2_FIRHINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_FIRH2_FIRHINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIRH2_FIRHINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_FIRH2_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_FIRH2_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_FIRH2_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_FIRV_FIRVINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_FIRV_FIRVINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIRV_FIRVINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_FIRV_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_FIRV_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_FIRV_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_FIRV2_FIRVINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_FIRV2_FIRVINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIRV2_FIRVINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_FIRV2_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID1_FIRV2_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_FIRV2_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_MASK   (0x000000FFU)
 
#define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_MASK   (0xFFFFFF00U)
 
#define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_SHIFT   (0x00000008U)
 
#define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID1_PIXEL_INC_PIXELINC_MASK   (0x000000FFU)
 
#define CSL_DSS_VID1_PIXEL_INC_PIXELINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_PIXEL_INC_PIXELINC_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_MASK   (0xFFFFFF00U)
 
#define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_SHIFT   (0x00000008U)
 
#define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID1_PRELOAD_PRELOAD_MASK   (0x00000FFFU)
 
#define CSL_DSS_VID1_PRELOAD_PRELOAD_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_PRELOAD_PRELOAD_MAX   (0x00000FFFU)
 
#define CSL_DSS_VID1_PRELOAD_RESERVED_212_MASK   (0xFFFFF000U)
 
#define CSL_DSS_VID1_PRELOAD_RESERVED_212_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VID1_PRELOAD_RESERVED_212_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID1_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_ROW_INC_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VID1_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID1_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VID1_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID1_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID1_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID1_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID1_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID1_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VID1_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID1_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_TILE_TILEINDEX_MASK   (0x007FFFFFU)
 
#define CSL_DSS_VID1_TILE_TILEINDEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_TILE_TILEINDEX_MAX   (0x007FFFFFU)
 
#define CSL_DSS_VID1_TILE2_NUM_TILES_MASK   (0x007FFFFFU)
 
#define CSL_DSS_VID1_TILE2_NUM_TILES_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_TILE2_NUM_TILES_MAX   (0x007FFFFFU)
 
#define CSL_DSS_VID1_TILE2_RESERVED_MASK   (0xFF800000U)
 
#define CSL_DSS_VID1_TILE2_RESERVED_SHIFT   (0x00000017U)
 
#define CSL_DSS_VID1_TILE2_RESERVED_MAX   (0x000001FFU)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_MASK   (0x000000FEU)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_MAX   (0x0000007FU)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8   (0xCU)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10   (0xEU)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_MASK   (0x00000300U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_SHIFT   (0x00000008U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4   (0x2U)
 
#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2   (0x3U)
 
#define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_0_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_0_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_0_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_0_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_1_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_1_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_1_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_1_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_2_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_2_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_2_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_2_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_3_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_3_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_3_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_3_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_4_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_4_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_4_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_4_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_5_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_5_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_5_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_5_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_6_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_6_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_6_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_6_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_7_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_7_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_7_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_7_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_8_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_8_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_8_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_8_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_9_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_9_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_9_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_9_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_10_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_10_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_10_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_10_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_11_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_11_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_11_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_11_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_12_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_12_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_12_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_12_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_13_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_13_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_13_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_13_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_14_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_14_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_14_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_14_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID1_CLUT_15_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID1_CLUT_15_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID1_CLUT_15_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID1_CLUT_15_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)
 
#define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VID1_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID1_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VID1_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_MASK   (0x00000FFFU)
 
#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_MAX   (0x00000FFFU)
 
#define CSL_DSS_VID1_LUMAKEY_RESERVED_MASK   (0x0000F000U)
 
#define CSL_DSS_VID1_LUMAKEY_RESERVED_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VID1_LUMAKEY_RESERVED_MAX   (0x0000000FU)
 
#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_MASK   (0x0FFF0000U)
 
#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_MAX   (0x00000FFFU)
 
#define CSL_DSS_VID1_LUMAKEY_RESERVED1_MASK   (0xF0000000U)
 
#define CSL_DSS_VID1_LUMAKEY_RESERVED1_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VID1_LUMAKEY_RESERVED1_MAX   (0x0000000FU)
 
#define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_MASK   (0x0000001FU)
 
#define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_VID1_CROP_CROPLEFT_MASK   (0x0000001FU)
 
#define CSL_DSS_VID1_CROP_CROPLEFT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_CROP_CROPLEFT_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CROP_CROPRIGHT_MASK   (0x00001F00U)
 
#define CSL_DSS_VID1_CROP_CROPRIGHT_SHIFT   (0x00000008U)
 
#define CSL_DSS_VID1_CROP_CROPRIGHT_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CROP_CROPTOP_MASK   (0x001F0000U)
 
#define CSL_DSS_VID1_CROP_CROPTOP_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID1_CROP_CROPTOP_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_CROP_CROPBOTTOM_MASK   (0x1F000000U)
 
#define CSL_DSS_VID1_CROP_CROPBOTTOM_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID1_CROP_CROPBOTTOM_MAX   (0x0000001FU)
 
#define CSL_DSS_VID1_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_VID1_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_VID1_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_VID1_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VID1_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID1_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VID1_PIPE_GO_GOBIT_MASK   (0x00000001U)
 
#define CSL_DSS_VID1_PIPE_GO_GOBIT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID1_PIPE_GO_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_VID1_PIPE_GO_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_VID1_PIPE_GO_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_VID1_PIPE_GO_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VID1_PIPE_GO_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID1_PIPE_GO_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VID2_ACCUH_0   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUH_1   (0x00000004U)
 
#define CSL_DSS_VID2_ACCUH2_0   (0x00000008U)
 
#define CSL_DSS_VID2_ACCUH2_1   (0x0000000CU)
 
#define CSL_DSS_VID2_ACCUV_0   (0x00000010U)
 
#define CSL_DSS_VID2_ACCUV_1   (0x00000014U)
 
#define CSL_DSS_VID2_ACCUV2_0   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUV2_1   (0x0000001CU)
 
#define CSL_DSS_VID2_ATTRIBUTES   (0x00000020U)
 
#define CSL_DSS_VID2_ATTRIBUTES2   (0x00000024U)
 
#define CSL_DSS_VID2_BA_0   (0x00000028U)
 
#define CSL_DSS_VID2_BA_1   (0x0000002CU)
 
#define CSL_DSS_VID2_BA_UV_0   (0x00000030U)
 
#define CSL_DSS_VID2_BA_UV_1   (0x00000034U)
 
#define CSL_DSS_VID2_BUF_SIZE_STATUS   (0x00000038U)
 
#define CSL_DSS_VID2_BUF_THRESHOLD   (0x0000003CU)
 
#define CSL_DSS_VID2_CSC_COEF0   (0x00000040U)
 
#define CSL_DSS_VID2_CSC_COEF1   (0x00000044U)
 
#define CSL_DSS_VID2_CSC_COEF2   (0x00000048U)
 
#define CSL_DSS_VID2_CSC_COEF3   (0x0000004CU)
 
#define CSL_DSS_VID2_CSC_COEF4   (0x00000050U)
 
#define CSL_DSS_VID2_CSC_COEF5   (0x00000054U)
 
#define CSL_DSS_VID2_CSC_COEF6   (0x00000058U)
 
#define CSL_DSS_VID2_FIRH   (0x0000005CU)
 
#define CSL_DSS_VID2_FIRH2   (0x00000060U)
 
#define CSL_DSS_VID2_FIRV   (0x00000064U)
 
#define CSL_DSS_VID2_FIRV2   (0x00000068U)
 
#define CSL_DSS_VID2_FIR_COEF_H0(index)   (0x0000006CU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID2_FIR_COEF_H0_C(index)   (0x00000090U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID2_FIR_COEF_H12(index)   (0x000000B4U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID2_FIR_COEF_H12_C(index)   (0x000000F4U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID2_FIR_COEF_V0(index)   (0x00000134U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID2_FIR_COEF_V0_C(index)   (0x00000158U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID2_FIR_COEF_V12(index)   (0x0000017CU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID2_FIR_COEF_V12_C(index)   (0x000001BCU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VID2_GLOBAL_ALPHA   (0x000001FCU)
 
#define CSL_DSS_VID2_MFLAG_THRESHOLD   (0x00000208U)
 
#define CSL_DSS_VID2_PICTURE_SIZE   (0x0000020CU)
 
#define CSL_DSS_VID2_PIXEL_INC   (0x00000210U)
 
#define CSL_DSS_VID2_PRELOAD   (0x00000218U)
 
#define CSL_DSS_VID2_ROW_INC   (0x0000021CU)
 
#define CSL_DSS_VID2_SIZE   (0x00000220U)
 
#define CSL_DSS_VID2_BA_EXT_0   (0x0000022CU)
 
#define CSL_DSS_VID2_BA_EXT_1   (0x00000230U)
 
#define CSL_DSS_VID2_BA_UV_EXT_0   (0x00000234U)
 
#define CSL_DSS_VID2_BA_UV_EXT_1   (0x00000238U)
 
#define CSL_DSS_VID2_CSC_COEF7   (0x0000023CU)
 
#define CSL_DSS_VID2_ROW_INC_UV   (0x00000248U)
 
#define CSL_DSS_VID2_TILE   (0x0000024CU)
 
#define CSL_DSS_VID2_TILE2   (0x00000250U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES   (0x00000254U)
 
#define CSL_DSS_VID2_FBDC_CLEAR_COLOR   (0x00000258U)
 
#define CSL_DSS_VID2_CLUT_0   (0x00000260U)
 
#define CSL_DSS_VID2_CLUT_1   (0x00000264U)
 
#define CSL_DSS_VID2_CLUT_2   (0x00000268U)
 
#define CSL_DSS_VID2_CLUT_3   (0x0000026CU)
 
#define CSL_DSS_VID2_CLUT_4   (0x00000270U)
 
#define CSL_DSS_VID2_CLUT_5   (0x00000274U)
 
#define CSL_DSS_VID2_CLUT_6   (0x00000278U)
 
#define CSL_DSS_VID2_CLUT_7   (0x0000027CU)
 
#define CSL_DSS_VID2_CLUT_8   (0x00000280U)
 
#define CSL_DSS_VID2_CLUT_9   (0x00000284U)
 
#define CSL_DSS_VID2_CLUT_10   (0x00000288U)
 
#define CSL_DSS_VID2_CLUT_11   (0x0000028CU)
 
#define CSL_DSS_VID2_CLUT_12   (0x00000290U)
 
#define CSL_DSS_VID2_CLUT_13   (0x00000294U)
 
#define CSL_DSS_VID2_CLUT_14   (0x00000298U)
 
#define CSL_DSS_VID2_CLUT_15   (0x0000029CU)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES   (0x000002A0U)
 
#define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE   (0x000002A4U)
 
#define CSL_DSS_VID2_SAFETY_POSITION   (0x000002A8U)
 
#define CSL_DSS_VID2_SAFETY_REF_SIGNATURE   (0x000002ACU)
 
#define CSL_DSS_VID2_SAFETY_SIZE   (0x000002B0U)
 
#define CSL_DSS_VID2_SAFETY_LFSR_SEED   (0x000002B4U)
 
#define CSL_DSS_VID2_LUMAKEY   (0x000002B8U)
 
#define CSL_DSS_VID2_DMA_BUFSIZE   (0x000002BCU)
 
#define CSL_DSS_VID2_CROP   (0x000002C0U)
 
#define CSL_DSS_VID2_SECURE   (0x000002C4U)
 
#define CSL_DSS_VID2_PIPE_GO   (0x000002C8U)
 
#define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUH_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_ACCUH_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUH_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUH_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_ACCUH_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUH_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUH2_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_ACCUH2_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUH2_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUH2_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_ACCUH2_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUH2_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUV_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_ACCUV_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUV_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUV_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_ACCUV_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUV_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUV2_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_ACCUV2_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUV2_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_ACCUV2_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_ACCUV2_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ACCUV2_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_VAL_VIDEOENB   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_VAL_VIDEODIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR24P_888   (0xCU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010   (0xEU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010   (0xFU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP1   (0x12U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP2   (0x13U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP4   (0x14U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP8   (0x15U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010   (0x2EU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010   (0x2FU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_MASK   (0x00000180U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE   (0x2U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE   (0x3U)
 
#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000200U)
 
#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x00000009U)
 
#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_MASK   (0x00000400U)
 
#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_MASK   (0x00000800U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FLIP_MASK   (0x00001000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FLIP_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VID2_ATTRIBUTES_FLIP_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FLIP_VAL_FLIP   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_FLIP_VAL_NOFLIP   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_CROP_MASK   (0x00002000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_CROP_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VID2_ATTRIBUTES_CROP_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_CROP_VAL_CROPEN   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_CROP_VAL_CROPDIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_MASK   (0x0001C000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_MASK   (0x00020000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_SHIFT   (0x00000011U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_MASK   (0x00040000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_SHIFT   (0x00000012U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_MASK   (0x00080000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_SHIFT   (0x00000013U)
 
#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_MASK   (0x00100000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_MASK   (0x00200000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_SHIFT   (0x00000015U)
 
#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_MASK   (0x00400000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_SHIFT   (0x00000016U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_MASK   (0x01000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_MASK   (0x0E000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_SHIFT   (0x00000019U)
 
#define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_MASK   (0x10000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_MASK   (0x20000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT   (0x0000001DU)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_MASK   (0x40000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_MASK   (0x0000000EU)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_MASK   (0x00000070U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT   (0x00000004U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_MASK   (0x0000F800U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_MASK   (0x01F00000U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_MASK   (0x02000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_SHIFT   (0x00000019U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY   (0x0U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY   (0x1U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_VID2_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_BA_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_BA_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BA_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_BA_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_BA_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BA_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_BA_UV_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_BA_UV_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BA_UV_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_BA_UV_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_BA_UV_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BA_UV_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_VID2_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_VID2_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_VID2_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_VID2_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_VID2_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID2_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VID2_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID2_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID2_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VID2_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID2_FIRH_FIRHINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_FIRH_FIRHINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIRH_FIRHINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_FIRH_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_FIRH_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_FIRH_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_FIRH2_FIRHINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_FIRH2_FIRHINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIRH2_FIRHINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_FIRH2_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_FIRH2_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_FIRH2_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_FIRV_FIRVINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_FIRV_FIRVINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIRV_FIRVINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_FIRV_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_FIRV_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_FIRV_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_FIRV2_FIRVINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_FIRV2_FIRVINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIRV2_FIRVINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_FIRV2_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_VID2_FIRV2_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_FIRV2_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_MASK   (0xC0000000U)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_MASK   (0x000000FFU)
 
#define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_MASK   (0xFFFFFF00U)
 
#define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_SHIFT   (0x00000008U)
 
#define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID2_PIXEL_INC_PIXELINC_MASK   (0x000000FFU)
 
#define CSL_DSS_VID2_PIXEL_INC_PIXELINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_PIXEL_INC_PIXELINC_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_MASK   (0xFFFFFF00U)
 
#define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_SHIFT   (0x00000008U)
 
#define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_VID2_PRELOAD_PRELOAD_MASK   (0x00000FFFU)
 
#define CSL_DSS_VID2_PRELOAD_PRELOAD_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_PRELOAD_PRELOAD_MAX   (0x00000FFFU)
 
#define CSL_DSS_VID2_PRELOAD_RESERVED_212_MASK   (0xFFFFF000U)
 
#define CSL_DSS_VID2_PRELOAD_RESERVED_212_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VID2_PRELOAD_RESERVED_212_MAX   (0x000FFFFFU)
 
#define CSL_DSS_VID2_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_ROW_INC_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VID2_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID2_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VID2_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID2_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID2_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID2_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_VID2_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID2_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VID2_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VID2_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_TILE_TILEINDEX_MASK   (0x007FFFFFU)
 
#define CSL_DSS_VID2_TILE_TILEINDEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_TILE_TILEINDEX_MAX   (0x007FFFFFU)
 
#define CSL_DSS_VID2_TILE2_NUM_TILES_MASK   (0x007FFFFFU)
 
#define CSL_DSS_VID2_TILE2_NUM_TILES_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_TILE2_NUM_TILES_MAX   (0x007FFFFFU)
 
#define CSL_DSS_VID2_TILE2_RESERVED_MASK   (0xFF800000U)
 
#define CSL_DSS_VID2_TILE2_RESERVED_SHIFT   (0x00000017U)
 
#define CSL_DSS_VID2_TILE2_RESERVED_MAX   (0x000001FFU)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_MASK   (0x000000FEU)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_MAX   (0x0000007FU)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8   (0xCU)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10   (0xEU)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_MASK   (0x00000300U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_SHIFT   (0x00000008U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4   (0x2U)
 
#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2   (0x3U)
 
#define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_0_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_0_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_0_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_0_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_1_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_1_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_1_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_1_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_2_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_2_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_2_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_2_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_3_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_3_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_3_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_3_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_4_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_4_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_4_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_4_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_5_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_5_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_5_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_5_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_6_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_6_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_6_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_6_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_7_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_7_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_7_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_7_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_8_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_8_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_8_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_8_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_9_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_9_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_9_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_9_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_10_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_10_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_10_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_10_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_11_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_11_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_11_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_11_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_12_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_12_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_12_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_12_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_13_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_13_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_13_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_13_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_14_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_14_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_14_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_14_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VID2_CLUT_15_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VID2_CLUT_15_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VID2_CLUT_15_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VID2_CLUT_15_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)
 
#define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VID2_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID2_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VID2_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_MASK   (0x00000FFFU)
 
#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_MAX   (0x00000FFFU)
 
#define CSL_DSS_VID2_LUMAKEY_RESERVED_MASK   (0x0000F000U)
 
#define CSL_DSS_VID2_LUMAKEY_RESERVED_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VID2_LUMAKEY_RESERVED_MAX   (0x0000000FU)
 
#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_MASK   (0x0FFF0000U)
 
#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_MAX   (0x00000FFFU)
 
#define CSL_DSS_VID2_LUMAKEY_RESERVED1_MASK   (0xF0000000U)
 
#define CSL_DSS_VID2_LUMAKEY_RESERVED1_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VID2_LUMAKEY_RESERVED1_MAX   (0x0000000FU)
 
#define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_MASK   (0x0000001FU)
 
#define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_VID2_CROP_CROPLEFT_MASK   (0x0000001FU)
 
#define CSL_DSS_VID2_CROP_CROPLEFT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_CROP_CROPLEFT_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CROP_CROPRIGHT_MASK   (0x00001F00U)
 
#define CSL_DSS_VID2_CROP_CROPRIGHT_SHIFT   (0x00000008U)
 
#define CSL_DSS_VID2_CROP_CROPRIGHT_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CROP_CROPTOP_MASK   (0x001F0000U)
 
#define CSL_DSS_VID2_CROP_CROPTOP_SHIFT   (0x00000010U)
 
#define CSL_DSS_VID2_CROP_CROPTOP_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_CROP_CROPBOTTOM_MASK   (0x1F000000U)
 
#define CSL_DSS_VID2_CROP_CROPBOTTOM_SHIFT   (0x00000018U)
 
#define CSL_DSS_VID2_CROP_CROPBOTTOM_MAX   (0x0000001FU)
 
#define CSL_DSS_VID2_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_VID2_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_VID2_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_VID2_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VID2_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID2_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VID2_PIPE_GO_GOBIT_MASK   (0x00000001U)
 
#define CSL_DSS_VID2_PIPE_GO_GOBIT_SHIFT   (0x00000000U)
 
#define CSL_DSS_VID2_PIPE_GO_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_VID2_PIPE_GO_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_VID2_PIPE_GO_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_VID2_PIPE_GO_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VID2_PIPE_GO_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VID2_PIPE_GO_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_OVR1_CONFIG   (0x00000000U)
 
#define CSL_DSS_OVR1_VIRTUALVP   (0x00000004U)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR   (0x00000008U)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR2   (0x0000000CU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX   (0x00000010U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX2   (0x00000014U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN   (0x00000018U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN2   (0x0000001CU)
 
#define CSL_DSS_OVR1_ATTRIBUTES(index)   (0x00000020U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_OVR1_ATTRIBUTES2(index)   (0x00000034U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_OVR1_SECURE   (0x00000048U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED6_MASK   (0x00000001U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED6_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED6_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_CONFIG_COLORBAREN_MASK   (0x00000002U)
 
#define CSL_DSS_OVR1_CONFIG_COLORBAREN_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR1_CONFIG_COLORBAREN_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBARDIS   (0x0U)
 
#define CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBAREN   (0x1U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED_MASK   (0x000003FCU)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED_SHIFT   (0x00000002U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MASK   (0x00000400U)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_DISTCK   (0x0U)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_ENBTCK   (0x1U)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MASK   (0x00000800U)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_SHIFT   (0x0000000BU)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_GDTK   (0x0U)
 
#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_VSTK   (0x1U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED2_MASK   (0x00001000U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED2_SHIFT   (0x0000000CU)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED3_MASK   (0x00002000U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED3_SHIFT   (0x0000000DU)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED1_MASK   (0xFFFFC000U)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED1_SHIFT   (0x0000000EU)
 
#define CSL_DSS_OVR1_CONFIG_RESERVED1_MAX   (0x0003FFFFU)
 
#define CSL_DSS_OVR1_VIRTUALVP_PPL_MASK   (0x00003FFFU)
 
#define CSL_DSS_OVR1_VIRTUALVP_PPL_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_VIRTUALVP_PPL_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR1_VIRTUALVP_LPP_MASK   (0x3FFF0000U)
 
#define CSL_DSS_OVR1_VIRTUALVP_LPP_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR1_VIRTUALVP_LPP_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR1_VIRTUALVP_ENABLE_MASK   (0x80000000U)
 
#define CSL_DSS_OVR1_VIRTUALVP_ENABLE_SHIFT   (0x0000001FU)
 
#define CSL_DSS_OVR1_VIRTUALVP_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MASK   (0x0000FFFFU)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MAX   (0x0000FFFFU)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK   (0x0000000FU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK   (0x0000000FU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_MASK   (0x0000001EU)
 
#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VID1   (0x0U)
 
#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VID2   (0x2U)
 
#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIRTCH   (0x4U)
 
#define CSL_DSS_OVR1_ATTRIBUTES2_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_OVR1_ATTRIBUTES2_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_ATTRIBUTES2_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR1_ATTRIBUTES2_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_OVR1_ATTRIBUTES2_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR1_ATTRIBUTES2_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR1_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_OVR1_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR1_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR1_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_OVR1_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_OVR1_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_OVR1_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR1_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VP1_CONFIG   (0x00000000U)
 
#define CSL_DSS_VP1_CONTROL   (0x00000004U)
 
#define CSL_DSS_VP1_CSC_COEF0   (0x00000008U)
 
#define CSL_DSS_VP1_CSC_COEF1   (0x0000000CU)
 
#define CSL_DSS_VP1_CSC_COEF2   (0x00000010U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0   (0x00000014U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1   (0x00000018U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2   (0x0000001CU)
 
#define CSL_DSS_VP1_LINE_NUMBER   (0x00000044U)
 
#define CSL_DSS_VP1_POL_FREQ   (0x0000004CU)
 
#define CSL_DSS_VP1_SIZE_SCREEN   (0x00000050U)
 
#define CSL_DSS_VP1_TIMING_H   (0x00000054U)
 
#define CSL_DSS_VP1_TIMING_V   (0x00000058U)
 
#define CSL_DSS_VP1_CSC_COEF3   (0x0000005CU)
 
#define CSL_DSS_VP1_CSC_COEF4   (0x00000060U)
 
#define CSL_DSS_VP1_CSC_COEF5   (0x00000064U)
 
#define CSL_DSS_VP1_CSC_COEF6   (0x00000068U)
 
#define CSL_DSS_VP1_CSC_COEF7   (0x0000006CU)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES(index)   (0x00000070U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE(index)   (0x00000090U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP1_SAFETY_POSITION(index)   (0x000000B0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP1_SAFETY_REF_SIGNATURE(index)   (0x000000D0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP1_SAFETY_SIZE(index)   (0x000000F0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP1_SAFETY_LFSR_SEED   (0x00000110U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0   (0x00000120U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1   (0x00000124U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2   (0x00000128U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3   (0x0000012CU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4   (0x00000130U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5   (0x00000134U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6   (0x00000138U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7   (0x0000013CU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8   (0x00000140U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9   (0x00000144U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10   (0x00000148U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11   (0x0000014CU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12   (0x00000150U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13   (0x00000154U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14   (0x00000158U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15   (0x0000015CU)
 
#define CSL_DSS_VP1_DSS_OLDI_CFG   (0x00000160U)
 
#define CSL_DSS_VP1_DSS_OLDI_STATUS   (0x00000164U)
 
#define CSL_DSS_VP1_DSS_OLDI_LB   (0x00000168U)
 
#define CSL_DSS_VP1_SECURE   (0x00000178U)
 
#define CSL_DSS_VP1_CONFIG_PIXELGATED_MASK   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_PIXELGATED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CONFIG_PIXELGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGA   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGV   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MASK   (0x00000002U)
 
#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGDIS   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGENB   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_MASK   (0x00000004U)
 
#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMADIS   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMAENB   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_HDMIMODE_MASK   (0x00000008U)
 
#define CSL_DSS_VP1_CONFIG_HDMIMODE_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP1_CONFIG_HDMIMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MASK   (0x00000010U)
 
#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_SHIFT   (0x00000004U)
 
#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGDIS   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGENB   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MASK   (0x00000020U)
 
#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGENB   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_HSYNCGATED_MASK   (0x00000040U)
 
#define CSL_DSS_VP1_CONFIG_HSYNCGATED_SHIFT   (0x00000006U)
 
#define CSL_DSS_VP1_CONFIG_HSYNCGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGDIS   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGENB   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_VSYNCGATED_MASK   (0x00000080U)
 
#define CSL_DSS_VP1_CONFIG_VSYNCGATED_SHIFT   (0x00000007U)
 
#define CSL_DSS_VP1_CONFIG_VSYNCGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGDIS   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGENB   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MASK   (0x00000100U)
 
#define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_RESERVED1_MASK   (0x00007E00U)
 
#define CSL_DSS_VP1_CONFIG_RESERVED1_SHIFT   (0x00000009U)
 
#define CSL_DSS_VP1_CONFIG_RESERVED1_MAX   (0x0000003FU)
 
#define CSL_DSS_VP1_CONFIG_CPR_MASK   (0x00008000U)
 
#define CSL_DSS_VP1_CONFIG_CPR_SHIFT   (0x0000000FU)
 
#define CSL_DSS_VP1_CONFIG_CPR_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MASK   (0x00010000U)
 
#define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_RESERVED2_MASK   (0x000E0000U)
 
#define CSL_DSS_VP1_CONFIG_RESERVED2_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP1_CONFIG_RESERVED2_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CONFIG_BT656ENABLE_MASK   (0x00100000U)
 
#define CSL_DSS_VP1_CONFIG_BT656ENABLE_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_CONFIG_BT656ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_MASK   (0x00200000U)
 
#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MASK   (0x00400000U)
 
#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_SHIFT   (0x00000016U)
 
#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_FIDFIRST_MASK   (0x00800000U)
 
#define CSL_DSS_VP1_CONFIG_FIDFIRST_SHIFT   (0x00000017U)
 
#define CSL_DSS_VP1_CONFIG_FIDFIRST_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_EVEN   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_ODD   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MASK   (0x01000000U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_FULLRANGE_MASK   (0x02000000U)
 
#define CSL_DSS_VP1_CONFIG_FULLRANGE_SHIFT   (0x00000019U)
 
#define CSL_DSS_VP1_CONFIG_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_MASK   (0x04000000U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA   (0x0U)
 
#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA   (0x1U)
 
#define CSL_DSS_VP1_CONFIG_RESERVED3_MASK   (0xF8000000U)
 
#define CSL_DSS_VP1_CONFIG_RESERVED3_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP1_CONFIG_RESERVED3_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_CONTROL_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CONTROL_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPDIS   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPENB   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MASK   (0x00000002U)
 
#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_MONOCOLOR_MASK   (0x00000004U)
 
#define CSL_DSS_VP1_CONTROL_MONOCOLOR_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP1_CONTROL_MONOCOLOR_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_STN_MASK   (0x00000008U)
 
#define CSL_DSS_VP1_CONTROL_STN_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP1_CONTROL_STN_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_M8B_MASK   (0x00000010U)
 
#define CSL_DSS_VP1_CONTROL_M8B_SHIFT   (0x00000004U)
 
#define CSL_DSS_VP1_CONTROL_M8B_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_GOBIT_MASK   (0x00000020U)
 
#define CSL_DSS_VP1_CONTROL_GOBIT_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP1_CONTROL_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_DPIENABLE_MASK   (0x00000040U)
 
#define CSL_DSS_VP1_CONTROL_DPIENABLE_SHIFT   (0x00000006U)
 
#define CSL_DSS_VP1_CONTROL_DPIENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPDIS   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPENB   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_MASK   (0x00000080U)
 
#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHDIS   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHENB   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_MASK   (0x00000700U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB12B   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB16B   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB18B   (0x2U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB24B   (0x3U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB30B   (0x4U)
 
#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB36B   (0x5U)
 
#define CSL_DSS_VP1_CONTROL_STALLMODE_MASK   (0x00000800U)
 
#define CSL_DSS_VP1_CONTROL_STALLMODE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP1_CONTROL_STALLMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_STALLMODE_VAL_STALLDIS   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_STALLMODE_VAL_STALLENB   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_MASK   (0x00001000U)
 
#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_COMMANDMODE   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_VIDEOMODE   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_RESERVED3_MASK   (0x00002000U)
 
#define CSL_DSS_VP1_CONTROL_RESERVED3_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP1_CONTROL_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_HT_MASK   (0x0001C000U)
 
#define CSL_DSS_VP1_CONTROL_HT_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP1_CONTROL_HT_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CONTROL_RESERVED1_MASK   (0x000E0000U)
 
#define CSL_DSS_VP1_CONTROL_RESERVED1_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP1_CONTROL_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CONTROL_TDMENABLE_MASK   (0x00100000U)
 
#define CSL_DSS_VP1_CONTROL_TDMENABLE_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_CONTROL_TDMENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMDIS   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMENB   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MASK   (0x00600000U)
 
#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MAX   (0x00000003U)
 
#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT   (0x2U)
 
#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT   (0x3U)
 
#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MASK   (0x01800000U)
 
#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_SHIFT   (0x00000017U)
 
#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MAX   (0x00000003U)
 
#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX   (0x2U)
 
#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX   (0x3U)
 
#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MASK   (0x06000000U)
 
#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_SHIFT   (0x00000019U)
 
#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MAX   (0x00000003U)
 
#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED   (0x2U)
 
#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_RES   (0x3U)
 
#define CSL_DSS_VP1_CONTROL_RESERVED_MASK   (0x38000000U)
 
#define CSL_DSS_VP1_CONTROL_RESERVED_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP1_CONTROL_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK   (0xC0000000U)
 
#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX   (0x00000003U)
 
#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME   (0x0U)
 
#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES   (0x1U)
 
#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES   (0x2U)
 
#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VP1_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP1_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP1_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP1_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP1_LINE_NUMBER_RESERVED_MASK   (0xFFFFC000U)
 
#define CSL_DSS_VP1_LINE_NUMBER_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP1_LINE_NUMBER_RESERVED_MAX   (0x0003FFFFU)
 
#define CSL_DSS_VP1_POL_FREQ_ACB_MASK   (0x000000FFU)
 
#define CSL_DSS_VP1_POL_FREQ_ACB_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_POL_FREQ_ACB_MAX   (0x000000FFU)
 
#define CSL_DSS_VP1_POL_FREQ_ACBI_MASK   (0x00000F00U)
 
#define CSL_DSS_VP1_POL_FREQ_ACBI_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP1_POL_FREQ_ACBI_MAX   (0x0000000FU)
 
#define CSL_DSS_VP1_POL_FREQ_IVS_MASK   (0x00001000U)
 
#define CSL_DSS_VP1_POL_FREQ_IVS_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP1_POL_FREQ_IVS_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAH   (0x0U)
 
#define CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAL   (0x1U)
 
#define CSL_DSS_VP1_POL_FREQ_IHS_MASK   (0x00002000U)
 
#define CSL_DSS_VP1_POL_FREQ_IHS_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP1_POL_FREQ_IHS_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAH   (0x0U)
 
#define CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAL   (0x1U)
 
#define CSL_DSS_VP1_POL_FREQ_IPC_MASK   (0x00004000U)
 
#define CSL_DSS_VP1_POL_FREQ_IPC_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP1_POL_FREQ_IPC_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_POL_FREQ_IPC_VAL_DRPCK   (0x0U)
 
#define CSL_DSS_VP1_POL_FREQ_IPC_VAL_DFPCK   (0x1U)
 
#define CSL_DSS_VP1_POL_FREQ_IEO_MASK   (0x00008000U)
 
#define CSL_DSS_VP1_POL_FREQ_IEO_SHIFT   (0x0000000FU)
 
#define CSL_DSS_VP1_POL_FREQ_IEO_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBAHIGH   (0x0U)
 
#define CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBALOW   (0x1U)
 
#define CSL_DSS_VP1_POL_FREQ_RF_MASK   (0x00010000U)
 
#define CSL_DSS_VP1_POL_FREQ_RF_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_POL_FREQ_RF_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_POL_FREQ_RF_VAL_DFEDPCK   (0x0U)
 
#define CSL_DSS_VP1_POL_FREQ_RF_VAL_DRIEDPCK   (0x1U)
 
#define CSL_DSS_VP1_POL_FREQ_ONOFF_MASK   (0x00020000U)
 
#define CSL_DSS_VP1_POL_FREQ_ONOFF_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP1_POL_FREQ_ONOFF_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DOPEDPCK   (0x0U)
 
#define CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DBIT16   (0x1U)
 
#define CSL_DSS_VP1_POL_FREQ_ALIGN_MASK   (0x00040000U)
 
#define CSL_DSS_VP1_POL_FREQ_ALIGN_SHIFT   (0x00000012U)
 
#define CSL_DSS_VP1_POL_FREQ_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_NOTALIGNED   (0x0U)
 
#define CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_ALIGNED   (0x1U)
 
#define CSL_DSS_VP1_POL_FREQ_RESERVED_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP1_POL_FREQ_RESERVED_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP1_POL_FREQ_RESERVED_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP1_SIZE_SCREEN_PPL_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP1_SIZE_SCREEN_PPL_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_SIZE_SCREEN_PPL_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MASK   (0x0000C000U)
 
#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MAX   (0x00000003U)
 
#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_SAME   (0x0U)
 
#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE   (0x1U)
 
#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE   (0x2U)
 
#define CSL_DSS_VP1_SIZE_SCREEN_LPP_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP1_SIZE_SCREEN_LPP_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_SIZE_SCREEN_LPP_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP1_TIMING_H_HSW_MASK   (0x000000FFU)
 
#define CSL_DSS_VP1_TIMING_H_HSW_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_TIMING_H_HSW_MAX   (0x000000FFU)
 
#define CSL_DSS_VP1_TIMING_H_HFP_MASK   (0x000FFF00U)
 
#define CSL_DSS_VP1_TIMING_H_HFP_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP1_TIMING_H_HFP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP1_TIMING_H_HBP_MASK   (0xFFF00000U)
 
#define CSL_DSS_VP1_TIMING_H_HBP_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_TIMING_H_HBP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP1_TIMING_V_VSW_MASK   (0x000000FFU)
 
#define CSL_DSS_VP1_TIMING_V_VSW_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_TIMING_V_VSW_MAX   (0x000000FFU)
 
#define CSL_DSS_VP1_TIMING_V_VFP_MASK   (0x000FFF00U)
 
#define CSL_DSS_VP1_TIMING_V_VFP_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP1_TIMING_V_VFP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP1_TIMING_V_VBP_MASK   (0xFFF00000U)
 
#define CSL_DSS_VP1_TIMING_V_VBP_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_TIMING_V_VBP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP1_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP1_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_VP1_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_VP1_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP1_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP1_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP1_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP1_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP1_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP1_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP1_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP1_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP   (0x0U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)
 
#define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP1_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP1_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP1_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MASK   (0xFFFFC000U)
 
#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MAX   (0x0003FFFFU)
 
#define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP1_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_VP1_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP1_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_VP1_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_VP1_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_VP1_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VP1_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP1_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_OVR2_CONFIG   (0x00000000U)
 
#define CSL_DSS_OVR2_VIRTUALVP   (0x00000004U)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR   (0x00000008U)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR2   (0x0000000CU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX   (0x00000010U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX2   (0x00000014U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN   (0x00000018U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN2   (0x0000001CU)
 
#define CSL_DSS_OVR2_ATTRIBUTES(index)   (0x00000020U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_OVR2_ATTRIBUTES2(index)   (0x00000034U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_OVR2_SECURE   (0x00000048U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED6_MASK   (0x00000001U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED6_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED6_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_CONFIG_COLORBAREN_MASK   (0x00000002U)
 
#define CSL_DSS_OVR2_CONFIG_COLORBAREN_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR2_CONFIG_COLORBAREN_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_CONFIG_COLORBAREN_VAL_COLORBARDIS   (0x0U)
 
#define CSL_DSS_OVR2_CONFIG_COLORBAREN_VAL_COLORBAREN   (0x1U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED_MASK   (0x000003FCU)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED_SHIFT   (0x00000002U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_MASK   (0x00000400U)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_VAL_DISTCK   (0x0U)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_VAL_ENBTCK   (0x1U)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_MASK   (0x00000800U)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_SHIFT   (0x0000000BU)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_VAL_GDTK   (0x0U)
 
#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_VAL_VSTK   (0x1U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED2_MASK   (0x00001000U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED2_SHIFT   (0x0000000CU)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED3_MASK   (0x00002000U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED3_SHIFT   (0x0000000DU)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED1_MASK   (0xFFFFC000U)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED1_SHIFT   (0x0000000EU)
 
#define CSL_DSS_OVR2_CONFIG_RESERVED1_MAX   (0x0003FFFFU)
 
#define CSL_DSS_OVR2_VIRTUALVP_PPL_MASK   (0x00003FFFU)
 
#define CSL_DSS_OVR2_VIRTUALVP_PPL_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_VIRTUALVP_PPL_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR2_VIRTUALVP_LPP_MASK   (0x3FFF0000U)
 
#define CSL_DSS_OVR2_VIRTUALVP_LPP_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR2_VIRTUALVP_LPP_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR2_VIRTUALVP_ENABLE_MASK   (0x80000000U)
 
#define CSL_DSS_OVR2_VIRTUALVP_ENABLE_SHIFT   (0x0000001FU)
 
#define CSL_DSS_OVR2_VIRTUALVP_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_MASK   (0x0000FFFFU)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_MAX   (0x0000FFFFU)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK   (0x0000000FU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK   (0x0000000FU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_MASK   (0x0000001EU)
 
#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VID1   (0x0U)
 
#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VID2   (0x2U)
 
#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIRTCH   (0x4U)
 
#define CSL_DSS_OVR2_ATTRIBUTES2_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_OVR2_ATTRIBUTES2_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_ATTRIBUTES2_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR2_ATTRIBUTES2_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_OVR2_ATTRIBUTES2_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR2_ATTRIBUTES2_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR2_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_OVR2_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR2_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR2_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_OVR2_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_OVR2_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_OVR2_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR2_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VP2_CONFIG   (0x00000000U)
 
#define CSL_DSS_VP2_CONTROL   (0x00000004U)
 
#define CSL_DSS_VP2_CSC_COEF0   (0x00000008U)
 
#define CSL_DSS_VP2_CSC_COEF1   (0x0000000CU)
 
#define CSL_DSS_VP2_CSC_COEF2   (0x00000010U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0   (0x00000014U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1   (0x00000018U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2   (0x0000001CU)
 
#define CSL_DSS_VP2_LINE_NUMBER   (0x00000044U)
 
#define CSL_DSS_VP2_POL_FREQ   (0x0000004CU)
 
#define CSL_DSS_VP2_SIZE_SCREEN   (0x00000050U)
 
#define CSL_DSS_VP2_TIMING_H   (0x00000054U)
 
#define CSL_DSS_VP2_TIMING_V   (0x00000058U)
 
#define CSL_DSS_VP2_CSC_COEF3   (0x0000005CU)
 
#define CSL_DSS_VP2_CSC_COEF4   (0x00000060U)
 
#define CSL_DSS_VP2_CSC_COEF5   (0x00000064U)
 
#define CSL_DSS_VP2_CSC_COEF6   (0x00000068U)
 
#define CSL_DSS_VP2_CSC_COEF7   (0x0000006CU)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES(index)   (0x00000070U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE(index)   (0x00000090U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP2_SAFETY_POSITION(index)   (0x000000B0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP2_SAFETY_REF_SIGNATURE(index)   (0x000000D0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP2_SAFETY_SIZE(index)   (0x000000F0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP2_SAFETY_LFSR_SEED   (0x00000110U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0   (0x00000120U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1   (0x00000124U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2   (0x00000128U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3   (0x0000012CU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4   (0x00000130U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5   (0x00000134U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6   (0x00000138U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7   (0x0000013CU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8   (0x00000140U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9   (0x00000144U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10   (0x00000148U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11   (0x0000014CU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12   (0x00000150U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13   (0x00000154U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14   (0x00000158U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15   (0x0000015CU)
 
#define CSL_DSS_VP2_DSS_OLDI_CFG   (0x00000160U)
 
#define CSL_DSS_VP2_DSS_OLDI_STATUS   (0x00000164U)
 
#define CSL_DSS_VP2_DSS_OLDI_LB   (0x00000168U)
 
#define CSL_DSS_VP2_SECURE   (0x00000178U)
 
#define CSL_DSS_VP2_CONFIG_PIXELGATED_MASK   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_PIXELGATED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CONFIG_PIXELGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_PIXELGATED_VAL_PCLKTOGA   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_PIXELGATED_VAL_PCLKTOGV   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_MASK   (0x00000002U)
 
#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_VAL_DEGDIS   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_VAL_DEGENB   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_MASK   (0x00000004U)
 
#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_VAL_GAMMADIS   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_VAL_GAMMAENB   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_HDMIMODE_MASK   (0x00000008U)
 
#define CSL_DSS_VP2_CONFIG_HDMIMODE_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP2_CONFIG_HDMIMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_MASK   (0x00000010U)
 
#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_SHIFT   (0x00000004U)
 
#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_VAL_PDGDIS   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_VAL_PDGENB   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_MASK   (0x00000020U)
 
#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_VAL_PCGENB   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_HSYNCGATED_MASK   (0x00000040U)
 
#define CSL_DSS_VP2_CONFIG_HSYNCGATED_SHIFT   (0x00000006U)
 
#define CSL_DSS_VP2_CONFIG_HSYNCGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_HSYNCGATED_VAL_HGDIS   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_HSYNCGATED_VAL_HGENB   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_VSYNCGATED_MASK   (0x00000080U)
 
#define CSL_DSS_VP2_CONFIG_VSYNCGATED_SHIFT   (0x00000007U)
 
#define CSL_DSS_VP2_CONFIG_VSYNCGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_VSYNCGATED_VAL_VGDIS   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_VSYNCGATED_VAL_VGENB   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_MASK   (0x00000100U)
 
#define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_RESERVED1_MASK   (0x00007E00U)
 
#define CSL_DSS_VP2_CONFIG_RESERVED1_SHIFT   (0x00000009U)
 
#define CSL_DSS_VP2_CONFIG_RESERVED1_MAX   (0x0000003FU)
 
#define CSL_DSS_VP2_CONFIG_CPR_MASK   (0x00008000U)
 
#define CSL_DSS_VP2_CONFIG_CPR_SHIFT   (0x0000000FU)
 
#define CSL_DSS_VP2_CONFIG_CPR_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_MASK   (0x00010000U)
 
#define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_RESERVED2_MASK   (0x000E0000U)
 
#define CSL_DSS_VP2_CONFIG_RESERVED2_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP2_CONFIG_RESERVED2_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CONFIG_BT656ENABLE_MASK   (0x00100000U)
 
#define CSL_DSS_VP2_CONFIG_BT656ENABLE_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_CONFIG_BT656ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_BT656ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_BT656ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_MASK   (0x00200000U)
 
#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_MASK   (0x00400000U)
 
#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_SHIFT   (0x00000016U)
 
#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_FIDFIRST_MASK   (0x00800000U)
 
#define CSL_DSS_VP2_CONFIG_FIDFIRST_SHIFT   (0x00000017U)
 
#define CSL_DSS_VP2_CONFIG_FIDFIRST_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_FIDFIRST_VAL_EVEN   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_FIDFIRST_VAL_ODD   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_MASK   (0x01000000U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_FULLRANGE_MASK   (0x02000000U)
 
#define CSL_DSS_VP2_CONFIG_FULLRANGE_SHIFT   (0x00000019U)
 
#define CSL_DSS_VP2_CONFIG_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_MASK   (0x04000000U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA   (0x0U)
 
#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA   (0x1U)
 
#define CSL_DSS_VP2_CONFIG_RESERVED3_MASK   (0xF8000000U)
 
#define CSL_DSS_VP2_CONFIG_RESERVED3_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP2_CONFIG_RESERVED3_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_CONTROL_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CONTROL_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_ENABLE_VAL_LCDOPDIS   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_ENABLE_VAL_LCDOPENB   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_MASK   (0x00000002U)
 
#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_MONOCOLOR_MASK   (0x00000004U)
 
#define CSL_DSS_VP2_CONTROL_MONOCOLOR_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP2_CONTROL_MONOCOLOR_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_STN_MASK   (0x00000008U)
 
#define CSL_DSS_VP2_CONTROL_STN_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP2_CONTROL_STN_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_M8B_MASK   (0x00000010U)
 
#define CSL_DSS_VP2_CONTROL_M8B_SHIFT   (0x00000004U)
 
#define CSL_DSS_VP2_CONTROL_M8B_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_GOBIT_MASK   (0x00000020U)
 
#define CSL_DSS_VP2_CONTROL_GOBIT_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP2_CONTROL_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_DPIENABLE_MASK   (0x00000040U)
 
#define CSL_DSS_VP2_CONTROL_DPIENABLE_SHIFT   (0x00000006U)
 
#define CSL_DSS_VP2_CONTROL_DPIENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_DPIENABLE_VAL_DPIOPDIS   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_DPIENABLE_VAL_DPIOPENB   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_MASK   (0x00000080U)
 
#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_VAL_STDITHDIS   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_VAL_STDITHENB   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_MASK   (0x00000700U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB12B   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB16B   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB18B   (0x2U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB24B   (0x3U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB30B   (0x4U)
 
#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB36B   (0x5U)
 
#define CSL_DSS_VP2_CONTROL_STALLMODE_MASK   (0x00000800U)
 
#define CSL_DSS_VP2_CONTROL_STALLMODE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP2_CONTROL_STALLMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_STALLMODE_VAL_STALLDIS   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_STALLMODE_VAL_STALLENB   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_MASK   (0x00001000U)
 
#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_VAL_COMMANDMODE   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_VAL_VIDEOMODE   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_RESERVED3_MASK   (0x00002000U)
 
#define CSL_DSS_VP2_CONTROL_RESERVED3_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP2_CONTROL_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_HT_MASK   (0x0001C000U)
 
#define CSL_DSS_VP2_CONTROL_HT_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP2_CONTROL_HT_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CONTROL_RESERVED1_MASK   (0x000E0000U)
 
#define CSL_DSS_VP2_CONTROL_RESERVED1_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP2_CONTROL_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CONTROL_TDMENABLE_MASK   (0x00100000U)
 
#define CSL_DSS_VP2_CONTROL_TDMENABLE_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_CONTROL_TDMENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_CONTROL_TDMENABLE_VAL_TDMDIS   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_TDMENABLE_VAL_TDMENB   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_MASK   (0x00600000U)
 
#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_MAX   (0x00000003U)
 
#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT   (0x2U)
 
#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT   (0x3U)
 
#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_MASK   (0x01800000U)
 
#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_SHIFT   (0x00000017U)
 
#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_MAX   (0x00000003U)
 
#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX   (0x2U)
 
#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX   (0x3U)
 
#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_MASK   (0x06000000U)
 
#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_SHIFT   (0x00000019U)
 
#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_MAX   (0x00000003U)
 
#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED   (0x2U)
 
#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_RES   (0x3U)
 
#define CSL_DSS_VP2_CONTROL_RESERVED_MASK   (0x38000000U)
 
#define CSL_DSS_VP2_CONTROL_RESERVED_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP2_CONTROL_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK   (0xC0000000U)
 
#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX   (0x00000003U)
 
#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME   (0x0U)
 
#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES   (0x1U)
 
#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES   (0x2U)
 
#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VP2_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP2_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP2_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP2_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP2_LINE_NUMBER_RESERVED_MASK   (0xFFFFC000U)
 
#define CSL_DSS_VP2_LINE_NUMBER_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP2_LINE_NUMBER_RESERVED_MAX   (0x0003FFFFU)
 
#define CSL_DSS_VP2_POL_FREQ_ACB_MASK   (0x000000FFU)
 
#define CSL_DSS_VP2_POL_FREQ_ACB_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_POL_FREQ_ACB_MAX   (0x000000FFU)
 
#define CSL_DSS_VP2_POL_FREQ_ACBI_MASK   (0x00000F00U)
 
#define CSL_DSS_VP2_POL_FREQ_ACBI_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP2_POL_FREQ_ACBI_MAX   (0x0000000FU)
 
#define CSL_DSS_VP2_POL_FREQ_IVS_MASK   (0x00001000U)
 
#define CSL_DSS_VP2_POL_FREQ_IVS_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP2_POL_FREQ_IVS_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_POL_FREQ_IVS_VAL_FCKPINAH   (0x0U)
 
#define CSL_DSS_VP2_POL_FREQ_IVS_VAL_FCKPINAL   (0x1U)
 
#define CSL_DSS_VP2_POL_FREQ_IHS_MASK   (0x00002000U)
 
#define CSL_DSS_VP2_POL_FREQ_IHS_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP2_POL_FREQ_IHS_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_POL_FREQ_IHS_VAL_LCKPINAH   (0x0U)
 
#define CSL_DSS_VP2_POL_FREQ_IHS_VAL_LCKPINAL   (0x1U)
 
#define CSL_DSS_VP2_POL_FREQ_IPC_MASK   (0x00004000U)
 
#define CSL_DSS_VP2_POL_FREQ_IPC_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP2_POL_FREQ_IPC_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_POL_FREQ_IPC_VAL_DRPCK   (0x0U)
 
#define CSL_DSS_VP2_POL_FREQ_IPC_VAL_DFPCK   (0x1U)
 
#define CSL_DSS_VP2_POL_FREQ_IEO_MASK   (0x00008000U)
 
#define CSL_DSS_VP2_POL_FREQ_IEO_SHIFT   (0x0000000FU)
 
#define CSL_DSS_VP2_POL_FREQ_IEO_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_POL_FREQ_IEO_VAL_ACBAHIGH   (0x0U)
 
#define CSL_DSS_VP2_POL_FREQ_IEO_VAL_ACBALOW   (0x1U)
 
#define CSL_DSS_VP2_POL_FREQ_RF_MASK   (0x00010000U)
 
#define CSL_DSS_VP2_POL_FREQ_RF_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_POL_FREQ_RF_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_POL_FREQ_RF_VAL_DFEDPCK   (0x0U)
 
#define CSL_DSS_VP2_POL_FREQ_RF_VAL_DRIEDPCK   (0x1U)
 
#define CSL_DSS_VP2_POL_FREQ_ONOFF_MASK   (0x00020000U)
 
#define CSL_DSS_VP2_POL_FREQ_ONOFF_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP2_POL_FREQ_ONOFF_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_POL_FREQ_ONOFF_VAL_DOPEDPCK   (0x0U)
 
#define CSL_DSS_VP2_POL_FREQ_ONOFF_VAL_DBIT16   (0x1U)
 
#define CSL_DSS_VP2_POL_FREQ_ALIGN_MASK   (0x00040000U)
 
#define CSL_DSS_VP2_POL_FREQ_ALIGN_SHIFT   (0x00000012U)
 
#define CSL_DSS_VP2_POL_FREQ_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_POL_FREQ_ALIGN_VAL_NOTALIGNED   (0x0U)
 
#define CSL_DSS_VP2_POL_FREQ_ALIGN_VAL_ALIGNED   (0x1U)
 
#define CSL_DSS_VP2_POL_FREQ_RESERVED_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP2_POL_FREQ_RESERVED_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP2_POL_FREQ_RESERVED_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP2_SIZE_SCREEN_PPL_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP2_SIZE_SCREEN_PPL_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_SIZE_SCREEN_PPL_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_MASK   (0x0000C000U)
 
#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_MAX   (0x00000003U)
 
#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_SAME   (0x0U)
 
#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE   (0x1U)
 
#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE   (0x2U)
 
#define CSL_DSS_VP2_SIZE_SCREEN_LPP_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP2_SIZE_SCREEN_LPP_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_SIZE_SCREEN_LPP_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP2_TIMING_H_HSW_MASK   (0x000000FFU)
 
#define CSL_DSS_VP2_TIMING_H_HSW_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_TIMING_H_HSW_MAX   (0x000000FFU)
 
#define CSL_DSS_VP2_TIMING_H_HFP_MASK   (0x000FFF00U)
 
#define CSL_DSS_VP2_TIMING_H_HFP_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP2_TIMING_H_HFP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP2_TIMING_H_HBP_MASK   (0xFFF00000U)
 
#define CSL_DSS_VP2_TIMING_H_HBP_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_TIMING_H_HBP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP2_TIMING_V_VSW_MASK   (0x000000FFU)
 
#define CSL_DSS_VP2_TIMING_V_VSW_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_TIMING_V_VSW_MAX   (0x000000FFU)
 
#define CSL_DSS_VP2_TIMING_V_VFP_MASK   (0x000FFF00U)
 
#define CSL_DSS_VP2_TIMING_V_VFP_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP2_TIMING_V_VFP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP2_TIMING_V_VBP_MASK   (0xFFF00000U)
 
#define CSL_DSS_VP2_TIMING_V_VBP_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_TIMING_V_VBP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP2_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP2_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_VP2_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_VP2_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP2_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP2_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP2_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP2_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP2_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP2_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP2_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP2_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP   (0x0U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)
 
#define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP2_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP2_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP2_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_MASK   (0xFFFFC000U)
 
#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_MAX   (0x0003FFFFU)
 
#define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP2_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_VP2_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP2_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_VP2_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_VP2_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_VP2_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VP2_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP2_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_OVR3_CONFIG   (0x00000000U)
 
#define CSL_DSS_OVR3_VIRTUALVP   (0x00000004U)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR   (0x00000008U)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR2   (0x0000000CU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX   (0x00000010U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX2   (0x00000014U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN   (0x00000018U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN2   (0x0000001CU)
 
#define CSL_DSS_OVR3_ATTRIBUTES(index)   (0x00000020U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_OVR3_ATTRIBUTES2(index)   (0x00000034U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_OVR3_SECURE   (0x00000048U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED6_MASK   (0x00000001U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED6_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED6_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_CONFIG_COLORBAREN_MASK   (0x00000002U)
 
#define CSL_DSS_OVR3_CONFIG_COLORBAREN_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR3_CONFIG_COLORBAREN_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_CONFIG_COLORBAREN_VAL_COLORBARDIS   (0x0U)
 
#define CSL_DSS_OVR3_CONFIG_COLORBAREN_VAL_COLORBAREN   (0x1U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED_MASK   (0x000003FCU)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED_SHIFT   (0x00000002U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_MASK   (0x00000400U)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_VAL_DISTCK   (0x0U)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_VAL_ENBTCK   (0x1U)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_MASK   (0x00000800U)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_SHIFT   (0x0000000BU)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_VAL_GDTK   (0x0U)
 
#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_VAL_VSTK   (0x1U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED2_MASK   (0x00001000U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED2_SHIFT   (0x0000000CU)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED3_MASK   (0x00002000U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED3_SHIFT   (0x0000000DU)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED1_MASK   (0xFFFFC000U)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED1_SHIFT   (0x0000000EU)
 
#define CSL_DSS_OVR3_CONFIG_RESERVED1_MAX   (0x0003FFFFU)
 
#define CSL_DSS_OVR3_VIRTUALVP_PPL_MASK   (0x00003FFFU)
 
#define CSL_DSS_OVR3_VIRTUALVP_PPL_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_VIRTUALVP_PPL_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR3_VIRTUALVP_LPP_MASK   (0x3FFF0000U)
 
#define CSL_DSS_OVR3_VIRTUALVP_LPP_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR3_VIRTUALVP_LPP_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR3_VIRTUALVP_ENABLE_MASK   (0x80000000U)
 
#define CSL_DSS_OVR3_VIRTUALVP_ENABLE_SHIFT   (0x0000001FU)
 
#define CSL_DSS_OVR3_VIRTUALVP_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_MASK   (0x0000FFFFU)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_MAX   (0x0000FFFFU)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK   (0x0000000FU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK   (0x0000000FU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_MASK   (0x0000001EU)
 
#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VID1   (0x0U)
 
#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VID2   (0x2U)
 
#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIRTCH   (0x4U)
 
#define CSL_DSS_OVR3_ATTRIBUTES2_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_OVR3_ATTRIBUTES2_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_ATTRIBUTES2_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR3_ATTRIBUTES2_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_OVR3_ATTRIBUTES2_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR3_ATTRIBUTES2_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR3_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_OVR3_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR3_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR3_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_OVR3_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_OVR3_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_OVR3_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR3_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VP3_CONFIG   (0x00000000U)
 
#define CSL_DSS_VP3_CONTROL   (0x00000004U)
 
#define CSL_DSS_VP3_CSC_COEF0   (0x00000008U)
 
#define CSL_DSS_VP3_CSC_COEF1   (0x0000000CU)
 
#define CSL_DSS_VP3_CSC_COEF2   (0x00000010U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0   (0x00000014U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1   (0x00000018U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2   (0x0000001CU)
 
#define CSL_DSS_VP3_LINE_NUMBER   (0x00000044U)
 
#define CSL_DSS_VP3_POL_FREQ   (0x0000004CU)
 
#define CSL_DSS_VP3_SIZE_SCREEN   (0x00000050U)
 
#define CSL_DSS_VP3_TIMING_H   (0x00000054U)
 
#define CSL_DSS_VP3_TIMING_V   (0x00000058U)
 
#define CSL_DSS_VP3_CSC_COEF3   (0x0000005CU)
 
#define CSL_DSS_VP3_CSC_COEF4   (0x00000060U)
 
#define CSL_DSS_VP3_CSC_COEF5   (0x00000064U)
 
#define CSL_DSS_VP3_CSC_COEF6   (0x00000068U)
 
#define CSL_DSS_VP3_CSC_COEF7   (0x0000006CU)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES(index)   (0x00000070U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE(index)   (0x00000090U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP3_SAFETY_POSITION(index)   (0x000000B0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP3_SAFETY_REF_SIGNATURE(index)   (0x000000D0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP3_SAFETY_SIZE(index)   (0x000000F0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP3_SAFETY_LFSR_SEED   (0x00000110U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0   (0x00000120U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1   (0x00000124U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2   (0x00000128U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3   (0x0000012CU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4   (0x00000130U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5   (0x00000134U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6   (0x00000138U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7   (0x0000013CU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8   (0x00000140U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9   (0x00000144U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10   (0x00000148U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11   (0x0000014CU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12   (0x00000150U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13   (0x00000154U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14   (0x00000158U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15   (0x0000015CU)
 
#define CSL_DSS_VP3_DSS_OLDI_CFG   (0x00000160U)
 
#define CSL_DSS_VP3_DSS_OLDI_STATUS   (0x00000164U)
 
#define CSL_DSS_VP3_DSS_OLDI_LB   (0x00000168U)
 
#define CSL_DSS_VP3_SECURE   (0x00000178U)
 
#define CSL_DSS_VP3_CONFIG_PIXELGATED_MASK   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_PIXELGATED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CONFIG_PIXELGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_PIXELGATED_VAL_PCLKTOGA   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_PIXELGATED_VAL_PCLKTOGV   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_MASK   (0x00000002U)
 
#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_VAL_DEGDIS   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_VAL_DEGENB   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_MASK   (0x00000004U)
 
#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_VAL_GAMMADIS   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_VAL_GAMMAENB   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_HDMIMODE_MASK   (0x00000008U)
 
#define CSL_DSS_VP3_CONFIG_HDMIMODE_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP3_CONFIG_HDMIMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_MASK   (0x00000010U)
 
#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_SHIFT   (0x00000004U)
 
#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_VAL_PDGDIS   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_VAL_PDGENB   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_MASK   (0x00000020U)
 
#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_VAL_PCGENB   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_HSYNCGATED_MASK   (0x00000040U)
 
#define CSL_DSS_VP3_CONFIG_HSYNCGATED_SHIFT   (0x00000006U)
 
#define CSL_DSS_VP3_CONFIG_HSYNCGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_HSYNCGATED_VAL_HGDIS   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_HSYNCGATED_VAL_HGENB   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_VSYNCGATED_MASK   (0x00000080U)
 
#define CSL_DSS_VP3_CONFIG_VSYNCGATED_SHIFT   (0x00000007U)
 
#define CSL_DSS_VP3_CONFIG_VSYNCGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_VSYNCGATED_VAL_VGDIS   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_VSYNCGATED_VAL_VGENB   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_MASK   (0x00000100U)
 
#define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_RESERVED1_MASK   (0x00007E00U)
 
#define CSL_DSS_VP3_CONFIG_RESERVED1_SHIFT   (0x00000009U)
 
#define CSL_DSS_VP3_CONFIG_RESERVED1_MAX   (0x0000003FU)
 
#define CSL_DSS_VP3_CONFIG_CPR_MASK   (0x00008000U)
 
#define CSL_DSS_VP3_CONFIG_CPR_SHIFT   (0x0000000FU)
 
#define CSL_DSS_VP3_CONFIG_CPR_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_MASK   (0x00010000U)
 
#define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_RESERVED2_MASK   (0x000E0000U)
 
#define CSL_DSS_VP3_CONFIG_RESERVED2_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP3_CONFIG_RESERVED2_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CONFIG_BT656ENABLE_MASK   (0x00100000U)
 
#define CSL_DSS_VP3_CONFIG_BT656ENABLE_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_CONFIG_BT656ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_BT656ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_BT656ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_MASK   (0x00200000U)
 
#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_MASK   (0x00400000U)
 
#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_SHIFT   (0x00000016U)
 
#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_FIDFIRST_MASK   (0x00800000U)
 
#define CSL_DSS_VP3_CONFIG_FIDFIRST_SHIFT   (0x00000017U)
 
#define CSL_DSS_VP3_CONFIG_FIDFIRST_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_FIDFIRST_VAL_EVEN   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_FIDFIRST_VAL_ODD   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_MASK   (0x01000000U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_FULLRANGE_MASK   (0x02000000U)
 
#define CSL_DSS_VP3_CONFIG_FULLRANGE_SHIFT   (0x00000019U)
 
#define CSL_DSS_VP3_CONFIG_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_MASK   (0x04000000U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA   (0x0U)
 
#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA   (0x1U)
 
#define CSL_DSS_VP3_CONFIG_RESERVED3_MASK   (0xF8000000U)
 
#define CSL_DSS_VP3_CONFIG_RESERVED3_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP3_CONFIG_RESERVED3_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_CONTROL_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CONTROL_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_ENABLE_VAL_LCDOPDIS   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_ENABLE_VAL_LCDOPENB   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_MASK   (0x00000002U)
 
#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_MONOCOLOR_MASK   (0x00000004U)
 
#define CSL_DSS_VP3_CONTROL_MONOCOLOR_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP3_CONTROL_MONOCOLOR_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_STN_MASK   (0x00000008U)
 
#define CSL_DSS_VP3_CONTROL_STN_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP3_CONTROL_STN_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_M8B_MASK   (0x00000010U)
 
#define CSL_DSS_VP3_CONTROL_M8B_SHIFT   (0x00000004U)
 
#define CSL_DSS_VP3_CONTROL_M8B_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_GOBIT_MASK   (0x00000020U)
 
#define CSL_DSS_VP3_CONTROL_GOBIT_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP3_CONTROL_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_DPIENABLE_MASK   (0x00000040U)
 
#define CSL_DSS_VP3_CONTROL_DPIENABLE_SHIFT   (0x00000006U)
 
#define CSL_DSS_VP3_CONTROL_DPIENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_DPIENABLE_VAL_DPIOPDIS   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_DPIENABLE_VAL_DPIOPENB   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_MASK   (0x00000080U)
 
#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_VAL_STDITHDIS   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_VAL_STDITHENB   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_MASK   (0x00000700U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB12B   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB16B   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB18B   (0x2U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB24B   (0x3U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB30B   (0x4U)
 
#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB36B   (0x5U)
 
#define CSL_DSS_VP3_CONTROL_STALLMODE_MASK   (0x00000800U)
 
#define CSL_DSS_VP3_CONTROL_STALLMODE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP3_CONTROL_STALLMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_STALLMODE_VAL_STALLDIS   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_STALLMODE_VAL_STALLENB   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_MASK   (0x00001000U)
 
#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_VAL_COMMANDMODE   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_VAL_VIDEOMODE   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_RESERVED3_MASK   (0x00002000U)
 
#define CSL_DSS_VP3_CONTROL_RESERVED3_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP3_CONTROL_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_HT_MASK   (0x0001C000U)
 
#define CSL_DSS_VP3_CONTROL_HT_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP3_CONTROL_HT_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CONTROL_RESERVED1_MASK   (0x000E0000U)
 
#define CSL_DSS_VP3_CONTROL_RESERVED1_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP3_CONTROL_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CONTROL_TDMENABLE_MASK   (0x00100000U)
 
#define CSL_DSS_VP3_CONTROL_TDMENABLE_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_CONTROL_TDMENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_CONTROL_TDMENABLE_VAL_TDMDIS   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_TDMENABLE_VAL_TDMENB   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_MASK   (0x00600000U)
 
#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_MAX   (0x00000003U)
 
#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT   (0x2U)
 
#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT   (0x3U)
 
#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_MASK   (0x01800000U)
 
#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_SHIFT   (0x00000017U)
 
#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_MAX   (0x00000003U)
 
#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX   (0x2U)
 
#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX   (0x3U)
 
#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_MASK   (0x06000000U)
 
#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_SHIFT   (0x00000019U)
 
#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_MAX   (0x00000003U)
 
#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED   (0x2U)
 
#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_RES   (0x3U)
 
#define CSL_DSS_VP3_CONTROL_RESERVED_MASK   (0x38000000U)
 
#define CSL_DSS_VP3_CONTROL_RESERVED_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP3_CONTROL_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK   (0xC0000000U)
 
#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX   (0x00000003U)
 
#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME   (0x0U)
 
#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES   (0x1U)
 
#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES   (0x2U)
 
#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VP3_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP3_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP3_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP3_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP3_LINE_NUMBER_RESERVED_MASK   (0xFFFFC000U)
 
#define CSL_DSS_VP3_LINE_NUMBER_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP3_LINE_NUMBER_RESERVED_MAX   (0x0003FFFFU)
 
#define CSL_DSS_VP3_POL_FREQ_ACB_MASK   (0x000000FFU)
 
#define CSL_DSS_VP3_POL_FREQ_ACB_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_POL_FREQ_ACB_MAX   (0x000000FFU)
 
#define CSL_DSS_VP3_POL_FREQ_ACBI_MASK   (0x00000F00U)
 
#define CSL_DSS_VP3_POL_FREQ_ACBI_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP3_POL_FREQ_ACBI_MAX   (0x0000000FU)
 
#define CSL_DSS_VP3_POL_FREQ_IVS_MASK   (0x00001000U)
 
#define CSL_DSS_VP3_POL_FREQ_IVS_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP3_POL_FREQ_IVS_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_POL_FREQ_IVS_VAL_FCKPINAH   (0x0U)
 
#define CSL_DSS_VP3_POL_FREQ_IVS_VAL_FCKPINAL   (0x1U)
 
#define CSL_DSS_VP3_POL_FREQ_IHS_MASK   (0x00002000U)
 
#define CSL_DSS_VP3_POL_FREQ_IHS_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP3_POL_FREQ_IHS_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_POL_FREQ_IHS_VAL_LCKPINAH   (0x0U)
 
#define CSL_DSS_VP3_POL_FREQ_IHS_VAL_LCKPINAL   (0x1U)
 
#define CSL_DSS_VP3_POL_FREQ_IPC_MASK   (0x00004000U)
 
#define CSL_DSS_VP3_POL_FREQ_IPC_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP3_POL_FREQ_IPC_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_POL_FREQ_IPC_VAL_DRPCK   (0x0U)
 
#define CSL_DSS_VP3_POL_FREQ_IPC_VAL_DFPCK   (0x1U)
 
#define CSL_DSS_VP3_POL_FREQ_IEO_MASK   (0x00008000U)
 
#define CSL_DSS_VP3_POL_FREQ_IEO_SHIFT   (0x0000000FU)
 
#define CSL_DSS_VP3_POL_FREQ_IEO_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_POL_FREQ_IEO_VAL_ACBAHIGH   (0x0U)
 
#define CSL_DSS_VP3_POL_FREQ_IEO_VAL_ACBALOW   (0x1U)
 
#define CSL_DSS_VP3_POL_FREQ_RF_MASK   (0x00010000U)
 
#define CSL_DSS_VP3_POL_FREQ_RF_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_POL_FREQ_RF_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_POL_FREQ_RF_VAL_DFEDPCK   (0x0U)
 
#define CSL_DSS_VP3_POL_FREQ_RF_VAL_DRIEDPCK   (0x1U)
 
#define CSL_DSS_VP3_POL_FREQ_ONOFF_MASK   (0x00020000U)
 
#define CSL_DSS_VP3_POL_FREQ_ONOFF_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP3_POL_FREQ_ONOFF_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_POL_FREQ_ONOFF_VAL_DOPEDPCK   (0x0U)
 
#define CSL_DSS_VP3_POL_FREQ_ONOFF_VAL_DBIT16   (0x1U)
 
#define CSL_DSS_VP3_POL_FREQ_ALIGN_MASK   (0x00040000U)
 
#define CSL_DSS_VP3_POL_FREQ_ALIGN_SHIFT   (0x00000012U)
 
#define CSL_DSS_VP3_POL_FREQ_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_POL_FREQ_ALIGN_VAL_NOTALIGNED   (0x0U)
 
#define CSL_DSS_VP3_POL_FREQ_ALIGN_VAL_ALIGNED   (0x1U)
 
#define CSL_DSS_VP3_POL_FREQ_RESERVED_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP3_POL_FREQ_RESERVED_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP3_POL_FREQ_RESERVED_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP3_SIZE_SCREEN_PPL_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP3_SIZE_SCREEN_PPL_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_SIZE_SCREEN_PPL_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_MASK   (0x0000C000U)
 
#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_MAX   (0x00000003U)
 
#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_SAME   (0x0U)
 
#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE   (0x1U)
 
#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE   (0x2U)
 
#define CSL_DSS_VP3_SIZE_SCREEN_LPP_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP3_SIZE_SCREEN_LPP_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_SIZE_SCREEN_LPP_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP3_TIMING_H_HSW_MASK   (0x000000FFU)
 
#define CSL_DSS_VP3_TIMING_H_HSW_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_TIMING_H_HSW_MAX   (0x000000FFU)
 
#define CSL_DSS_VP3_TIMING_H_HFP_MASK   (0x000FFF00U)
 
#define CSL_DSS_VP3_TIMING_H_HFP_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP3_TIMING_H_HFP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP3_TIMING_H_HBP_MASK   (0xFFF00000U)
 
#define CSL_DSS_VP3_TIMING_H_HBP_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_TIMING_H_HBP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP3_TIMING_V_VSW_MASK   (0x000000FFU)
 
#define CSL_DSS_VP3_TIMING_V_VSW_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_TIMING_V_VSW_MAX   (0x000000FFU)
 
#define CSL_DSS_VP3_TIMING_V_VFP_MASK   (0x000FFF00U)
 
#define CSL_DSS_VP3_TIMING_V_VFP_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP3_TIMING_V_VFP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP3_TIMING_V_VBP_MASK   (0xFFF00000U)
 
#define CSL_DSS_VP3_TIMING_V_VBP_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_TIMING_V_VBP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP3_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP3_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_VP3_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_VP3_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP3_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP3_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP3_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP3_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP3_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP3_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP3_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP3_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP   (0x0U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)
 
#define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP3_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP3_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP3_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_MASK   (0xFFFFC000U)
 
#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_MAX   (0x0003FFFFU)
 
#define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP3_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_VP3_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP3_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_VP3_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_VP3_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_VP3_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VP3_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP3_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_OVR4_CONFIG   (0x00000000U)
 
#define CSL_DSS_OVR4_VIRTUALVP   (0x00000004U)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR   (0x00000008U)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR2   (0x0000000CU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX   (0x00000010U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX2   (0x00000014U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN   (0x00000018U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN2   (0x0000001CU)
 
#define CSL_DSS_OVR4_ATTRIBUTES(index)   (0x00000020U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_OVR4_ATTRIBUTES2(index)   (0x00000034U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_OVR4_SECURE   (0x00000048U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED6_MASK   (0x00000001U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED6_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED6_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_CONFIG_COLORBAREN_MASK   (0x00000002U)
 
#define CSL_DSS_OVR4_CONFIG_COLORBAREN_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR4_CONFIG_COLORBAREN_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_CONFIG_COLORBAREN_VAL_COLORBARDIS   (0x0U)
 
#define CSL_DSS_OVR4_CONFIG_COLORBAREN_VAL_COLORBAREN   (0x1U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED_MASK   (0x000003FCU)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED_SHIFT   (0x00000002U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_MASK   (0x00000400U)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_SHIFT   (0x0000000AU)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_VAL_DISTCK   (0x0U)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_VAL_ENBTCK   (0x1U)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_MASK   (0x00000800U)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_SHIFT   (0x0000000BU)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_VAL_GDTK   (0x0U)
 
#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_VAL_VSTK   (0x1U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED2_MASK   (0x00001000U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED2_SHIFT   (0x0000000CU)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED3_MASK   (0x00002000U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED3_SHIFT   (0x0000000DU)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED1_MASK   (0xFFFFC000U)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED1_SHIFT   (0x0000000EU)
 
#define CSL_DSS_OVR4_CONFIG_RESERVED1_MAX   (0x0003FFFFU)
 
#define CSL_DSS_OVR4_VIRTUALVP_PPL_MASK   (0x00003FFFU)
 
#define CSL_DSS_OVR4_VIRTUALVP_PPL_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_VIRTUALVP_PPL_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR4_VIRTUALVP_LPP_MASK   (0x3FFF0000U)
 
#define CSL_DSS_OVR4_VIRTUALVP_LPP_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR4_VIRTUALVP_LPP_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR4_VIRTUALVP_ENABLE_MASK   (0x80000000U)
 
#define CSL_DSS_OVR4_VIRTUALVP_ENABLE_SHIFT   (0x0000001FU)
 
#define CSL_DSS_OVR4_VIRTUALVP_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_MASK   (0x0000FFFFU)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_MAX   (0x0000FFFFU)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK   (0x0000000FU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK   (0x0000000FU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_MASK   (0xFFFFFFF0U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_SHIFT   (0x00000004U)
 
#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_MAX   (0x0FFFFFFFU)
 
#define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_MASK   (0x0000001EU)
 
#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_MAX   (0x0000000FU)
 
#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VID1   (0x0U)
 
#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIDL1   (0x1U)
 
#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VID2   (0x2U)
 
#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIDL2   (0x3U)
 
#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIRTCH   (0x4U)
 
#define CSL_DSS_OVR4_ATTRIBUTES2_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_OVR4_ATTRIBUTES2_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_ATTRIBUTES2_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR4_ATTRIBUTES2_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_OVR4_ATTRIBUTES2_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_OVR4_ATTRIBUTES2_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_OVR4_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_OVR4_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_OVR4_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_OVR4_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_OVR4_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_OVR4_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_OVR4_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_OVR4_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_VP4_CONFIG   (0x00000000U)
 
#define CSL_DSS_VP4_CONTROL   (0x00000004U)
 
#define CSL_DSS_VP4_CSC_COEF0   (0x00000008U)
 
#define CSL_DSS_VP4_CSC_COEF1   (0x0000000CU)
 
#define CSL_DSS_VP4_CSC_COEF2   (0x00000010U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0   (0x00000014U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1   (0x00000018U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2   (0x0000001CU)
 
#define CSL_DSS_VP4_LINE_NUMBER   (0x00000044U)
 
#define CSL_DSS_VP4_POL_FREQ   (0x0000004CU)
 
#define CSL_DSS_VP4_SIZE_SCREEN   (0x00000050U)
 
#define CSL_DSS_VP4_TIMING_H   (0x00000054U)
 
#define CSL_DSS_VP4_TIMING_V   (0x00000058U)
 
#define CSL_DSS_VP4_CSC_COEF3   (0x0000005CU)
 
#define CSL_DSS_VP4_CSC_COEF4   (0x00000060U)
 
#define CSL_DSS_VP4_CSC_COEF5   (0x00000064U)
 
#define CSL_DSS_VP4_CSC_COEF6   (0x00000068U)
 
#define CSL_DSS_VP4_CSC_COEF7   (0x0000006CU)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES(index)   (0x00000070U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE(index)   (0x00000090U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP4_SAFETY_POSITION(index)   (0x000000B0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP4_SAFETY_REF_SIGNATURE(index)   (0x000000D0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP4_SAFETY_SIZE(index)   (0x000000F0U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_VP4_SAFETY_LFSR_SEED   (0x00000110U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0   (0x00000120U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1   (0x00000124U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2   (0x00000128U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3   (0x0000012CU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4   (0x00000130U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5   (0x00000134U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6   (0x00000138U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7   (0x0000013CU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8   (0x00000140U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9   (0x00000144U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10   (0x00000148U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11   (0x0000014CU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12   (0x00000150U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13   (0x00000154U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14   (0x00000158U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15   (0x0000015CU)
 
#define CSL_DSS_VP4_DSS_OLDI_CFG   (0x00000160U)
 
#define CSL_DSS_VP4_DSS_OLDI_STATUS   (0x00000164U)
 
#define CSL_DSS_VP4_DSS_OLDI_LB   (0x00000168U)
 
#define CSL_DSS_VP4_SECURE   (0x00000178U)
 
#define CSL_DSS_VP4_CONFIG_PIXELGATED_MASK   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_PIXELGATED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CONFIG_PIXELGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_PIXELGATED_VAL_PCLKTOGA   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_PIXELGATED_VAL_PCLKTOGV   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_MASK   (0x00000002U)
 
#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_VAL_DEGDIS   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_VAL_DEGENB   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_MASK   (0x00000004U)
 
#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_VAL_GAMMADIS   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_VAL_GAMMAENB   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_HDMIMODE_MASK   (0x00000008U)
 
#define CSL_DSS_VP4_CONFIG_HDMIMODE_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP4_CONFIG_HDMIMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_MASK   (0x00000010U)
 
#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_SHIFT   (0x00000004U)
 
#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_VAL_PDGDIS   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_VAL_PDGENB   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_MASK   (0x00000020U)
 
#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_VAL_PCGENB   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_HSYNCGATED_MASK   (0x00000040U)
 
#define CSL_DSS_VP4_CONFIG_HSYNCGATED_SHIFT   (0x00000006U)
 
#define CSL_DSS_VP4_CONFIG_HSYNCGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_HSYNCGATED_VAL_HGDIS   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_HSYNCGATED_VAL_HGENB   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_VSYNCGATED_MASK   (0x00000080U)
 
#define CSL_DSS_VP4_CONFIG_VSYNCGATED_SHIFT   (0x00000007U)
 
#define CSL_DSS_VP4_CONFIG_VSYNCGATED_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_VSYNCGATED_VAL_VGDIS   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_VSYNCGATED_VAL_VGENB   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_MASK   (0x00000100U)
 
#define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_RESERVED1_MASK   (0x00007E00U)
 
#define CSL_DSS_VP4_CONFIG_RESERVED1_SHIFT   (0x00000009U)
 
#define CSL_DSS_VP4_CONFIG_RESERVED1_MAX   (0x0000003FU)
 
#define CSL_DSS_VP4_CONFIG_CPR_MASK   (0x00008000U)
 
#define CSL_DSS_VP4_CONFIG_CPR_SHIFT   (0x0000000FU)
 
#define CSL_DSS_VP4_CONFIG_CPR_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_MASK   (0x00010000U)
 
#define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_RESERVED2_MASK   (0x000E0000U)
 
#define CSL_DSS_VP4_CONFIG_RESERVED2_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP4_CONFIG_RESERVED2_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CONFIG_BT656ENABLE_MASK   (0x00100000U)
 
#define CSL_DSS_VP4_CONFIG_BT656ENABLE_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_CONFIG_BT656ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_BT656ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_BT656ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_MASK   (0x00200000U)
 
#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_MASK   (0x00400000U)
 
#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_SHIFT   (0x00000016U)
 
#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_FIDFIRST_MASK   (0x00800000U)
 
#define CSL_DSS_VP4_CONFIG_FIDFIRST_SHIFT   (0x00000017U)
 
#define CSL_DSS_VP4_CONFIG_FIDFIRST_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_FIDFIRST_VAL_EVEN   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_FIDFIRST_VAL_ODD   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_MASK   (0x01000000U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_FULLRANGE_MASK   (0x02000000U)
 
#define CSL_DSS_VP4_CONFIG_FULLRANGE_SHIFT   (0x00000019U)
 
#define CSL_DSS_VP4_CONFIG_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_MASK   (0x04000000U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA   (0x0U)
 
#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA   (0x1U)
 
#define CSL_DSS_VP4_CONFIG_RESERVED3_MASK   (0xF8000000U)
 
#define CSL_DSS_VP4_CONFIG_RESERVED3_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP4_CONFIG_RESERVED3_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_CONTROL_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CONTROL_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_ENABLE_VAL_LCDOPDIS   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_ENABLE_VAL_LCDOPENB   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_MASK   (0x00000002U)
 
#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_MONOCOLOR_MASK   (0x00000004U)
 
#define CSL_DSS_VP4_CONTROL_MONOCOLOR_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP4_CONTROL_MONOCOLOR_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_STN_MASK   (0x00000008U)
 
#define CSL_DSS_VP4_CONTROL_STN_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP4_CONTROL_STN_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_M8B_MASK   (0x00000010U)
 
#define CSL_DSS_VP4_CONTROL_M8B_SHIFT   (0x00000004U)
 
#define CSL_DSS_VP4_CONTROL_M8B_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_GOBIT_MASK   (0x00000020U)
 
#define CSL_DSS_VP4_CONTROL_GOBIT_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP4_CONTROL_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_DPIENABLE_MASK   (0x00000040U)
 
#define CSL_DSS_VP4_CONTROL_DPIENABLE_SHIFT   (0x00000006U)
 
#define CSL_DSS_VP4_CONTROL_DPIENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_DPIENABLE_VAL_DPIOPDIS   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_DPIENABLE_VAL_DPIOPENB   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_MASK   (0x00000080U)
 
#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_SHIFT   (0x00000007U)
 
#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_VAL_STDITHDIS   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_VAL_STDITHENB   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_MASK   (0x00000700U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB12B   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB16B   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB18B   (0x2U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB24B   (0x3U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB30B   (0x4U)
 
#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB36B   (0x5U)
 
#define CSL_DSS_VP4_CONTROL_STALLMODE_MASK   (0x00000800U)
 
#define CSL_DSS_VP4_CONTROL_STALLMODE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP4_CONTROL_STALLMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_STALLMODE_VAL_STALLDIS   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_STALLMODE_VAL_STALLENB   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_MASK   (0x00001000U)
 
#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_VAL_COMMANDMODE   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_VAL_VIDEOMODE   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_RESERVED3_MASK   (0x00002000U)
 
#define CSL_DSS_VP4_CONTROL_RESERVED3_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP4_CONTROL_RESERVED3_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_HT_MASK   (0x0001C000U)
 
#define CSL_DSS_VP4_CONTROL_HT_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP4_CONTROL_HT_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CONTROL_RESERVED1_MASK   (0x000E0000U)
 
#define CSL_DSS_VP4_CONTROL_RESERVED1_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP4_CONTROL_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CONTROL_TDMENABLE_MASK   (0x00100000U)
 
#define CSL_DSS_VP4_CONTROL_TDMENABLE_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_CONTROL_TDMENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_CONTROL_TDMENABLE_VAL_TDMDIS   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_TDMENABLE_VAL_TDMENB   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_MASK   (0x00600000U)
 
#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_MAX   (0x00000003U)
 
#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT   (0x2U)
 
#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT   (0x3U)
 
#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_MASK   (0x01800000U)
 
#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_SHIFT   (0x00000017U)
 
#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_MAX   (0x00000003U)
 
#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX   (0x2U)
 
#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX   (0x3U)
 
#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_MASK   (0x06000000U)
 
#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_SHIFT   (0x00000019U)
 
#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_MAX   (0x00000003U)
 
#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED   (0x2U)
 
#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_RES   (0x3U)
 
#define CSL_DSS_VP4_CONTROL_RESERVED_MASK   (0x38000000U)
 
#define CSL_DSS_VP4_CONTROL_RESERVED_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP4_CONTROL_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK   (0xC0000000U)
 
#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT   (0x0000001EU)
 
#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX   (0x00000003U)
 
#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME   (0x0U)
 
#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES   (0x1U)
 
#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES   (0x2U)
 
#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VP4_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP4_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP4_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP4_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_MASK   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_MASK   (0x000000E0U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_SHIFT   (0x00000005U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_MASK   (0x0000F000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_MASK   (0x001F0000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_MASK   (0x00E00000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_SHIFT   (0x00000015U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_MASK   (0xF0000000U)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_SHIFT   (0x0000001CU)
 
#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP4_LINE_NUMBER_RESERVED_MASK   (0xFFFFC000U)
 
#define CSL_DSS_VP4_LINE_NUMBER_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP4_LINE_NUMBER_RESERVED_MAX   (0x0003FFFFU)
 
#define CSL_DSS_VP4_POL_FREQ_ACB_MASK   (0x000000FFU)
 
#define CSL_DSS_VP4_POL_FREQ_ACB_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_POL_FREQ_ACB_MAX   (0x000000FFU)
 
#define CSL_DSS_VP4_POL_FREQ_ACBI_MASK   (0x00000F00U)
 
#define CSL_DSS_VP4_POL_FREQ_ACBI_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP4_POL_FREQ_ACBI_MAX   (0x0000000FU)
 
#define CSL_DSS_VP4_POL_FREQ_IVS_MASK   (0x00001000U)
 
#define CSL_DSS_VP4_POL_FREQ_IVS_SHIFT   (0x0000000CU)
 
#define CSL_DSS_VP4_POL_FREQ_IVS_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_POL_FREQ_IVS_VAL_FCKPINAH   (0x0U)
 
#define CSL_DSS_VP4_POL_FREQ_IVS_VAL_FCKPINAL   (0x1U)
 
#define CSL_DSS_VP4_POL_FREQ_IHS_MASK   (0x00002000U)
 
#define CSL_DSS_VP4_POL_FREQ_IHS_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP4_POL_FREQ_IHS_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_POL_FREQ_IHS_VAL_LCKPINAH   (0x0U)
 
#define CSL_DSS_VP4_POL_FREQ_IHS_VAL_LCKPINAL   (0x1U)
 
#define CSL_DSS_VP4_POL_FREQ_IPC_MASK   (0x00004000U)
 
#define CSL_DSS_VP4_POL_FREQ_IPC_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP4_POL_FREQ_IPC_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_POL_FREQ_IPC_VAL_DRPCK   (0x0U)
 
#define CSL_DSS_VP4_POL_FREQ_IPC_VAL_DFPCK   (0x1U)
 
#define CSL_DSS_VP4_POL_FREQ_IEO_MASK   (0x00008000U)
 
#define CSL_DSS_VP4_POL_FREQ_IEO_SHIFT   (0x0000000FU)
 
#define CSL_DSS_VP4_POL_FREQ_IEO_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_POL_FREQ_IEO_VAL_ACBAHIGH   (0x0U)
 
#define CSL_DSS_VP4_POL_FREQ_IEO_VAL_ACBALOW   (0x1U)
 
#define CSL_DSS_VP4_POL_FREQ_RF_MASK   (0x00010000U)
 
#define CSL_DSS_VP4_POL_FREQ_RF_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_POL_FREQ_RF_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_POL_FREQ_RF_VAL_DFEDPCK   (0x0U)
 
#define CSL_DSS_VP4_POL_FREQ_RF_VAL_DRIEDPCK   (0x1U)
 
#define CSL_DSS_VP4_POL_FREQ_ONOFF_MASK   (0x00020000U)
 
#define CSL_DSS_VP4_POL_FREQ_ONOFF_SHIFT   (0x00000011U)
 
#define CSL_DSS_VP4_POL_FREQ_ONOFF_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_POL_FREQ_ONOFF_VAL_DOPEDPCK   (0x0U)
 
#define CSL_DSS_VP4_POL_FREQ_ONOFF_VAL_DBIT16   (0x1U)
 
#define CSL_DSS_VP4_POL_FREQ_ALIGN_MASK   (0x00040000U)
 
#define CSL_DSS_VP4_POL_FREQ_ALIGN_SHIFT   (0x00000012U)
 
#define CSL_DSS_VP4_POL_FREQ_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_POL_FREQ_ALIGN_VAL_NOTALIGNED   (0x0U)
 
#define CSL_DSS_VP4_POL_FREQ_ALIGN_VAL_ALIGNED   (0x1U)
 
#define CSL_DSS_VP4_POL_FREQ_RESERVED_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP4_POL_FREQ_RESERVED_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP4_POL_FREQ_RESERVED_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP4_SIZE_SCREEN_PPL_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP4_SIZE_SCREEN_PPL_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_SIZE_SCREEN_PPL_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_MASK   (0x0000C000U)
 
#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_MAX   (0x00000003U)
 
#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_SAME   (0x0U)
 
#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE   (0x1U)
 
#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE   (0x2U)
 
#define CSL_DSS_VP4_SIZE_SCREEN_LPP_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP4_SIZE_SCREEN_LPP_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_SIZE_SCREEN_LPP_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP4_TIMING_H_HSW_MASK   (0x000000FFU)
 
#define CSL_DSS_VP4_TIMING_H_HSW_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_TIMING_H_HSW_MAX   (0x000000FFU)
 
#define CSL_DSS_VP4_TIMING_H_HFP_MASK   (0x000FFF00U)
 
#define CSL_DSS_VP4_TIMING_H_HFP_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP4_TIMING_H_HFP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP4_TIMING_H_HBP_MASK   (0xFFF00000U)
 
#define CSL_DSS_VP4_TIMING_H_HBP_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_TIMING_H_HBP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP4_TIMING_V_VSW_MASK   (0x000000FFU)
 
#define CSL_DSS_VP4_TIMING_V_VSW_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_TIMING_V_VSW_MAX   (0x000000FFU)
 
#define CSL_DSS_VP4_TIMING_V_VFP_MASK   (0x000FFF00U)
 
#define CSL_DSS_VP4_TIMING_V_VFP_SHIFT   (0x00000008U)
 
#define CSL_DSS_VP4_TIMING_V_VFP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP4_TIMING_V_VBP_MASK   (0xFFF00000U)
 
#define CSL_DSS_VP4_TIMING_V_VBP_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_TIMING_V_VBP_MAX   (0x00000FFFU)
 
#define CSL_DSS_VP4_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_VP4_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_VP4_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_VP4_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP4_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP4_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP4_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP4_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP4_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP4_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP4_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_VP4_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP   (0x0U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)
 
#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)
 
#define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP4_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP4_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP4_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_MASK   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_MASK   (0x000FFC00U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_SHIFT   (0x0000000AU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_MASK   (0x3FF00000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_SHIFT   (0x00000014U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_MAX   (0x000003FFU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_MASK   (0x80000000U)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_SHIFT   (0x0000001FU)
 
#define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_MASK   (0x00003FFFU)
 
#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_MAX   (0x00003FFFU)
 
#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_MASK   (0xFFFFC000U)
 
#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_MAX   (0x0003FFFFU)
 
#define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_VP4_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_VP4_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_VP4_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_VP4_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_VP4_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_VP4_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_VP4_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_VP4_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_WB_ACCUH_0   (0x00000000U)
 
#define CSL_DSS_WB_ACCUH_1   (0x00000004U)
 
#define CSL_DSS_WB_ACCUH2_0   (0x00000008U)
 
#define CSL_DSS_WB_ACCUH2_1   (0x0000000CU)
 
#define CSL_DSS_WB_ACCUV_0   (0x00000010U)
 
#define CSL_DSS_WB_ACCUV_1   (0x00000014U)
 
#define CSL_DSS_WB_ACCUV2_0   (0x00000018U)
 
#define CSL_DSS_WB_ACCUV2_1   (0x0000001CU)
 
#define CSL_DSS_WB_ATTRIBUTES   (0x00000020U)
 
#define CSL_DSS_WB_ATTRIBUTES2   (0x00000024U)
 
#define CSL_DSS_WB_BA_0   (0x00000028U)
 
#define CSL_DSS_WB_BA_1   (0x0000002CU)
 
#define CSL_DSS_WB_BA_UV_0   (0x00000030U)
 
#define CSL_DSS_WB_BA_UV_1   (0x00000034U)
 
#define CSL_DSS_WB_BUF_SIZE_STATUS   (0x00000038U)
 
#define CSL_DSS_WB_BUF_THRESHOLD   (0x0000003CU)
 
#define CSL_DSS_WB_CSC_COEF0   (0x00000040U)
 
#define CSL_DSS_WB_CSC_COEF1   (0x00000044U)
 
#define CSL_DSS_WB_CSC_COEF2   (0x00000048U)
 
#define CSL_DSS_WB_CSC_COEF3   (0x0000004CU)
 
#define CSL_DSS_WB_CSC_COEF4   (0x00000050U)
 
#define CSL_DSS_WB_CSC_COEF5   (0x00000054U)
 
#define CSL_DSS_WB_CSC_COEF6   (0x00000058U)
 
#define CSL_DSS_WB_FIRH   (0x0000005CU)
 
#define CSL_DSS_WB_FIRH2   (0x00000060U)
 
#define CSL_DSS_WB_FIRV   (0x00000064U)
 
#define CSL_DSS_WB_FIRV2   (0x00000068U)
 
#define CSL_DSS_WB_FIR_COEF_H0(index)   (0x0000006CU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_WB_FIR_COEF_H0_C(index)   (0x00000090U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_WB_FIR_COEF_H12(index)   (0x000000B4U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_WB_FIR_COEF_H12_C(index)   (0x000000F4U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_WB_FIR_COEF_V0(index)   (0x00000134U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_WB_FIR_COEF_V0_C(index)   (0x00000158U+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_WB_FIR_COEF_V12(index)   (0x0000017CU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_WB_FIR_COEF_V12_C(index)   (0x000001BCU+((uint32_t)(index)*0x4U))
 
#define CSL_DSS_WB_MFLAG_THRESHOLD   (0x00000204U)
 
#define CSL_DSS_WB_PICTURE_SIZE   (0x00000208U)
 
#define CSL_DSS_WB_SIZE   (0x00000210U)
 
#define CSL_DSS_WB_POSITION   (0x00000214U)
 
#define CSL_DSS_WB_CSC_COEF7   (0x0000021CU)
 
#define CSL_DSS_WB_ROW_INC   (0x00000224U)
 
#define CSL_DSS_WB_ROW_INC_UV   (0x00000228U)
 
#define CSL_DSS_WB_BA_EXT_0   (0x0000022CU)
 
#define CSL_DSS_WB_BA_EXT_1   (0x00000230U)
 
#define CSL_DSS_WB_BA_UV_EXT_0   (0x00000234U)
 
#define CSL_DSS_WB_BA_UV_EXT_1   (0x00000238U)
 
#define CSL_DSS_WB_SECURE   (0x00000248U)
 
#define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUH_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_ACCUH_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ACCUH_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUH_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_ACCUH_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ACCUH_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUH2_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_ACCUH2_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ACCUH2_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUH2_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_ACCUH2_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ACCUH2_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_ACCUV_0_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUV_0_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ACCUV_0_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUV_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_ACCUV_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ACCUV_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_ACCUV_1_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUV_1_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ACCUV_1_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUV_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_ACCUV_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ACCUV_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUV2_0_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_ACCUV2_0_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ACCUV2_0_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_ACCUV2_1_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_ACCUV2_1_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ACCUV2_1_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_ATTRIBUTES_ENABLE_MASK   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ATTRIBUTES_ENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_ENABLE_VAL_WBDIS   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_ENABLE_VAL_WBENB   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)
 
#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)
 
#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_MASK   (0x00000180U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_SHIFT   (0x00000007U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_MAX   (0x00000003U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE   (0x2U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE   (0x3U)
 
#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_MASK   (0x00000200U)
 
#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_SHIFT   (0x00000009U)
 
#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_VAL_DISABLE   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED1_MASK   (0x00000400U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED1_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000800U)
 
#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x0000000BU)
 
#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_MASK   (0x00001000U)
 
#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000CU)
 
#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED2_MASK   (0x00002000U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED2_SHIFT   (0x0000000DU)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED3_MASK   (0x0007C000U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED3_SHIFT   (0x0000000EU)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED3_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_MASK   (0x00080000U)
 
#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_SHIFT   (0x00000013U)
 
#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_VAL_CAPTURE   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_VAL_MEM2MEM   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_GOBIT_MASK   (0x00100000U)
 
#define CSL_DSS_WB_ATTRIBUTES_GOBIT_SHIFT   (0x00000014U)
 
#define CSL_DSS_WB_ATTRIBUTES_GOBIT_SET   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_GOBIT_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_GOBIT_VAL_HFUISR   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_GOBIT_VAL_UFPSR   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_MASK   (0x00200000U)
 
#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_SHIFT   (0x00000015U)
 
#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED4_MASK   (0x00400000U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED4_SHIFT   (0x00000016U)
 
#define CSL_DSS_WB_ATTRIBUTES_RESERVED4_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)
 
#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)
 
#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_MASK   (0x07000000U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000007U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ALL   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_2   (0x2U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_3   (0x3U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_4   (0x4U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_5   (0x5U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_6   (0x6U)
 
#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_7   (0x7U)
 
#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_MASK   (0x08000000U)
 
#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_SHIFT   (0x0000001BU)
 
#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_VAL_IDLESINGLE   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_VAL_IDLEBURST   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_MASK   (0xF0000000U)
 
#define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_SHIFT   (0x0000001CU)
 
#define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_MAX   (0x0000000FU)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED_MASK   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_MASK   (0x0000007EU)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_SHIFT   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_MAX   (0x0000003FU)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)
 
#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_MASK   (0x03FFF800U)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_MAX   (0x00007FFFU)
 
#define CSL_DSS_WB_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)
 
#define CSL_DSS_WB_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)
 
#define CSL_DSS_WB_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_MASK   (0x80000000U)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_SHIFT   (0x0000001FU)
 
#define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_MAX   (0x00000001U)
 
#define CSL_DSS_WB_BA_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BA_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BA_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BA_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BA_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BA_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BA_UV_0_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BA_UV_0_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BA_UV_0_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BA_UV_1_BA_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BA_UV_1_BA_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BA_UV_1_BA_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)
 
#define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)
 
#define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)
 
#define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_CSC_COEF0_C00_MASK   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF0_C00_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_CSC_COEF0_C00_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)
 
#define CSL_DSS_WB_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)
 
#define CSL_DSS_WB_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_CSC_COEF0_C01_MASK   (0x07FF0000U)
 
#define CSL_DSS_WB_CSC_COEF0_C01_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_CSC_COEF0_C01_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)
 
#define CSL_DSS_WB_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)
 
#define CSL_DSS_WB_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_CSC_COEF1_C02_MASK   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF1_C02_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_CSC_COEF1_C02_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)
 
#define CSL_DSS_WB_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)
 
#define CSL_DSS_WB_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_CSC_COEF1_C10_MASK   (0x07FF0000U)
 
#define CSL_DSS_WB_CSC_COEF1_C10_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_CSC_COEF1_C10_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)
 
#define CSL_DSS_WB_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)
 
#define CSL_DSS_WB_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_CSC_COEF2_C11_MASK   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF2_C11_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_CSC_COEF2_C11_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)
 
#define CSL_DSS_WB_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)
 
#define CSL_DSS_WB_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_CSC_COEF2_C12_MASK   (0x07FF0000U)
 
#define CSL_DSS_WB_CSC_COEF2_C12_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_CSC_COEF2_C12_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)
 
#define CSL_DSS_WB_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)
 
#define CSL_DSS_WB_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_CSC_COEF3_C20_MASK   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF3_C20_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_CSC_COEF3_C20_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)
 
#define CSL_DSS_WB_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)
 
#define CSL_DSS_WB_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_CSC_COEF3_C21_MASK   (0x07FF0000U)
 
#define CSL_DSS_WB_CSC_COEF3_C21_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_CSC_COEF3_C21_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)
 
#define CSL_DSS_WB_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)
 
#define CSL_DSS_WB_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)
 
#define CSL_DSS_WB_CSC_COEF4_C22_MASK   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF4_C22_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_CSC_COEF4_C22_MAX   (0x000007FFU)
 
#define CSL_DSS_WB_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)
 
#define CSL_DSS_WB_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)
 
#define CSL_DSS_WB_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)
 
#define CSL_DSS_WB_CSC_COEF5_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_CSC_COEF5_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)
 
#define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)
 
#define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_WB_CSC_COEF5_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_WB_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_CSC_COEF5_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)
 
#define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)
 
#define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_WB_CSC_COEF6_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_CSC_COEF6_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)
 
#define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)
 
#define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_WB_CSC_COEF6_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_WB_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_CSC_COEF6_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)
 
#define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)
 
#define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)
 
#define CSL_DSS_WB_FIRH_FIRHINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_FIRH_FIRHINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIRH_FIRHINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_FIRH_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_FIRH_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_FIRH_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_FIRH2_FIRHINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_FIRH2_FIRHINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIRH2_FIRHINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_FIRH2_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_FIRH2_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_FIRH2_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_FIRV_FIRVINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_FIRV_FIRVINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIRV_FIRVINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_FIRV_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_FIRV_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_FIRV_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_FIRV2_FIRVINC_MASK   (0x00FFFFFFU)
 
#define CSL_DSS_WB_FIRV2_FIRVINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIRV2_FIRVINC_MAX   (0x00FFFFFFU)
 
#define CSL_DSS_WB_FIRV2_RESERVED_MASK   (0xFF000000U)
 
#define CSL_DSS_WB_FIRV2_RESERVED_SHIFT   (0x00000018U)
 
#define CSL_DSS_WB_FIRV2_RESERVED_MAX   (0x000000FFU)
 
#define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_MASK   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H0_RESERVED_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_WB_FIR_COEF_H0_RESERVED_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_FIR_COEF_H0_RESERVED_MAX   (0x000FFFFFU)
 
#define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_MASK   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_MAX   (0x000FFFFFU)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_FIR_COEF_H12_RESERVED_MASK   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H12_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIR_COEF_H12_RESERVED_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_MASK   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_MASK   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V0_RESERVED_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_WB_FIR_COEF_V0_RESERVED_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_FIR_COEF_V0_RESERVED_MAX   (0x000FFFFFU)
 
#define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_MASK   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_MASK   (0x3FFFFC00U)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_MAX   (0x000FFFFFU)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_FIR_COEF_V12_RESERVED_MASK   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V12_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIR_COEF_V12_RESERVED_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_MASK   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_MASK   (0x000FFC00U)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_SHIFT   (0x0000000AU)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_MASK   (0x3FF00000U)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_SHIFT   (0x00000014U)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_MAX   (0x000003FFU)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)
 
#define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)
 
#define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_WB_SIZE_SIZEX_MASK   (0x00003FFFU)
 
#define CSL_DSS_WB_SIZE_SIZEX_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_SIZE_SIZEX_MAX   (0x00003FFFU)
 
#define CSL_DSS_WB_SIZE_SIZEY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_WB_SIZE_SIZEY_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_SIZE_SIZEY_MAX   (0x00003FFFU)
 
#define CSL_DSS_WB_POSITION_POSX_MASK   (0x00003FFFU)
 
#define CSL_DSS_WB_POSITION_POSX_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_POSITION_POSX_MAX   (0x00003FFFU)
 
#define CSL_DSS_WB_POSITION_RESERVED_MASK   (0x0000C000U)
 
#define CSL_DSS_WB_POSITION_RESERVED_SHIFT   (0x0000000EU)
 
#define CSL_DSS_WB_POSITION_RESERVED_MAX   (0x00000003U)
 
#define CSL_DSS_WB_POSITION_POSY_MASK   (0x3FFF0000U)
 
#define CSL_DSS_WB_POSITION_POSY_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_POSITION_POSY_MAX   (0x00003FFFU)
 
#define CSL_DSS_WB_POSITION_RESERVED1_MASK   (0xC0000000U)
 
#define CSL_DSS_WB_POSITION_RESERVED1_SHIFT   (0x0000001EU)
 
#define CSL_DSS_WB_POSITION_RESERVED1_MAX   (0x00000003U)
 
#define CSL_DSS_WB_CSC_COEF7_RESERVED_MASK   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_CSC_COEF7_RESERVED_MAX   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)
 
#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)
 
#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)
 
#define CSL_DSS_WB_CSC_COEF7_RESERVED1_MASK   (0x00070000U)
 
#define CSL_DSS_WB_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_CSC_COEF7_RESERVED1_MAX   (0x00000007U)
 
#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)
 
#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)
 
#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)
 
#define CSL_DSS_WB_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_ROW_INC_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)
 
#define CSL_DSS_WB_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_WB_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_WB_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)
 
#define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)
 
#define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)
 
#define CSL_DSS_WB_SECURE_SECURE_MASK   (0x00000001U)
 
#define CSL_DSS_WB_SECURE_SECURE_SHIFT   (0x00000000U)
 
#define CSL_DSS_WB_SECURE_SECURE_MAX   (0x00000001U)
 
#define CSL_DSS_WB_SECURE_SECURE_VAL_SECUREDIS   (0x0U)
 
#define CSL_DSS_WB_SECURE_SECURE_VAL_SECUREEN   (0x1U)
 
#define CSL_DSS_WB_SECURE_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_WB_SECURE_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_WB_SECURE_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW   (0x00000028U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS   (0x0000002CU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET   (0x00000030U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR   (0x00000034U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0   (0x00000038U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1   (0x0000003CU)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2   (0x00000040U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3   (0x00000044U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0   (0x00000048U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1   (0x0000004CU)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2   (0x00000050U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3   (0x00000054U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0   (0x00000058U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1   (0x0000005CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2   (0x00000060U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3   (0x00000064U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0   (0x00000068U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1   (0x0000006CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2   (0x00000070U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3   (0x00000074U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE   (0x00000078U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS   (0x0000007CU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC   (0x00000080U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY   (0x00000084U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY   (0x00000088U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW   (0x00000028U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS   (0x0000002CU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET   (0x00000030U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR   (0x00000034U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0   (0x00000038U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1   (0x0000003CU)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2   (0x00000040U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3   (0x00000044U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0   (0x00000048U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1   (0x0000004CU)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2   (0x00000050U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3   (0x00000054U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0   (0x00000058U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1   (0x0000005CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2   (0x00000060U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3   (0x00000064U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0   (0x00000068U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1   (0x0000006CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2   (0x00000070U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3   (0x00000074U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE   (0x00000078U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS   (0x0000007CU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC   (0x00000080U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY   (0x00000084U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY   (0x00000088U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK   (0x000000F0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK   (0x00001F00U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX   (0x0000001FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK   (0x00002000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK   (0x00004000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT   (0x0000000EU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK   (0x00008000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK   (0x00010000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x000003C0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000006U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK   (0x00000800U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT   (0x0000000BU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_MASK   (0x00001000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT   (0x0000000CU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK   (0x0001E000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX   (0x0000000FU)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_MASK   (0xFFFE0000U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_SHIFT   (0x00000011U)
 
#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_MAX   (0x00007FFFU)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT   (0x00000002U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK   (0x00000008U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT   (0x00000003U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_MASK   (0x00000010U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT   (0x00000004U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND   (0x0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND   (0x1U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_MASK   (0xFFFFFFE0U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_SHIFT   (0x00000005U)
 
#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_MAX   (0x07FFFFFFU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX   (0x7FFFFFFFU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_MASK   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT   (0x00000000U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_MAX   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION   (0x0U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI   (0x1U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK   (0xFFFFFFFEU)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT   (0x00000001U)
 
#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX   (0x7FFFFFFFU)
 

Macro Definition Documentation

◆ CSL_DSS_COMMON_M_DSS_REVISION

#define CSL_DSS_COMMON_M_DSS_REVISION   (0x00000004U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG   (0x00000008U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS   (0x00000020U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW   (0x00000028U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS   (0x0000002CU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET   (0x00000030U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR   (0x00000034U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0   (0x00000038U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1   (0x0000003CU)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2   (0x00000040U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3   (0x00000044U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0   (0x00000048U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1   (0x0000004CU)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2   (0x00000050U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3   (0x00000054U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0   (0x00000058U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1   (0x0000005CU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2   (0x00000060U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3   (0x00000064U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0   (0x00000068U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1   (0x0000006CU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2   (0x00000070U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3   (0x00000074U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE

#define CSL_DSS_COMMON_M_WB_IRQENABLE   (0x00000078U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS

#define CSL_DSS_COMMON_M_WB_IRQSTATUS   (0x0000007CU)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC   (0x00000080U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY   (0x00000084U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY   (0x00000088U)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE   (0x00000090U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE   (0x00000098U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE   (0x0000009CU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER   (0x000000A0U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG

#define CSL_DSS_COMMON_M_DSS_CBA_CFG   (0x000000A4U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL   (0x000000A8U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_STATUS

#define CSL_DSS_COMMON_M_DISPC_DBG_STATUS   (0x000000ACU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE   (0x000000B0U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_1

#define CSL_DSS_COMMON_M_FBDC_REVISION_1   (0x000000B8U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_2

#define CSL_DSS_COMMON_M_FBDC_REVISION_2   (0x000000BCU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_3

#define CSL_DSS_COMMON_M_FBDC_REVISION_3   (0x000000C0U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_4

#define CSL_DSS_COMMON_M_FBDC_REVISION_4   (0x000000C4U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_5

#define CSL_DSS_COMMON_M_FBDC_REVISION_5   (0x000000C8U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_6

#define CSL_DSS_COMMON_M_FBDC_REVISION_6   (0x000000CCU)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL   (0x000000D0U)

◆ CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0

#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0   (0x000000D4U)

◆ CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1

#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1   (0x000000D8U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS   (0x000000E4U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1   (0x000000E8U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3   (0x000000ECU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE   (0x000000F0U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS   (0x000000F4U)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE   (0x000000F8U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_MASK

#define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_MASK   (0x0000003FU)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_SHIFT

#define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_MAX

#define CSL_DSS_COMMON_M_DSS_REVISION_REVMIN_MAX   (0x0000003FU)

◆ CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_MASK

#define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_MASK   (0x000000C0U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_SHIFT

#define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_MAX

#define CSL_DSS_COMMON_M_DSS_REVISION_CUSTOM_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_MASK

#define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_MASK   (0x00000700U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_SHIFT

#define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_MAX

#define CSL_DSS_COMMON_M_DSS_REVISION_REVMAJOR_MAX   (0x00000007U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_MASK

#define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_MASK   (0x0000F800U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_SHIFT

#define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_MAX

#define CSL_DSS_COMMON_M_DSS_REVISION_REVRTL_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_DSS_REVISION_MODID_MASK

#define CSL_DSS_COMMON_M_DSS_REVISION_MODID_MASK   (0xFFFF0000U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_MODID_SHIFT

#define CSL_DSS_COMMON_M_DSS_REVISION_MODID_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_DSS_REVISION_MODID_MAX

#define CSL_DSS_COMMON_M_DSS_REVISION_MODID_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_MASK

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_MAX

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKFREE

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKFREE   (0x0U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKGATED

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_AUTOCLKGATING_VAL_CLKGATED   (0x1U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_MASK

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_MAX

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_SOFTRESET_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_MASK

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_MAX

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED1_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_MASK

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_MASK   (0x00000018U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_MAX

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_IDLEMODE_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_MASK

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_MAX

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_WARMRESET_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_MASK

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_MASK   (0x000000C0U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_MAX

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED2_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_MASK

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_MASK   (0x00003F00U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_MAX

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED3_MAX   (0x0000003FU)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_MASK

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_MASK   (0xFFFFC000U)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_MAX

#define CSL_DSS_COMMON_M_DSS_SYSCONFIG_RESERVED4_MAX   (0x0003FFFFU)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MASK

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MAX

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTONGOING

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTONGOING   (0x0U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTCOMP

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_FUNC_RESETDONE_VAL_RSTCOMP   (0x1U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MASK

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MASK   (0x0000001EU)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MAX

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTONGOING

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTONGOING   (0x0U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTCOMP

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_VP_RESETDONE_VAL_RSTCOMP   (0x1U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_MASK

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_MASK   (0x000001E0U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_MAX

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_VAL_RSTONGOING

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_VAL_RSTONGOING   (0x0U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_VAL_RSTCOMP

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED5_VAL_RSTCOMP   (0x1U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MASK

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MASK   (0x00000200U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_SHIFT   (0x00000009U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MAX

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_NOTIDLE

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_NOTIDLE   (0x0U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_IDLE

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_DISPC_IDLE_STATUS_VAL_IDLE   (0x1U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_MASK

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_MASK   (0xFFFFFC00U)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_SHIFT

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_MAX

#define CSL_DSS_COMMON_M_DSS_SYSSTATUS_RESERVED4_MAX   (0x003FFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RAW_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQSTATUS_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_SET_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQENABLE_CLR_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_0_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_1_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_2_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_MASK

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_MAX

#define CSL_DSS_COMMON_M_VID_IRQENABLE_3_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_0_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_1_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_2_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_MASK

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_MAX

#define CSL_DSS_COMMON_M_VID_IRQSTATUS_3_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_0_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_1_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_2_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_MASK

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_MAX

#define CSL_DSS_COMMON_M_VP_IRQENABLE_3_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_0_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_1_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_2_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_MASK

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_MAX

#define CSL_DSS_COMMON_M_VP_IRQSTATUS_3_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MASK

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MAX

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_MASK

#define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_MAX

#define CSL_DSS_COMMON_M_WB_IRQENABLE_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_MASK

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_MAX

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_M_WB_IRQSTATUS_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_FUNC_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_MASK

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_SHIFT

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_MAX

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREEN

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREEN   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREDIS

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_SECURE_DISABLE_VAL_SECUREDIS   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_SECURE_DISABLE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MASK   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MASK   (0x0000003CU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED1_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MASK   (0x00000040U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MASK   (0x00000180U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_SHIFT   (0x00000007U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED2_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MASK   (0xFFFFFE00U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_SHIFT   (0x00000009U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_MFLAG_ATTRIBUTE_RESERVED_MAX   (0x007FFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_DISABLE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_ENABLE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MASK   (0x0000FFF0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED1_MAX   (0x00000FFFU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MASK   (0x000F0000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_HFUISR

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_HFUISR   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_UFPSR

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_VP_GO_VAL_UFPSR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MASK   (0xFFF00000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_OUTPUT_ENABLE_RESERVED2_MAX   (0x00000FFFU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_MASK   (0x00000007U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_MAX   (0x00000007U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VID1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VID1   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VIDL1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VIDL1   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VID2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VID2   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VIDL2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_VIDL2   (0x3U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_WB

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID1_BUFFER_VAL_WB   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MASK   (0x00000038U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_MAX   (0x00000007U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VID1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VID1   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VIDL1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VIDL1   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VID2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VID2   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VIDL2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_VIDL2   (0x3U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_WB

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL1_BUFFER_VAL_WB   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_MASK   (0x000001C0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_MAX   (0x00000007U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VID1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VID1   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VIDL1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VIDL1   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VID2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VID2   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VIDL2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_VIDL2   (0x3U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_WB

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VID2_BUFFER_VAL_WB   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_MASK   (0x00000E00U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_SHIFT   (0x00000009U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_MAX   (0x00000007U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VID1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VID1   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VIDL1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VIDL1   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VID2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VID2   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VIDL2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_VIDL2   (0x3U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_WB

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_VIDL2_BUFFER_VAL_WB   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_MASK   (0x00007000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_MAX   (0x00000007U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VID1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VID1   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VIDL1

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VIDL1   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VID2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VID2   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VIDL2

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_VIDL2   (0x3U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_WB

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_WB_BUFFER_VAL_WB   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_MASK   (0x1FFF8000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED_MAX   (0x00003FFFU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_MASK   (0x20000000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_SHIFT   (0x0000001DU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_RESERVED1_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_MASK   (0x40000000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_SHIFT   (0x0000001EU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_VAL_DISABLE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_VAL_ENABLE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_SHAREDBUFENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MASK

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MASK   (0x80000000U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_SHIFT

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_SHIFT   (0x0000001FU)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MAX

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_INDIVIDUALPIPE

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_INDIVIDUALPIPE   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_ALLPIPES

#define CSL_DSS_COMMON_M_DISPC_GLOBAL_BUFFER_BUFFERFILLING_VAL_ALLPIPES   (0x1U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_MASK

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_MASK   (0x00000007U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_SHIFT

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_MAX

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_LO_MAX   (0x00000007U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_MASK

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_MASK   (0x00000038U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_SHIFT

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_MAX

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_PRI_HI_MAX   (0x00000007U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_MASK

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_MASK   (0x00000040U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_SHIFT

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_MAX

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_MASK

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_MASK   (0x00000180U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_SHIFT

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_SHIFT   (0x00000007U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_MAX

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_DMA_BACKLOGSTATUS_DISABLE_VAL_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_MASK

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_MASK   (0xFFFFFE00U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_SHIFT   (0x00000009U)

◆ CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_MAX

#define CSL_DSS_COMMON_M_DSS_CBA_CFG_RESERVED_MAX   (0x007FFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_MASK

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_SHIFT

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_MAX

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_VAL_DBGDIS

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_VAL_DBGDIS   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_VAL_DBGEN

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGEN_VAL_DBGEN   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_MASK

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_MASK   (0x000001FEU)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_SHIFT

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_MAX

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_MAX   (0x000000FFU)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VID1SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VID1SEL   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL1SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL1SEL   (0x8U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VID2SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VID2SEL   (0x10U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL2SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VIDL2SEL   (0x18U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_WBSEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_WBSEL   (0x20U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR1SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR1SEL   (0x21U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR2SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR2SEL   (0x22U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR3SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR3SEL   (0x23U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR4SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_OVR4SEL   (0x24U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP1SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP1SEL   (0x25U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP2SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP2SEL   (0x27U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP3SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP3SEL   (0x29U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP4SEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_VP4SEL   (0x2BU)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_MISCSEL

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_DBGMUXSEL_VAL_MISCSEL   (0x2DU)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_MASK   (0xFFFFFE00U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_SHIFT   (0x00000009U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_DBG_CONTROL_RESERVED_MAX   (0x007FFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_MASK

#define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_SHIFT

#define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_MAX

#define CSL_DSS_COMMON_M_DISPC_DBG_STATUS_DBGOUT_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGEN

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGEN   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGDIS

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_DMA_VAL_CLKGATINGDIS   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_MASK   (0x00000006U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_MASK   (0x00000078U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGEN

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGEN   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGDIS

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VID_VAL_CLKGATINGDIS   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_MASK   (0x00000F80U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_SHIFT   (0x00000007U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED2_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_VAL_CLKGATINGEN

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_VAL_CLKGATINGEN   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_VAL_CLKGATINGDIS

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_WB_VAL_CLKGATINGDIS   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_MASK   (0x0003C000U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGEN

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGEN   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGDIS

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_OVR_VAL_CLKGATINGDIS   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_MASK   (0x003C0000U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_SHIFT   (0x00000012U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_VAL_CLKGATINGEN

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_VAL_CLKGATINGEN   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_VAL_CLKGATINGDIS

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_VP_VAL_CLKGATINGDIS   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_MASK   (0xFFC00000U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_SHIFT   (0x00000016U)

◆ CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_CLKGATING_DISABLE_RESERVED_MAX   (0x000003FFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_MASK   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_1_PRODUCTCODE_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_MASK   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_2_BRANCHCODE_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_2_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_MASK   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_3_VERSIONCODE_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_3_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_MASK   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_4_CORECODE_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_4_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_MASK   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_5_CONFIGCODE_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_5_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_MASK

#define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_MAX

#define CSL_DSS_COMMON_M_FBDC_REVISION_6_CHANGELISTCODE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_MASK

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_MAX

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_IDLEGATE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_MASK

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_MAX

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_CLKGATE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_MASK

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_SHIFT

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_MAX

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_VAL_8XE

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_VAL_8XE   (0x0U)

◆ CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_VAL_8XT

#define CSL_DSS_COMMON_M_FBDC_COMMON_CONTROL_GPUTYPE_VAL_8XT   (0x1U)

◆ CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_MASK

#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_SHIFT

#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_MAX

#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_0_CONSTCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_MASK

#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_SHIFT

#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_MAX

#define CSL_DSS_COMMON_M_FBDC_CONSTANT_COLOR_1_CONSTCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_MASK

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_MAX

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_NULL

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_NULL   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP1

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP1   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP2

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP2   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP3

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP3   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP4

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP4   (0x8U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_MASK

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_MAX

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_NULL

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_NULL   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP1

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP1   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP2

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP2   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP3

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP3   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP4

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP4   (0x8U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_MASK

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_MASK   (0x001F0000U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_MAX

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_NULL

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_NULL   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_VIDL2

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_VIDL2   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR1

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR1   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR2

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR2   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR3

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR3   (0x8U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR4

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_WB_CONN_VAL_OVR4   (0x10U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_MASK

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_MASK   (0x0F000000U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_SHIFT

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_SHIFT   (0x00000018U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_MAX

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_NULL

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_NULL   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP1

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP1   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP2

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP2   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP3

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP3   (0x4U)

◆ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP4

#define CSL_DSS_COMMON_M_DISPC_CONNECTIONS_VIRTUALVP_CONN_VAL_VP4   (0x8U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_MASK

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_SHIFT

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_MAX

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_VAL_MSSBYPASS

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_VAL_MSSBYPASS   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_VAL_MSSENABLE

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSENABLE_VAL_MSSENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_MASK

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_MASK   (0x00000006U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_SHIFT

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_MAX

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_MERGEENB

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_MERGEENB   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_SPLITENB

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_SPLITENB   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_SYNCENB

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSTYPE_VAL_SYNCENB   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_MASK

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_SHIFT

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_MAX

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_VAL_OE

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_VAL_OE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_VAL_LR

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_MSSFORMAT_VAL_LR   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_MSS_VP1_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_MASK

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_SHIFT

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_MAX

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_VAL_MSSBYPASS

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_VAL_MSSBYPASS   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_VAL_MSSENABLE

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSENABLE_VAL_MSSENABLE   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_MASK

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_MASK   (0x00000006U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_SHIFT

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_MAX

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_MAX   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_MERGEENB

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_MERGEENB   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_SPLITENB

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_SPLITENB   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_SYNCENB

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSTYPE_VAL_SYNCENB   (0x2U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_MASK

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_SHIFT

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_MAX

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_VAL_OE

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_VAL_OE   (0x0U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_VAL_LR

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_MSSFORMAT_VAL_LR   (0x1U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_MASK

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_MAX

#define CSL_DSS_COMMON_M_DISPC_MSS_VP3_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_MASK   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP0THREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_MASK   (0x000003E0U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP1THREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_MASK   (0x00007C00U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP2THREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_MASK   (0x000F8000U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_VP3THREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_MASK   (0x01F00000U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_SHIFT   (0x00000014U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_WBTHREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_MASK   (0xFE000000U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_SHIFT   (0x00000019U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZE_RESERVED_MAX   (0x0000007FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_MASK   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP0THREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_MASK   (0x000003E0U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP1THREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_MASK   (0x00007C00U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP2THREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_MASK   (0x000F8000U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_VP3THREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_MASK   (0x01F00000U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_SHIFT   (0x00000014U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_WBTHREADSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_MASK   (0xFE000000U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_SHIFT   (0x00000019U)

◆ CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_M_GLOBAL_DMA_THREADSIZESTATUS_RESERVED_MAX   (0x0000007FU)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_MASK

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_MAX

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_VAL_PIPEGODIS

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_VAL_PIPEGODIS   (0x0U)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_VAL_PIPEGOEN

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_MODE_VAL_PIPEGOEN   (0x1U)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_MASK

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_SHIFT

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_MAX

#define CSL_DSS_COMMON_M_GLOBAL_GOBITMODE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW   (0x00000028U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS   (0x0000002CU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET   (0x00000030U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR   (0x00000034U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0   (0x00000038U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1   (0x0000003CU)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2   (0x00000040U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3   (0x00000044U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0   (0x00000048U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1   (0x0000004CU)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2   (0x00000050U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3   (0x00000054U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0   (0x00000058U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1   (0x0000005CU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2   (0x00000060U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3   (0x00000064U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0   (0x00000068U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1   (0x0000006CU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2   (0x00000070U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3   (0x00000074U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE

#define CSL_DSS_COMMON_S0_WB_IRQENABLE   (0x00000078U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS   (0x0000007CU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC   (0x00000080U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY   (0x00000084U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY   (0x00000088U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RAW_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQSTATUS_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_SET_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQENABLE_CLR_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_0_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_1_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_2_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VID_IRQENABLE_3_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_0_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_1_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_2_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VID_IRQSTATUS_3_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_0_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_1_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_2_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VP_IRQENABLE_3_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_0_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_1_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_2_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_MASK

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_MAX

#define CSL_DSS_COMMON_S0_VP_IRQSTATUS_3_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_MASK

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_MAX

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_MASK

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_MAX

#define CSL_DSS_COMMON_S0_WB_IRQENABLE_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_S0_WB_IRQSTATUS_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_FUNC_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX

#define CSL_DSS_COMMON_S0_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VIDL1_ATTRIBUTES

#define CSL_DSS_VIDL1_ATTRIBUTES   (0x00000020U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2

#define CSL_DSS_VIDL1_ATTRIBUTES2   (0x00000024U)

◆ CSL_DSS_VIDL1_BA_0

#define CSL_DSS_VIDL1_BA_0   (0x00000028U)

◆ CSL_DSS_VIDL1_BA_1

#define CSL_DSS_VIDL1_BA_1   (0x0000002CU)

◆ CSL_DSS_VIDL1_BA_UV_0

#define CSL_DSS_VIDL1_BA_UV_0   (0x00000030U)

◆ CSL_DSS_VIDL1_BA_UV_1

#define CSL_DSS_VIDL1_BA_UV_1   (0x00000034U)

◆ CSL_DSS_VIDL1_BUF_SIZE_STATUS

#define CSL_DSS_VIDL1_BUF_SIZE_STATUS   (0x00000038U)

◆ CSL_DSS_VIDL1_BUF_THRESHOLD

#define CSL_DSS_VIDL1_BUF_THRESHOLD   (0x0000003CU)

◆ CSL_DSS_VIDL1_CSC_COEF0

#define CSL_DSS_VIDL1_CSC_COEF0   (0x00000040U)

◆ CSL_DSS_VIDL1_CSC_COEF1

#define CSL_DSS_VIDL1_CSC_COEF1   (0x00000044U)

◆ CSL_DSS_VIDL1_CSC_COEF2

#define CSL_DSS_VIDL1_CSC_COEF2   (0x00000048U)

◆ CSL_DSS_VIDL1_CSC_COEF3

#define CSL_DSS_VIDL1_CSC_COEF3   (0x0000004CU)

◆ CSL_DSS_VIDL1_CSC_COEF4

#define CSL_DSS_VIDL1_CSC_COEF4   (0x00000050U)

◆ CSL_DSS_VIDL1_CSC_COEF5

#define CSL_DSS_VIDL1_CSC_COEF5   (0x00000054U)

◆ CSL_DSS_VIDL1_CSC_COEF6

#define CSL_DSS_VIDL1_CSC_COEF6   (0x00000058U)

◆ CSL_DSS_VIDL1_GLOBAL_ALPHA

#define CSL_DSS_VIDL1_GLOBAL_ALPHA   (0x000001FCU)

◆ CSL_DSS_VIDL1_MFLAG_THRESHOLD

#define CSL_DSS_VIDL1_MFLAG_THRESHOLD   (0x00000208U)

◆ CSL_DSS_VIDL1_PICTURE_SIZE

#define CSL_DSS_VIDL1_PICTURE_SIZE   (0x0000020CU)

◆ CSL_DSS_VIDL1_PIXEL_INC

#define CSL_DSS_VIDL1_PIXEL_INC   (0x00000210U)

◆ CSL_DSS_VIDL1_PRELOAD

#define CSL_DSS_VIDL1_PRELOAD   (0x00000218U)

◆ CSL_DSS_VIDL1_ROW_INC

#define CSL_DSS_VIDL1_ROW_INC   (0x0000021CU)

◆ CSL_DSS_VIDL1_BA_EXT_0

#define CSL_DSS_VIDL1_BA_EXT_0   (0x0000022CU)

◆ CSL_DSS_VIDL1_BA_EXT_1

#define CSL_DSS_VIDL1_BA_EXT_1   (0x00000230U)

◆ CSL_DSS_VIDL1_BA_UV_EXT_0

#define CSL_DSS_VIDL1_BA_UV_EXT_0   (0x00000234U)

◆ CSL_DSS_VIDL1_BA_UV_EXT_1

#define CSL_DSS_VIDL1_BA_UV_EXT_1   (0x00000238U)

◆ CSL_DSS_VIDL1_CSC_COEF7

#define CSL_DSS_VIDL1_CSC_COEF7   (0x0000023CU)

◆ CSL_DSS_VIDL1_ROW_INC_UV

#define CSL_DSS_VIDL1_ROW_INC_UV   (0x00000248U)

◆ CSL_DSS_VIDL1_TILE

#define CSL_DSS_VIDL1_TILE   (0x0000024CU)

◆ CSL_DSS_VIDL1_TILE2

#define CSL_DSS_VIDL1_TILE2   (0x00000250U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES   (0x00000254U)

◆ CSL_DSS_VIDL1_FBDC_CLEAR_COLOR

#define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR   (0x00000258U)

◆ CSL_DSS_VIDL1_CLUT_0

#define CSL_DSS_VIDL1_CLUT_0   (0x00000260U)

◆ CSL_DSS_VIDL1_CLUT_1

#define CSL_DSS_VIDL1_CLUT_1   (0x00000264U)

◆ CSL_DSS_VIDL1_CLUT_2

#define CSL_DSS_VIDL1_CLUT_2   (0x00000268U)

◆ CSL_DSS_VIDL1_CLUT_3

#define CSL_DSS_VIDL1_CLUT_3   (0x0000026CU)

◆ CSL_DSS_VIDL1_CLUT_4

#define CSL_DSS_VIDL1_CLUT_4   (0x00000270U)

◆ CSL_DSS_VIDL1_CLUT_5

#define CSL_DSS_VIDL1_CLUT_5   (0x00000274U)

◆ CSL_DSS_VIDL1_CLUT_6

#define CSL_DSS_VIDL1_CLUT_6   (0x00000278U)

◆ CSL_DSS_VIDL1_CLUT_7

#define CSL_DSS_VIDL1_CLUT_7   (0x0000027CU)

◆ CSL_DSS_VIDL1_CLUT_8

#define CSL_DSS_VIDL1_CLUT_8   (0x00000280U)

◆ CSL_DSS_VIDL1_CLUT_9

#define CSL_DSS_VIDL1_CLUT_9   (0x00000284U)

◆ CSL_DSS_VIDL1_CLUT_10

#define CSL_DSS_VIDL1_CLUT_10   (0x00000288U)

◆ CSL_DSS_VIDL1_CLUT_11

#define CSL_DSS_VIDL1_CLUT_11   (0x0000028CU)

◆ CSL_DSS_VIDL1_CLUT_12

#define CSL_DSS_VIDL1_CLUT_12   (0x00000290U)

◆ CSL_DSS_VIDL1_CLUT_13

#define CSL_DSS_VIDL1_CLUT_13   (0x00000294U)

◆ CSL_DSS_VIDL1_CLUT_14

#define CSL_DSS_VIDL1_CLUT_14   (0x00000298U)

◆ CSL_DSS_VIDL1_CLUT_15

#define CSL_DSS_VIDL1_CLUT_15   (0x0000029CU)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES   (0x000002A0U)

◆ CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE

#define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE   (0x000002A4U)

◆ CSL_DSS_VIDL1_SAFETY_POSITION

#define CSL_DSS_VIDL1_SAFETY_POSITION   (0x000002A8U)

◆ CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE

#define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE   (0x000002ACU)

◆ CSL_DSS_VIDL1_SAFETY_SIZE

#define CSL_DSS_VIDL1_SAFETY_SIZE   (0x000002B0U)

◆ CSL_DSS_VIDL1_SAFETY_LFSR_SEED

#define CSL_DSS_VIDL1_SAFETY_LFSR_SEED   (0x000002B4U)

◆ CSL_DSS_VIDL1_LUMAKEY

#define CSL_DSS_VIDL1_LUMAKEY   (0x000002B8U)

◆ CSL_DSS_VIDL1_DMA_BUFSIZE

#define CSL_DSS_VIDL1_DMA_BUFSIZE   (0x000002BCU)

◆ CSL_DSS_VIDL1_CROP

#define CSL_DSS_VIDL1_CROP   (0x000002C0U)

◆ CSL_DSS_VIDL1_SECURE

#define CSL_DSS_VIDL1_SECURE   (0x000002C4U)

◆ CSL_DSS_VIDL1_PIPE_GO

#define CSL_DSS_VIDL1_PIPE_GO   (0x000002C8U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEOENB

#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEOENB   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEODIS

#define CSL_DSS_VIDL1_ATTRIBUTES_ENABLE_VAL_VIDEODIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB16_565

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR16_565

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB24P_888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR24P_888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR24P_888   (0xCU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010   (0xEU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010   (0xFU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP1

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP1   (0x12U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP2

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP2   (0x13U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP4

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP4   (0x14U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP8

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BITMAP8   (0x15U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB565A8

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR565A8

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010   (0x2EU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010   (0x2FU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_NV12

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY

#define CSL_DSS_VIDL1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MASK   (0x00000180U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_SHIFT   (0x00000007U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED8_MAX   (0x00000003U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000200U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x00000009U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_VIDL1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MASK   (0x00000400U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN

#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS

#define CSL_DSS_VIDL1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MASK   (0x00000800U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_VIDL1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MASK   (0x00001000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FLIP_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_SHIFT   (0x0000000CU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_FLIP

#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_FLIP   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_NOFLIP

#define CSL_DSS_VIDL1_ATTRIBUTES_FLIP_VAL_NOFLIP   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_CROP_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_MASK   (0x00002000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_CROP_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_SHIFT   (0x0000000DU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_CROP_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_CROP_VAL_CROPEN

#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_VAL_CROPEN   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_CROP_VAL_CROPDIS

#define CSL_DSS_VIDL1_ATTRIBUTES_CROP_VAL_CROPDIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MASK   (0x0001C000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_SHIFT   (0x0000000EU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED9_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MASK   (0x00020000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT   (0x00000011U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MASK   (0x00040000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_SHIFT   (0x00000012U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED7_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MASK   (0x00080000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_SHIFT   (0x00000013U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES

#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL

#define CSL_DSS_VIDL1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MASK   (0x00100000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MASK   (0x00200000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_SHIFT   (0x00000015U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MASK   (0x00400000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_SHIFT   (0x00000016U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED6_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO

#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO

#define CSL_DSS_VIDL1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MASK   (0x01000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_SHIFT   (0x00000018U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS

#define CSL_DSS_VIDL1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MASK   (0x0E000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_SHIFT   (0x00000019U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_RESERVED5_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MASK   (0x10000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT   (0x0000001CU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA

#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA

#define CSL_DSS_VIDL1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_MASK   (0x20000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT   (0x0000001DU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MASK   (0x40000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_SHIFT   (0x0000001EU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS

#define CSL_DSS_VIDL1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN

#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS

#define CSL_DSS_VIDL1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MASK   (0x0000000EU)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_Y_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK   (0x00000070U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT   (0x00000004U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_8B

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_10B

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_12B

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_PACKED

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB

#define CSL_DSS_VIDL1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED1_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_MASK   (0x01F00000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED2_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_MASK   (0x02000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_SHIFT   (0x00000019U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY

#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY   (0x0U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY

#define CSL_DSS_VIDL1_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY   (0x1U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MASK

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_SHIFT

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MAX

#define CSL_DSS_VIDL1_ATTRIBUTES2_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_BA_0_BA_MASK

#define CSL_DSS_VIDL1_BA_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BA_0_BA_SHIFT

#define CSL_DSS_VIDL1_BA_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BA_0_BA_MAX

#define CSL_DSS_VIDL1_BA_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BA_1_BA_MASK

#define CSL_DSS_VIDL1_BA_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BA_1_BA_SHIFT

#define CSL_DSS_VIDL1_BA_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BA_1_BA_MAX

#define CSL_DSS_VIDL1_BA_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BA_UV_0_BA_MASK

#define CSL_DSS_VIDL1_BA_UV_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BA_UV_0_BA_SHIFT

#define CSL_DSS_VIDL1_BA_UV_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BA_UV_0_BA_MAX

#define CSL_DSS_VIDL1_BA_UV_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BA_UV_1_BA_MASK

#define CSL_DSS_VIDL1_BA_UV_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BA_UV_1_BA_SHIFT

#define CSL_DSS_VIDL1_BA_UV_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BA_UV_1_BA_MAX

#define CSL_DSS_VIDL1_BA_UV_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MASK

#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_SHIFT

#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MAX

#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MASK

#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_SHIFT

#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MAX

#define CSL_DSS_VIDL1_BUF_SIZE_STATUS_RESERVED_61_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK

#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT

#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX

#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK

#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT

#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX

#define CSL_DSS_VIDL1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_CSC_COEF0_C00_MASK

#define CSL_DSS_VIDL1_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF0_C00_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CSC_COEF0_C00_MAX

#define CSL_DSS_VIDL1_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CSC_COEF0_C01_MASK

#define CSL_DSS_VIDL1_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_VIDL1_CSC_COEF0_C01_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_CSC_COEF0_C01_MAX

#define CSL_DSS_VIDL1_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_VIDL1_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CSC_COEF1_C02_MASK

#define CSL_DSS_VIDL1_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF1_C02_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CSC_COEF1_C02_MAX

#define CSL_DSS_VIDL1_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CSC_COEF1_C10_MASK

#define CSL_DSS_VIDL1_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_VIDL1_CSC_COEF1_C10_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_CSC_COEF1_C10_MAX

#define CSL_DSS_VIDL1_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_VIDL1_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CSC_COEF2_C11_MASK

#define CSL_DSS_VIDL1_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF2_C11_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CSC_COEF2_C11_MAX

#define CSL_DSS_VIDL1_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CSC_COEF2_C12_MASK

#define CSL_DSS_VIDL1_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_VIDL1_CSC_COEF2_C12_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_CSC_COEF2_C12_MAX

#define CSL_DSS_VIDL1_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_VIDL1_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CSC_COEF3_C20_MASK

#define CSL_DSS_VIDL1_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF3_C20_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CSC_COEF3_C20_MAX

#define CSL_DSS_VIDL1_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CSC_COEF3_C21_MASK

#define CSL_DSS_VIDL1_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_VIDL1_CSC_COEF3_C21_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_CSC_COEF3_C21_MAX

#define CSL_DSS_VIDL1_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_VIDL1_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CSC_COEF4_C22_MASK

#define CSL_DSS_VIDL1_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF4_C22_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CSC_COEF4_C22_MAX

#define CSL_DSS_VIDL1_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_VIDL1_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_VIDL1_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_VIDL1_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_VIDL1_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_VIDL1_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_VIDL1_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MASK

#define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MASK   (0x000000FFU)

◆ CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT

#define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MAX

#define CSL_DSS_VIDL1_GLOBAL_ALPHA_GLOBALALPHA_MAX   (0x000000FFU)

◆ CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MASK

#define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MASK   (0xFFFFFF00U)

◆ CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_SHIFT

#define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_SHIFT   (0x00000008U)

◆ CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MAX

#define CSL_DSS_VIDL1_GLOBAL_ALPHA_RESERVED_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MASK

#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT

#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MAX

#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MASK

#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT

#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MAX

#define CSL_DSS_VIDL1_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MASK

#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_SHIFT

#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MAX

#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MASK

#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_SHIFT

#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MAX

#define CSL_DSS_VIDL1_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MASK

#define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MASK   (0x000000FFU)

◆ CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_SHIFT

#define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MAX

#define CSL_DSS_VIDL1_PIXEL_INC_PIXELINC_MAX   (0x000000FFU)

◆ CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MASK

#define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MASK   (0xFFFFFF00U)

◆ CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_SHIFT

#define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_SHIFT   (0x00000008U)

◆ CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MAX

#define CSL_DSS_VIDL1_PIXEL_INC_RESERVED_68_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VIDL1_PRELOAD_PRELOAD_MASK

#define CSL_DSS_VIDL1_PRELOAD_PRELOAD_MASK   (0x00000FFFU)

◆ CSL_DSS_VIDL1_PRELOAD_PRELOAD_SHIFT

#define CSL_DSS_VIDL1_PRELOAD_PRELOAD_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_PRELOAD_PRELOAD_MAX

#define CSL_DSS_VIDL1_PRELOAD_PRELOAD_MAX   (0x00000FFFU)

◆ CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MASK

#define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MASK   (0xFFFFF000U)

◆ CSL_DSS_VIDL1_PRELOAD_RESERVED_212_SHIFT

#define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_SHIFT   (0x0000000CU)

◆ CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MAX

#define CSL_DSS_VIDL1_PRELOAD_RESERVED_212_MAX   (0x000FFFFFU)

◆ CSL_DSS_VIDL1_ROW_INC_ROWINC_MASK

#define CSL_DSS_VIDL1_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_ROW_INC_ROWINC_SHIFT

#define CSL_DSS_VIDL1_ROW_INC_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_ROW_INC_ROWINC_MAX

#define CSL_DSS_VIDL1_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MASK

#define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_SHIFT

#define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MAX

#define CSL_DSS_VIDL1_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MASK

#define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL1_BA_EXT_0_RESERVED_SHIFT

#define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MAX

#define CSL_DSS_VIDL1_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MASK

#define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_SHIFT

#define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MAX

#define CSL_DSS_VIDL1_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MASK

#define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL1_BA_EXT_1_RESERVED_SHIFT

#define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MAX

#define CSL_DSS_VIDL1_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MASK

#define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_SHIFT

#define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MAX

#define CSL_DSS_VIDL1_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MASK

#define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_SHIFT

#define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MAX

#define CSL_DSS_VIDL1_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MASK

#define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_SHIFT

#define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MAX

#define CSL_DSS_VIDL1_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MASK

#define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_SHIFT

#define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MAX

#define CSL_DSS_VIDL1_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_VIDL1_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_VIDL1_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MASK

#define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_SHIFT

#define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MAX

#define CSL_DSS_VIDL1_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_TILE_TILEINDEX_MASK

#define CSL_DSS_VIDL1_TILE_TILEINDEX_MASK   (0x007FFFFFU)

◆ CSL_DSS_VIDL1_TILE_TILEINDEX_SHIFT

#define CSL_DSS_VIDL1_TILE_TILEINDEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_TILE_TILEINDEX_MAX

#define CSL_DSS_VIDL1_TILE_TILEINDEX_MAX   (0x007FFFFFU)

◆ CSL_DSS_VIDL1_TILE2_NUM_TILES_MASK

#define CSL_DSS_VIDL1_TILE2_NUM_TILES_MASK   (0x007FFFFFU)

◆ CSL_DSS_VIDL1_TILE2_NUM_TILES_SHIFT

#define CSL_DSS_VIDL1_TILE2_NUM_TILES_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_TILE2_NUM_TILES_MAX

#define CSL_DSS_VIDL1_TILE2_NUM_TILES_MAX   (0x007FFFFFU)

◆ CSL_DSS_VIDL1_TILE2_RESERVED_MASK

#define CSL_DSS_VIDL1_TILE2_RESERVED_MASK   (0xFF800000U)

◆ CSL_DSS_VIDL1_TILE2_RESERVED_SHIFT

#define CSL_DSS_VIDL1_TILE2_RESERVED_SHIFT   (0x00000017U)

◆ CSL_DSS_VIDL1_TILE2_RESERVED_MAX

#define CSL_DSS_VIDL1_TILE2_RESERVED_MAX   (0x000001FFU)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_MASK   (0x000000FEU)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_MAX   (0x0000007FU)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8   (0xCU)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10   (0xEU)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_MASK

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_MASK   (0x00000300U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_SHIFT

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_SHIFT   (0x00000008U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_MAX

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_MAX   (0x00000003U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4   (0x2U)

◆ CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2

#define CSL_DSS_VIDL1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2   (0x3U)

◆ CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK

#define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT

#define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX

#define CSL_DSS_VIDL1_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_0_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_0_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_0_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_0_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_0_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_0_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_0_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_0_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_0_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_0_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_0_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_0_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_0_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_0_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_0_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_0_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_1_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_1_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_1_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_1_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_1_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_1_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_1_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_1_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_1_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_1_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_1_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_1_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_1_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_1_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_1_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_1_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_2_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_2_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_2_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_2_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_2_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_2_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_2_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_2_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_2_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_2_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_2_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_2_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_2_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_2_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_2_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_2_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_3_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_3_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_3_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_3_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_3_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_3_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_3_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_3_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_3_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_3_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_3_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_3_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_3_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_3_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_3_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_3_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_4_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_4_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_4_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_4_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_4_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_4_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_4_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_4_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_4_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_4_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_4_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_4_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_4_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_4_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_4_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_4_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_5_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_5_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_5_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_5_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_5_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_5_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_5_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_5_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_5_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_5_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_5_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_5_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_5_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_5_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_5_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_5_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_6_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_6_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_6_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_6_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_6_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_6_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_6_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_6_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_6_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_6_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_6_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_6_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_6_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_6_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_6_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_6_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_7_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_7_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_7_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_7_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_7_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_7_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_7_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_7_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_7_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_7_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_7_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_7_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_7_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_7_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_7_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_7_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_8_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_8_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_8_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_8_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_8_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_8_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_8_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_8_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_8_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_8_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_8_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_8_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_8_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_8_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_8_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_8_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_9_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_9_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_9_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_9_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_9_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_9_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_9_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_9_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_9_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_9_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_9_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_9_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_9_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_9_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_9_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_9_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_10_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_10_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_10_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_10_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_10_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_10_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_10_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_10_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_10_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_10_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_10_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_10_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_10_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_10_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_10_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_10_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_11_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_11_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_11_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_11_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_11_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_11_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_11_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_11_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_11_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_11_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_11_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_11_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_11_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_11_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_11_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_11_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_12_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_12_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_12_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_12_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_12_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_12_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_12_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_12_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_12_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_12_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_12_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_12_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_12_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_12_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_12_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_12_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_13_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_13_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_13_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_13_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_13_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_13_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_13_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_13_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_13_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_13_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_13_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_13_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_13_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_13_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_13_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_13_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_14_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_14_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_14_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_14_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_14_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_14_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_14_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_14_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_14_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_14_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_14_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_14_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_14_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_14_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_14_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_14_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_B_MASK

#define CSL_DSS_VIDL1_CLUT_15_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_B_SHIFT

#define CSL_DSS_VIDL1_CLUT_15_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_B_MAX

#define CSL_DSS_VIDL1_CLUT_15_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_G_MASK

#define CSL_DSS_VIDL1_CLUT_15_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_G_SHIFT

#define CSL_DSS_VIDL1_CLUT_15_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_G_MAX

#define CSL_DSS_VIDL1_CLUT_15_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_R_MASK

#define CSL_DSS_VIDL1_CLUT_15_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_R_SHIFT

#define CSL_DSS_VIDL1_CLUT_15_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL1_CLUT_15_VALUE_R_MAX

#define CSL_DSS_VIDL1_CLUT_15_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL1_CLUT_15_INDEX_MASK

#define CSL_DSS_VIDL1_CLUT_15_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL1_CLUT_15_INDEX_SHIFT

#define CSL_DSS_VIDL1_CLUT_15_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL1_CLUT_15_INDEX_MAX

#define CSL_DSS_VIDL1_CLUT_15_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MASK

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MAX

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MASK

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_SHIFT

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)

◆ CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MAX

#define CSL_DSS_VIDL1_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)

◆ CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VIDL1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MASK

#define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_VIDL1_SAFETY_POSITION_POSX_SHIFT

#define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MAX

#define CSL_DSS_VIDL1_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MASK

#define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VIDL1_SAFETY_POSITION_POSY_SHIFT

#define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MAX

#define CSL_DSS_VIDL1_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VIDL1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MASK

#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_SHIFT

#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MAX

#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MASK

#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_SHIFT

#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MAX

#define CSL_DSS_VIDL1_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MASK

#define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_SHIFT

#define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MAX

#define CSL_DSS_VIDL1_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MASK

#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MASK   (0x00000FFFU)

◆ CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_SHIFT

#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MAX

#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMIN_MAX   (0x00000FFFU)

◆ CSL_DSS_VIDL1_LUMAKEY_RESERVED_MASK

#define CSL_DSS_VIDL1_LUMAKEY_RESERVED_MASK   (0x0000F000U)

◆ CSL_DSS_VIDL1_LUMAKEY_RESERVED_SHIFT

#define CSL_DSS_VIDL1_LUMAKEY_RESERVED_SHIFT   (0x0000000CU)

◆ CSL_DSS_VIDL1_LUMAKEY_RESERVED_MAX

#define CSL_DSS_VIDL1_LUMAKEY_RESERVED_MAX   (0x0000000FU)

◆ CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MASK

#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MASK   (0x0FFF0000U)

◆ CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_SHIFT

#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MAX

#define CSL_DSS_VIDL1_LUMAKEY_LUMAKEYMAX_MAX   (0x00000FFFU)

◆ CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MASK

#define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MASK   (0xF0000000U)

◆ CSL_DSS_VIDL1_LUMAKEY_RESERVED1_SHIFT

#define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_SHIFT   (0x0000001CU)

◆ CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MAX

#define CSL_DSS_VIDL1_LUMAKEY_RESERVED1_MAX   (0x0000000FU)

◆ CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_MASK

#define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_MASK   (0x0000001FU)

◆ CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_SHIFT

#define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_MAX

#define CSL_DSS_VIDL1_DMA_BUFSIZE_BUFSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_MASK

#define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_SHIFT

#define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_MAX

#define CSL_DSS_VIDL1_DMA_BUFSIZE_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_VIDL1_CROP_CROPLEFT_MASK

#define CSL_DSS_VIDL1_CROP_CROPLEFT_MASK   (0x0000001FU)

◆ CSL_DSS_VIDL1_CROP_CROPLEFT_SHIFT

#define CSL_DSS_VIDL1_CROP_CROPLEFT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_CROP_CROPLEFT_MAX

#define CSL_DSS_VIDL1_CROP_CROPLEFT_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CROP_CROPRIGHT_MASK

#define CSL_DSS_VIDL1_CROP_CROPRIGHT_MASK   (0x00001F00U)

◆ CSL_DSS_VIDL1_CROP_CROPRIGHT_SHIFT

#define CSL_DSS_VIDL1_CROP_CROPRIGHT_SHIFT   (0x00000008U)

◆ CSL_DSS_VIDL1_CROP_CROPRIGHT_MAX

#define CSL_DSS_VIDL1_CROP_CROPRIGHT_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CROP_CROPTOP_MASK

#define CSL_DSS_VIDL1_CROP_CROPTOP_MASK   (0x001F0000U)

◆ CSL_DSS_VIDL1_CROP_CROPTOP_SHIFT

#define CSL_DSS_VIDL1_CROP_CROPTOP_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL1_CROP_CROPTOP_MAX

#define CSL_DSS_VIDL1_CROP_CROPTOP_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_CROP_CROPBOTTOM_MASK

#define CSL_DSS_VIDL1_CROP_CROPBOTTOM_MASK   (0x1F000000U)

◆ CSL_DSS_VIDL1_CROP_CROPBOTTOM_SHIFT

#define CSL_DSS_VIDL1_CROP_CROPBOTTOM_SHIFT   (0x00000018U)

◆ CSL_DSS_VIDL1_CROP_CROPBOTTOM_MAX

#define CSL_DSS_VIDL1_CROP_CROPBOTTOM_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL1_SECURE_SECURE_MASK

#define CSL_DSS_VIDL1_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL1_SECURE_SECURE_SHIFT

#define CSL_DSS_VIDL1_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_SECURE_SECURE_MAX

#define CSL_DSS_VIDL1_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_VIDL1_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_VIDL1_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_VIDL1_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_VIDL1_SECURE_RESERVED_MASK

#define CSL_DSS_VIDL1_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VIDL1_SECURE_RESERVED_SHIFT

#define CSL_DSS_VIDL1_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL1_SECURE_RESERVED_MAX

#define CSL_DSS_VIDL1_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VIDL1_PIPE_GO_GOBIT_MASK

#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_MASK   (0x00000001U)

◆ CSL_DSS_VIDL1_PIPE_GO_GOBIT_SHIFT

#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL1_PIPE_GO_GOBIT_MAX

#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_VIDL1_PIPE_GO_GOBIT_VAL_HFUISR

#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_VIDL1_PIPE_GO_GOBIT_VAL_UFPSR

#define CSL_DSS_VIDL1_PIPE_GO_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_VIDL1_PIPE_GO_RESERVED_MASK

#define CSL_DSS_VIDL1_PIPE_GO_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VIDL1_PIPE_GO_RESERVED_SHIFT

#define CSL_DSS_VIDL1_PIPE_GO_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL1_PIPE_GO_RESERVED_MAX

#define CSL_DSS_VIDL1_PIPE_GO_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VIDL2_ATTRIBUTES

#define CSL_DSS_VIDL2_ATTRIBUTES   (0x00000020U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2

#define CSL_DSS_VIDL2_ATTRIBUTES2   (0x00000024U)

◆ CSL_DSS_VIDL2_BA_0

#define CSL_DSS_VIDL2_BA_0   (0x00000028U)

◆ CSL_DSS_VIDL2_BA_1

#define CSL_DSS_VIDL2_BA_1   (0x0000002CU)

◆ CSL_DSS_VIDL2_BA_UV_0

#define CSL_DSS_VIDL2_BA_UV_0   (0x00000030U)

◆ CSL_DSS_VIDL2_BA_UV_1

#define CSL_DSS_VIDL2_BA_UV_1   (0x00000034U)

◆ CSL_DSS_VIDL2_BUF_SIZE_STATUS

#define CSL_DSS_VIDL2_BUF_SIZE_STATUS   (0x00000038U)

◆ CSL_DSS_VIDL2_BUF_THRESHOLD

#define CSL_DSS_VIDL2_BUF_THRESHOLD   (0x0000003CU)

◆ CSL_DSS_VIDL2_CSC_COEF0

#define CSL_DSS_VIDL2_CSC_COEF0   (0x00000040U)

◆ CSL_DSS_VIDL2_CSC_COEF1

#define CSL_DSS_VIDL2_CSC_COEF1   (0x00000044U)

◆ CSL_DSS_VIDL2_CSC_COEF2

#define CSL_DSS_VIDL2_CSC_COEF2   (0x00000048U)

◆ CSL_DSS_VIDL2_CSC_COEF3

#define CSL_DSS_VIDL2_CSC_COEF3   (0x0000004CU)

◆ CSL_DSS_VIDL2_CSC_COEF4

#define CSL_DSS_VIDL2_CSC_COEF4   (0x00000050U)

◆ CSL_DSS_VIDL2_CSC_COEF5

#define CSL_DSS_VIDL2_CSC_COEF5   (0x00000054U)

◆ CSL_DSS_VIDL2_CSC_COEF6

#define CSL_DSS_VIDL2_CSC_COEF6   (0x00000058U)

◆ CSL_DSS_VIDL2_GLOBAL_ALPHA

#define CSL_DSS_VIDL2_GLOBAL_ALPHA   (0x000001FCU)

◆ CSL_DSS_VIDL2_MFLAG_THRESHOLD

#define CSL_DSS_VIDL2_MFLAG_THRESHOLD   (0x00000208U)

◆ CSL_DSS_VIDL2_PICTURE_SIZE

#define CSL_DSS_VIDL2_PICTURE_SIZE   (0x0000020CU)

◆ CSL_DSS_VIDL2_PIXEL_INC

#define CSL_DSS_VIDL2_PIXEL_INC   (0x00000210U)

◆ CSL_DSS_VIDL2_PRELOAD

#define CSL_DSS_VIDL2_PRELOAD   (0x00000218U)

◆ CSL_DSS_VIDL2_ROW_INC

#define CSL_DSS_VIDL2_ROW_INC   (0x0000021CU)

◆ CSL_DSS_VIDL2_BA_EXT_0

#define CSL_DSS_VIDL2_BA_EXT_0   (0x0000022CU)

◆ CSL_DSS_VIDL2_BA_EXT_1

#define CSL_DSS_VIDL2_BA_EXT_1   (0x00000230U)

◆ CSL_DSS_VIDL2_BA_UV_EXT_0

#define CSL_DSS_VIDL2_BA_UV_EXT_0   (0x00000234U)

◆ CSL_DSS_VIDL2_BA_UV_EXT_1

#define CSL_DSS_VIDL2_BA_UV_EXT_1   (0x00000238U)

◆ CSL_DSS_VIDL2_CSC_COEF7

#define CSL_DSS_VIDL2_CSC_COEF7   (0x0000023CU)

◆ CSL_DSS_VIDL2_ROW_INC_UV

#define CSL_DSS_VIDL2_ROW_INC_UV   (0x00000248U)

◆ CSL_DSS_VIDL2_TILE

#define CSL_DSS_VIDL2_TILE   (0x0000024CU)

◆ CSL_DSS_VIDL2_TILE2

#define CSL_DSS_VIDL2_TILE2   (0x00000250U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES   (0x00000254U)

◆ CSL_DSS_VIDL2_FBDC_CLEAR_COLOR

#define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR   (0x00000258U)

◆ CSL_DSS_VIDL2_CLUT_0

#define CSL_DSS_VIDL2_CLUT_0   (0x00000260U)

◆ CSL_DSS_VIDL2_CLUT_1

#define CSL_DSS_VIDL2_CLUT_1   (0x00000264U)

◆ CSL_DSS_VIDL2_CLUT_2

#define CSL_DSS_VIDL2_CLUT_2   (0x00000268U)

◆ CSL_DSS_VIDL2_CLUT_3

#define CSL_DSS_VIDL2_CLUT_3   (0x0000026CU)

◆ CSL_DSS_VIDL2_CLUT_4

#define CSL_DSS_VIDL2_CLUT_4   (0x00000270U)

◆ CSL_DSS_VIDL2_CLUT_5

#define CSL_DSS_VIDL2_CLUT_5   (0x00000274U)

◆ CSL_DSS_VIDL2_CLUT_6

#define CSL_DSS_VIDL2_CLUT_6   (0x00000278U)

◆ CSL_DSS_VIDL2_CLUT_7

#define CSL_DSS_VIDL2_CLUT_7   (0x0000027CU)

◆ CSL_DSS_VIDL2_CLUT_8

#define CSL_DSS_VIDL2_CLUT_8   (0x00000280U)

◆ CSL_DSS_VIDL2_CLUT_9

#define CSL_DSS_VIDL2_CLUT_9   (0x00000284U)

◆ CSL_DSS_VIDL2_CLUT_10

#define CSL_DSS_VIDL2_CLUT_10   (0x00000288U)

◆ CSL_DSS_VIDL2_CLUT_11

#define CSL_DSS_VIDL2_CLUT_11   (0x0000028CU)

◆ CSL_DSS_VIDL2_CLUT_12

#define CSL_DSS_VIDL2_CLUT_12   (0x00000290U)

◆ CSL_DSS_VIDL2_CLUT_13

#define CSL_DSS_VIDL2_CLUT_13   (0x00000294U)

◆ CSL_DSS_VIDL2_CLUT_14

#define CSL_DSS_VIDL2_CLUT_14   (0x00000298U)

◆ CSL_DSS_VIDL2_CLUT_15

#define CSL_DSS_VIDL2_CLUT_15   (0x0000029CU)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES   (0x000002A0U)

◆ CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE

#define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE   (0x000002A4U)

◆ CSL_DSS_VIDL2_SAFETY_POSITION

#define CSL_DSS_VIDL2_SAFETY_POSITION   (0x000002A8U)

◆ CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE

#define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE   (0x000002ACU)

◆ CSL_DSS_VIDL2_SAFETY_SIZE

#define CSL_DSS_VIDL2_SAFETY_SIZE   (0x000002B0U)

◆ CSL_DSS_VIDL2_SAFETY_LFSR_SEED

#define CSL_DSS_VIDL2_SAFETY_LFSR_SEED   (0x000002B4U)

◆ CSL_DSS_VIDL2_LUMAKEY

#define CSL_DSS_VIDL2_LUMAKEY   (0x000002B8U)

◆ CSL_DSS_VIDL2_DMA_BUFSIZE

#define CSL_DSS_VIDL2_DMA_BUFSIZE   (0x000002BCU)

◆ CSL_DSS_VIDL2_CROP

#define CSL_DSS_VIDL2_CROP   (0x000002C0U)

◆ CSL_DSS_VIDL2_SECURE

#define CSL_DSS_VIDL2_SECURE   (0x000002C4U)

◆ CSL_DSS_VIDL2_PIPE_GO

#define CSL_DSS_VIDL2_PIPE_GO   (0x000002C8U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_VAL_VIDEOENB

#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_VAL_VIDEOENB   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_VAL_VIDEODIS

#define CSL_DSS_VIDL2_ATTRIBUTES_ENABLE_VAL_VIDEODIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB16_4444

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR16_4444

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA16_4444

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB16_565

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR16_565

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB16_1555

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR16_1555

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB32_8888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR32_8888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA32_8888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGRA32_8888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB24P_888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR24P_888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR24P_888   (0xCU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010   (0xEU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010   (0xFU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP1

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP1   (0x12U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP2

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP2   (0x13U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP4

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP4   (0x14U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP8

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BITMAP8   (0x15U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB565A8

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR565A8

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB16_4444

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR16_4444

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX16_4444

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB16_1555

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR16_1555

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB32_8888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR32_8888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX32_8888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGRX32_8888

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010   (0x2EU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010   (0x2FU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_NV12

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV420_NV12

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY

#define CSL_DSS_VIDL2_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_MASK   (0x00000180U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_SHIFT   (0x00000007U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED8_MAX   (0x00000003U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000200U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x00000009U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_VIDL2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_MASK   (0x00000400U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN

#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS

#define CSL_DSS_VIDL2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_MASK   (0x00000800U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_VIDL2_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FLIP_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_MASK   (0x00001000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FLIP_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_SHIFT   (0x0000000CU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FLIP_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FLIP_VAL_FLIP

#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_VAL_FLIP   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_FLIP_VAL_NOFLIP

#define CSL_DSS_VIDL2_ATTRIBUTES_FLIP_VAL_NOFLIP   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_CROP_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_MASK   (0x00002000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_CROP_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_SHIFT   (0x0000000DU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_CROP_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_CROP_VAL_CROPEN

#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_VAL_CROPEN   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_CROP_VAL_CROPDIS

#define CSL_DSS_VIDL2_ATTRIBUTES_CROP_VAL_CROPDIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_MASK   (0x0001C000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_SHIFT   (0x0000000EU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED9_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_MASK   (0x00020000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_SHIFT   (0x00000011U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_MASK   (0x00040000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_SHIFT   (0x00000012U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED7_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_MASK   (0x00080000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_SHIFT   (0x00000013U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES

#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL

#define CSL_DSS_VIDL2_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_MASK   (0x00100000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_MASK   (0x00200000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_SHIFT   (0x00000015U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_MASK   (0x00400000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_SHIFT   (0x00000016U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED6_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO

#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO

#define CSL_DSS_VIDL2_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_MASK   (0x01000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_SHIFT   (0x00000018U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS

#define CSL_DSS_VIDL2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_MASK   (0x0E000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_SHIFT   (0x00000019U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_RESERVED5_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_MASK   (0x10000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT   (0x0000001CU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA

#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA

#define CSL_DSS_VIDL2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_MASK   (0x20000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT   (0x0000001DU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_MASK   (0x40000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_SHIFT   (0x0000001EU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS

#define CSL_DSS_VIDL2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN

#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS

#define CSL_DSS_VIDL2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_MASK   (0x0000000EU)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_Y_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_MASK   (0x00000070U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT   (0x00000004U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_VC1_RANGE_CBCR_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_8B

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_10B

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_12B

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_VAL_PACKED

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_VAL_MSB

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_VAL_LSB

#define CSL_DSS_VIDL2_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED1_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_MASK   (0x01F00000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED2_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_MASK   (0x02000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_SHIFT   (0x00000019U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY

#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY   (0x0U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY

#define CSL_DSS_VIDL2_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY   (0x1U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_MASK

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_SHIFT

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_MAX

#define CSL_DSS_VIDL2_ATTRIBUTES2_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_BA_0_BA_MASK

#define CSL_DSS_VIDL2_BA_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BA_0_BA_SHIFT

#define CSL_DSS_VIDL2_BA_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BA_0_BA_MAX

#define CSL_DSS_VIDL2_BA_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BA_1_BA_MASK

#define CSL_DSS_VIDL2_BA_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BA_1_BA_SHIFT

#define CSL_DSS_VIDL2_BA_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BA_1_BA_MAX

#define CSL_DSS_VIDL2_BA_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BA_UV_0_BA_MASK

#define CSL_DSS_VIDL2_BA_UV_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BA_UV_0_BA_SHIFT

#define CSL_DSS_VIDL2_BA_UV_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BA_UV_0_BA_MAX

#define CSL_DSS_VIDL2_BA_UV_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BA_UV_1_BA_MASK

#define CSL_DSS_VIDL2_BA_UV_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BA_UV_1_BA_SHIFT

#define CSL_DSS_VIDL2_BA_UV_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BA_UV_1_BA_MAX

#define CSL_DSS_VIDL2_BA_UV_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_MASK

#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_SHIFT

#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_MAX

#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_MASK

#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_SHIFT

#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_MAX

#define CSL_DSS_VIDL2_BUF_SIZE_STATUS_RESERVED_61_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK

#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT

#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX

#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK

#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT

#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX

#define CSL_DSS_VIDL2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_CSC_COEF0_C00_MASK

#define CSL_DSS_VIDL2_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF0_C00_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CSC_COEF0_C00_MAX

#define CSL_DSS_VIDL2_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CSC_COEF0_C01_MASK

#define CSL_DSS_VIDL2_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_VIDL2_CSC_COEF0_C01_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_CSC_COEF0_C01_MAX

#define CSL_DSS_VIDL2_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_VIDL2_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CSC_COEF1_C02_MASK

#define CSL_DSS_VIDL2_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF1_C02_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CSC_COEF1_C02_MAX

#define CSL_DSS_VIDL2_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CSC_COEF1_C10_MASK

#define CSL_DSS_VIDL2_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_VIDL2_CSC_COEF1_C10_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_CSC_COEF1_C10_MAX

#define CSL_DSS_VIDL2_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_VIDL2_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CSC_COEF2_C11_MASK

#define CSL_DSS_VIDL2_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF2_C11_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CSC_COEF2_C11_MAX

#define CSL_DSS_VIDL2_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CSC_COEF2_C12_MASK

#define CSL_DSS_VIDL2_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_VIDL2_CSC_COEF2_C12_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_CSC_COEF2_C12_MAX

#define CSL_DSS_VIDL2_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_VIDL2_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CSC_COEF3_C20_MASK

#define CSL_DSS_VIDL2_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF3_C20_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CSC_COEF3_C20_MAX

#define CSL_DSS_VIDL2_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CSC_COEF3_C21_MASK

#define CSL_DSS_VIDL2_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_VIDL2_CSC_COEF3_C21_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_CSC_COEF3_C21_MAX

#define CSL_DSS_VIDL2_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_VIDL2_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CSC_COEF4_C22_MASK

#define CSL_DSS_VIDL2_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF4_C22_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CSC_COEF4_C22_MAX

#define CSL_DSS_VIDL2_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_VIDL2_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_VIDL2_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_VIDL2_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_VIDL2_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL2_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_VIDL2_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_VIDL2_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_VIDL2_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_MASK

#define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_MASK   (0x000000FFU)

◆ CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_SHIFT

#define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_MAX

#define CSL_DSS_VIDL2_GLOBAL_ALPHA_GLOBALALPHA_MAX   (0x000000FFU)

◆ CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_MASK

#define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_MASK   (0xFFFFFF00U)

◆ CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_SHIFT

#define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_SHIFT   (0x00000008U)

◆ CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_MAX

#define CSL_DSS_VIDL2_GLOBAL_ALPHA_RESERVED_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_MASK

#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_SHIFT

#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_MAX

#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_MASK

#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_SHIFT

#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_MAX

#define CSL_DSS_VIDL2_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_MASK

#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_SHIFT

#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_MAX

#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_MASK

#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_SHIFT

#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_MAX

#define CSL_DSS_VIDL2_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_MASK

#define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_MASK   (0x000000FFU)

◆ CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_SHIFT

#define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_MAX

#define CSL_DSS_VIDL2_PIXEL_INC_PIXELINC_MAX   (0x000000FFU)

◆ CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_MASK

#define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_MASK   (0xFFFFFF00U)

◆ CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_SHIFT

#define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_SHIFT   (0x00000008U)

◆ CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_MAX

#define CSL_DSS_VIDL2_PIXEL_INC_RESERVED_68_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VIDL2_PRELOAD_PRELOAD_MASK

#define CSL_DSS_VIDL2_PRELOAD_PRELOAD_MASK   (0x00000FFFU)

◆ CSL_DSS_VIDL2_PRELOAD_PRELOAD_SHIFT

#define CSL_DSS_VIDL2_PRELOAD_PRELOAD_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_PRELOAD_PRELOAD_MAX

#define CSL_DSS_VIDL2_PRELOAD_PRELOAD_MAX   (0x00000FFFU)

◆ CSL_DSS_VIDL2_PRELOAD_RESERVED_212_MASK

#define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_MASK   (0xFFFFF000U)

◆ CSL_DSS_VIDL2_PRELOAD_RESERVED_212_SHIFT

#define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_SHIFT   (0x0000000CU)

◆ CSL_DSS_VIDL2_PRELOAD_RESERVED_212_MAX

#define CSL_DSS_VIDL2_PRELOAD_RESERVED_212_MAX   (0x000FFFFFU)

◆ CSL_DSS_VIDL2_ROW_INC_ROWINC_MASK

#define CSL_DSS_VIDL2_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_ROW_INC_ROWINC_SHIFT

#define CSL_DSS_VIDL2_ROW_INC_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_ROW_INC_ROWINC_MAX

#define CSL_DSS_VIDL2_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_MASK

#define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_SHIFT

#define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_MAX

#define CSL_DSS_VIDL2_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_EXT_0_RESERVED_MASK

#define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL2_BA_EXT_0_RESERVED_SHIFT

#define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_BA_EXT_0_RESERVED_MAX

#define CSL_DSS_VIDL2_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_MASK

#define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_SHIFT

#define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_MAX

#define CSL_DSS_VIDL2_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_EXT_1_RESERVED_MASK

#define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL2_BA_EXT_1_RESERVED_SHIFT

#define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_BA_EXT_1_RESERVED_MAX

#define CSL_DSS_VIDL2_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_MASK

#define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_SHIFT

#define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_MAX

#define CSL_DSS_VIDL2_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_MASK

#define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_SHIFT

#define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_MAX

#define CSL_DSS_VIDL2_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_MASK

#define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_SHIFT

#define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_MAX

#define CSL_DSS_VIDL2_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_MASK

#define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_SHIFT

#define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_MAX

#define CSL_DSS_VIDL2_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VIDL2_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_VIDL2_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_VIDL2_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_MASK

#define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_SHIFT

#define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_MAX

#define CSL_DSS_VIDL2_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_TILE_TILEINDEX_MASK

#define CSL_DSS_VIDL2_TILE_TILEINDEX_MASK   (0x007FFFFFU)

◆ CSL_DSS_VIDL2_TILE_TILEINDEX_SHIFT

#define CSL_DSS_VIDL2_TILE_TILEINDEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_TILE_TILEINDEX_MAX

#define CSL_DSS_VIDL2_TILE_TILEINDEX_MAX   (0x007FFFFFU)

◆ CSL_DSS_VIDL2_TILE2_NUM_TILES_MASK

#define CSL_DSS_VIDL2_TILE2_NUM_TILES_MASK   (0x007FFFFFU)

◆ CSL_DSS_VIDL2_TILE2_NUM_TILES_SHIFT

#define CSL_DSS_VIDL2_TILE2_NUM_TILES_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_TILE2_NUM_TILES_MAX

#define CSL_DSS_VIDL2_TILE2_NUM_TILES_MAX   (0x007FFFFFU)

◆ CSL_DSS_VIDL2_TILE2_RESERVED_MASK

#define CSL_DSS_VIDL2_TILE2_RESERVED_MASK   (0xFF800000U)

◆ CSL_DSS_VIDL2_TILE2_RESERVED_SHIFT

#define CSL_DSS_VIDL2_TILE2_RESERVED_SHIFT   (0x00000017U)

◆ CSL_DSS_VIDL2_TILE2_RESERVED_MAX

#define CSL_DSS_VIDL2_TILE2_RESERVED_MAX   (0x000001FFU)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_MASK   (0x000000FEU)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_MAX   (0x0000007FU)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8   (0xCU)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10   (0xEU)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_MASK

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_MASK   (0x00000300U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_SHIFT

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_SHIFT   (0x00000008U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_MAX

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_MAX   (0x00000003U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4   (0x2U)

◆ CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2

#define CSL_DSS_VIDL2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2   (0x3U)

◆ CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK

#define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT

#define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX

#define CSL_DSS_VIDL2_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_0_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_0_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_0_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_0_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_0_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_0_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_0_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_0_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_0_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_0_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_0_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_0_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_0_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_0_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_0_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_0_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_1_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_1_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_1_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_1_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_1_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_1_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_1_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_1_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_1_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_1_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_1_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_1_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_1_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_1_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_1_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_1_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_2_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_2_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_2_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_2_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_2_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_2_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_2_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_2_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_2_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_2_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_2_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_2_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_2_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_2_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_2_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_2_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_3_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_3_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_3_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_3_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_3_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_3_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_3_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_3_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_3_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_3_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_3_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_3_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_3_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_3_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_3_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_3_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_4_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_4_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_4_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_4_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_4_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_4_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_4_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_4_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_4_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_4_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_4_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_4_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_4_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_4_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_4_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_4_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_5_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_5_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_5_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_5_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_5_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_5_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_5_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_5_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_5_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_5_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_5_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_5_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_5_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_5_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_5_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_5_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_6_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_6_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_6_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_6_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_6_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_6_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_6_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_6_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_6_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_6_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_6_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_6_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_6_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_6_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_6_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_6_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_7_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_7_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_7_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_7_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_7_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_7_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_7_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_7_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_7_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_7_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_7_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_7_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_7_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_7_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_7_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_7_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_8_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_8_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_8_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_8_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_8_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_8_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_8_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_8_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_8_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_8_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_8_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_8_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_8_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_8_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_8_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_8_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_9_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_9_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_9_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_9_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_9_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_9_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_9_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_9_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_9_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_9_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_9_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_9_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_9_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_9_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_9_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_9_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_10_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_10_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_10_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_10_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_10_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_10_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_10_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_10_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_10_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_10_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_10_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_10_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_10_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_10_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_10_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_10_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_11_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_11_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_11_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_11_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_11_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_11_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_11_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_11_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_11_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_11_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_11_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_11_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_11_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_11_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_11_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_11_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_12_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_12_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_12_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_12_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_12_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_12_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_12_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_12_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_12_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_12_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_12_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_12_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_12_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_12_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_12_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_12_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_13_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_13_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_13_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_13_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_13_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_13_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_13_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_13_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_13_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_13_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_13_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_13_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_13_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_13_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_13_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_13_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_14_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_14_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_14_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_14_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_14_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_14_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_14_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_14_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_14_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_14_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_14_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_14_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_14_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_14_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_14_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_14_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_B_MASK

#define CSL_DSS_VIDL2_CLUT_15_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_B_SHIFT

#define CSL_DSS_VIDL2_CLUT_15_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_B_MAX

#define CSL_DSS_VIDL2_CLUT_15_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_G_MASK

#define CSL_DSS_VIDL2_CLUT_15_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_G_SHIFT

#define CSL_DSS_VIDL2_CLUT_15_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_G_MAX

#define CSL_DSS_VIDL2_CLUT_15_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_R_MASK

#define CSL_DSS_VIDL2_CLUT_15_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_R_SHIFT

#define CSL_DSS_VIDL2_CLUT_15_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VIDL2_CLUT_15_VALUE_R_MAX

#define CSL_DSS_VIDL2_CLUT_15_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VIDL2_CLUT_15_INDEX_MASK

#define CSL_DSS_VIDL2_CLUT_15_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VIDL2_CLUT_15_INDEX_SHIFT

#define CSL_DSS_VIDL2_CLUT_15_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VIDL2_CLUT_15_INDEX_MAX

#define CSL_DSS_VIDL2_CLUT_15_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_MASK

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_MAX

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_MASK

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_SHIFT

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)

◆ CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_MAX

#define CSL_DSS_VIDL2_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)

◆ CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VIDL2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_SAFETY_POSITION_POSX_MASK

#define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_VIDL2_SAFETY_POSITION_POSX_SHIFT

#define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_SAFETY_POSITION_POSX_MAX

#define CSL_DSS_VIDL2_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL2_SAFETY_POSITION_POSY_MASK

#define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VIDL2_SAFETY_POSITION_POSY_SHIFT

#define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_SAFETY_POSITION_POSY_MAX

#define CSL_DSS_VIDL2_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VIDL2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_MASK

#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_SHIFT

#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_MAX

#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_MASK

#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_SHIFT

#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_MAX

#define CSL_DSS_VIDL2_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_MASK

#define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_SHIFT

#define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_MAX

#define CSL_DSS_VIDL2_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_MASK

#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_MASK   (0x00000FFFU)

◆ CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_SHIFT

#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_MAX

#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMIN_MAX   (0x00000FFFU)

◆ CSL_DSS_VIDL2_LUMAKEY_RESERVED_MASK

#define CSL_DSS_VIDL2_LUMAKEY_RESERVED_MASK   (0x0000F000U)

◆ CSL_DSS_VIDL2_LUMAKEY_RESERVED_SHIFT

#define CSL_DSS_VIDL2_LUMAKEY_RESERVED_SHIFT   (0x0000000CU)

◆ CSL_DSS_VIDL2_LUMAKEY_RESERVED_MAX

#define CSL_DSS_VIDL2_LUMAKEY_RESERVED_MAX   (0x0000000FU)

◆ CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_MASK

#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_MASK   (0x0FFF0000U)

◆ CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_SHIFT

#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_MAX

#define CSL_DSS_VIDL2_LUMAKEY_LUMAKEYMAX_MAX   (0x00000FFFU)

◆ CSL_DSS_VIDL2_LUMAKEY_RESERVED1_MASK

#define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_MASK   (0xF0000000U)

◆ CSL_DSS_VIDL2_LUMAKEY_RESERVED1_SHIFT

#define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_SHIFT   (0x0000001CU)

◆ CSL_DSS_VIDL2_LUMAKEY_RESERVED1_MAX

#define CSL_DSS_VIDL2_LUMAKEY_RESERVED1_MAX   (0x0000000FU)

◆ CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_MASK

#define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_MASK   (0x0000001FU)

◆ CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_SHIFT

#define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_MAX

#define CSL_DSS_VIDL2_DMA_BUFSIZE_BUFSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_MASK

#define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_SHIFT

#define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_MAX

#define CSL_DSS_VIDL2_DMA_BUFSIZE_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_VIDL2_CROP_CROPLEFT_MASK

#define CSL_DSS_VIDL2_CROP_CROPLEFT_MASK   (0x0000001FU)

◆ CSL_DSS_VIDL2_CROP_CROPLEFT_SHIFT

#define CSL_DSS_VIDL2_CROP_CROPLEFT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_CROP_CROPLEFT_MAX

#define CSL_DSS_VIDL2_CROP_CROPLEFT_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CROP_CROPRIGHT_MASK

#define CSL_DSS_VIDL2_CROP_CROPRIGHT_MASK   (0x00001F00U)

◆ CSL_DSS_VIDL2_CROP_CROPRIGHT_SHIFT

#define CSL_DSS_VIDL2_CROP_CROPRIGHT_SHIFT   (0x00000008U)

◆ CSL_DSS_VIDL2_CROP_CROPRIGHT_MAX

#define CSL_DSS_VIDL2_CROP_CROPRIGHT_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CROP_CROPTOP_MASK

#define CSL_DSS_VIDL2_CROP_CROPTOP_MASK   (0x001F0000U)

◆ CSL_DSS_VIDL2_CROP_CROPTOP_SHIFT

#define CSL_DSS_VIDL2_CROP_CROPTOP_SHIFT   (0x00000010U)

◆ CSL_DSS_VIDL2_CROP_CROPTOP_MAX

#define CSL_DSS_VIDL2_CROP_CROPTOP_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_CROP_CROPBOTTOM_MASK

#define CSL_DSS_VIDL2_CROP_CROPBOTTOM_MASK   (0x1F000000U)

◆ CSL_DSS_VIDL2_CROP_CROPBOTTOM_SHIFT

#define CSL_DSS_VIDL2_CROP_CROPBOTTOM_SHIFT   (0x00000018U)

◆ CSL_DSS_VIDL2_CROP_CROPBOTTOM_MAX

#define CSL_DSS_VIDL2_CROP_CROPBOTTOM_MAX   (0x0000001FU)

◆ CSL_DSS_VIDL2_SECURE_SECURE_MASK

#define CSL_DSS_VIDL2_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_VIDL2_SECURE_SECURE_SHIFT

#define CSL_DSS_VIDL2_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_SECURE_SECURE_MAX

#define CSL_DSS_VIDL2_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_VIDL2_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_VIDL2_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_VIDL2_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_VIDL2_SECURE_RESERVED_MASK

#define CSL_DSS_VIDL2_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VIDL2_SECURE_RESERVED_SHIFT

#define CSL_DSS_VIDL2_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL2_SECURE_RESERVED_MAX

#define CSL_DSS_VIDL2_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VIDL2_PIPE_GO_GOBIT_MASK

#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_MASK   (0x00000001U)

◆ CSL_DSS_VIDL2_PIPE_GO_GOBIT_SHIFT

#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_SHIFT   (0x00000000U)

◆ CSL_DSS_VIDL2_PIPE_GO_GOBIT_MAX

#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_VIDL2_PIPE_GO_GOBIT_VAL_HFUISR

#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_VIDL2_PIPE_GO_GOBIT_VAL_UFPSR

#define CSL_DSS_VIDL2_PIPE_GO_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_VIDL2_PIPE_GO_RESERVED_MASK

#define CSL_DSS_VIDL2_PIPE_GO_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VIDL2_PIPE_GO_RESERVED_SHIFT

#define CSL_DSS_VIDL2_PIPE_GO_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VIDL2_PIPE_GO_RESERVED_MAX

#define CSL_DSS_VIDL2_PIPE_GO_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VID1_ACCUH_0

#define CSL_DSS_VID1_ACCUH_0   (0x00000000U)

◆ CSL_DSS_VID1_ACCUH_1

#define CSL_DSS_VID1_ACCUH_1   (0x00000004U)

◆ CSL_DSS_VID1_ACCUH2_0

#define CSL_DSS_VID1_ACCUH2_0   (0x00000008U)

◆ CSL_DSS_VID1_ACCUH2_1

#define CSL_DSS_VID1_ACCUH2_1   (0x0000000CU)

◆ CSL_DSS_VID1_ACCUV_0

#define CSL_DSS_VID1_ACCUV_0   (0x00000010U)

◆ CSL_DSS_VID1_ACCUV_1

#define CSL_DSS_VID1_ACCUV_1   (0x00000014U)

◆ CSL_DSS_VID1_ACCUV2_0

#define CSL_DSS_VID1_ACCUV2_0   (0x00000018U)

◆ CSL_DSS_VID1_ACCUV2_1

#define CSL_DSS_VID1_ACCUV2_1   (0x0000001CU)

◆ CSL_DSS_VID1_ATTRIBUTES

#define CSL_DSS_VID1_ATTRIBUTES   (0x00000020U)

◆ CSL_DSS_VID1_ATTRIBUTES2

#define CSL_DSS_VID1_ATTRIBUTES2   (0x00000024U)

◆ CSL_DSS_VID1_BA_0

#define CSL_DSS_VID1_BA_0   (0x00000028U)

◆ CSL_DSS_VID1_BA_1

#define CSL_DSS_VID1_BA_1   (0x0000002CU)

◆ CSL_DSS_VID1_BA_UV_0

#define CSL_DSS_VID1_BA_UV_0   (0x00000030U)

◆ CSL_DSS_VID1_BA_UV_1

#define CSL_DSS_VID1_BA_UV_1   (0x00000034U)

◆ CSL_DSS_VID1_BUF_SIZE_STATUS

#define CSL_DSS_VID1_BUF_SIZE_STATUS   (0x00000038U)

◆ CSL_DSS_VID1_BUF_THRESHOLD

#define CSL_DSS_VID1_BUF_THRESHOLD   (0x0000003CU)

◆ CSL_DSS_VID1_CSC_COEF0

#define CSL_DSS_VID1_CSC_COEF0   (0x00000040U)

◆ CSL_DSS_VID1_CSC_COEF1

#define CSL_DSS_VID1_CSC_COEF1   (0x00000044U)

◆ CSL_DSS_VID1_CSC_COEF2

#define CSL_DSS_VID1_CSC_COEF2   (0x00000048U)

◆ CSL_DSS_VID1_CSC_COEF3

#define CSL_DSS_VID1_CSC_COEF3   (0x0000004CU)

◆ CSL_DSS_VID1_CSC_COEF4

#define CSL_DSS_VID1_CSC_COEF4   (0x00000050U)

◆ CSL_DSS_VID1_CSC_COEF5

#define CSL_DSS_VID1_CSC_COEF5   (0x00000054U)

◆ CSL_DSS_VID1_CSC_COEF6

#define CSL_DSS_VID1_CSC_COEF6   (0x00000058U)

◆ CSL_DSS_VID1_FIRH

#define CSL_DSS_VID1_FIRH   (0x0000005CU)

◆ CSL_DSS_VID1_FIRH2

#define CSL_DSS_VID1_FIRH2   (0x00000060U)

◆ CSL_DSS_VID1_FIRV

#define CSL_DSS_VID1_FIRV   (0x00000064U)

◆ CSL_DSS_VID1_FIRV2

#define CSL_DSS_VID1_FIRV2   (0x00000068U)

◆ CSL_DSS_VID1_FIR_COEF_H0

#define CSL_DSS_VID1_FIR_COEF_H0 (   index)    (0x0000006CU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID1_FIR_COEF_H0_C

#define CSL_DSS_VID1_FIR_COEF_H0_C (   index)    (0x00000090U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID1_FIR_COEF_H12

#define CSL_DSS_VID1_FIR_COEF_H12 (   index)    (0x000000B4U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID1_FIR_COEF_H12_C

#define CSL_DSS_VID1_FIR_COEF_H12_C (   index)    (0x000000F4U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID1_FIR_COEF_V0

#define CSL_DSS_VID1_FIR_COEF_V0 (   index)    (0x00000134U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID1_FIR_COEF_V0_C

#define CSL_DSS_VID1_FIR_COEF_V0_C (   index)    (0x00000158U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID1_FIR_COEF_V12

#define CSL_DSS_VID1_FIR_COEF_V12 (   index)    (0x0000017CU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID1_FIR_COEF_V12_C

#define CSL_DSS_VID1_FIR_COEF_V12_C (   index)    (0x000001BCU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID1_GLOBAL_ALPHA

#define CSL_DSS_VID1_GLOBAL_ALPHA   (0x000001FCU)

◆ CSL_DSS_VID1_MFLAG_THRESHOLD

#define CSL_DSS_VID1_MFLAG_THRESHOLD   (0x00000208U)

◆ CSL_DSS_VID1_PICTURE_SIZE

#define CSL_DSS_VID1_PICTURE_SIZE   (0x0000020CU)

◆ CSL_DSS_VID1_PIXEL_INC

#define CSL_DSS_VID1_PIXEL_INC   (0x00000210U)

◆ CSL_DSS_VID1_PRELOAD

#define CSL_DSS_VID1_PRELOAD   (0x00000218U)

◆ CSL_DSS_VID1_ROW_INC

#define CSL_DSS_VID1_ROW_INC   (0x0000021CU)

◆ CSL_DSS_VID1_SIZE

#define CSL_DSS_VID1_SIZE   (0x00000220U)

◆ CSL_DSS_VID1_BA_EXT_0

#define CSL_DSS_VID1_BA_EXT_0   (0x0000022CU)

◆ CSL_DSS_VID1_BA_EXT_1

#define CSL_DSS_VID1_BA_EXT_1   (0x00000230U)

◆ CSL_DSS_VID1_BA_UV_EXT_0

#define CSL_DSS_VID1_BA_UV_EXT_0   (0x00000234U)

◆ CSL_DSS_VID1_BA_UV_EXT_1

#define CSL_DSS_VID1_BA_UV_EXT_1   (0x00000238U)

◆ CSL_DSS_VID1_CSC_COEF7

#define CSL_DSS_VID1_CSC_COEF7   (0x0000023CU)

◆ CSL_DSS_VID1_ROW_INC_UV

#define CSL_DSS_VID1_ROW_INC_UV   (0x00000248U)

◆ CSL_DSS_VID1_TILE

#define CSL_DSS_VID1_TILE   (0x0000024CU)

◆ CSL_DSS_VID1_TILE2

#define CSL_DSS_VID1_TILE2   (0x00000250U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES

#define CSL_DSS_VID1_FBDC_ATTRIBUTES   (0x00000254U)

◆ CSL_DSS_VID1_FBDC_CLEAR_COLOR

#define CSL_DSS_VID1_FBDC_CLEAR_COLOR   (0x00000258U)

◆ CSL_DSS_VID1_CLUT_0

#define CSL_DSS_VID1_CLUT_0   (0x00000260U)

◆ CSL_DSS_VID1_CLUT_1

#define CSL_DSS_VID1_CLUT_1   (0x00000264U)

◆ CSL_DSS_VID1_CLUT_2

#define CSL_DSS_VID1_CLUT_2   (0x00000268U)

◆ CSL_DSS_VID1_CLUT_3

#define CSL_DSS_VID1_CLUT_3   (0x0000026CU)

◆ CSL_DSS_VID1_CLUT_4

#define CSL_DSS_VID1_CLUT_4   (0x00000270U)

◆ CSL_DSS_VID1_CLUT_5

#define CSL_DSS_VID1_CLUT_5   (0x00000274U)

◆ CSL_DSS_VID1_CLUT_6

#define CSL_DSS_VID1_CLUT_6   (0x00000278U)

◆ CSL_DSS_VID1_CLUT_7

#define CSL_DSS_VID1_CLUT_7   (0x0000027CU)

◆ CSL_DSS_VID1_CLUT_8

#define CSL_DSS_VID1_CLUT_8   (0x00000280U)

◆ CSL_DSS_VID1_CLUT_9

#define CSL_DSS_VID1_CLUT_9   (0x00000284U)

◆ CSL_DSS_VID1_CLUT_10

#define CSL_DSS_VID1_CLUT_10   (0x00000288U)

◆ CSL_DSS_VID1_CLUT_11

#define CSL_DSS_VID1_CLUT_11   (0x0000028CU)

◆ CSL_DSS_VID1_CLUT_12

#define CSL_DSS_VID1_CLUT_12   (0x00000290U)

◆ CSL_DSS_VID1_CLUT_13

#define CSL_DSS_VID1_CLUT_13   (0x00000294U)

◆ CSL_DSS_VID1_CLUT_14

#define CSL_DSS_VID1_CLUT_14   (0x00000298U)

◆ CSL_DSS_VID1_CLUT_15

#define CSL_DSS_VID1_CLUT_15   (0x0000029CU)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES   (0x000002A0U)

◆ CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE

#define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE   (0x000002A4U)

◆ CSL_DSS_VID1_SAFETY_POSITION

#define CSL_DSS_VID1_SAFETY_POSITION   (0x000002A8U)

◆ CSL_DSS_VID1_SAFETY_REF_SIGNATURE

#define CSL_DSS_VID1_SAFETY_REF_SIGNATURE   (0x000002ACU)

◆ CSL_DSS_VID1_SAFETY_SIZE

#define CSL_DSS_VID1_SAFETY_SIZE   (0x000002B0U)

◆ CSL_DSS_VID1_SAFETY_LFSR_SEED

#define CSL_DSS_VID1_SAFETY_LFSR_SEED   (0x000002B4U)

◆ CSL_DSS_VID1_LUMAKEY

#define CSL_DSS_VID1_LUMAKEY   (0x000002B8U)

◆ CSL_DSS_VID1_DMA_BUFSIZE

#define CSL_DSS_VID1_DMA_BUFSIZE   (0x000002BCU)

◆ CSL_DSS_VID1_CROP

#define CSL_DSS_VID1_CROP   (0x000002C0U)

◆ CSL_DSS_VID1_SECURE

#define CSL_DSS_VID1_SECURE   (0x000002C4U)

◆ CSL_DSS_VID1_PIPE_GO

#define CSL_DSS_VID1_PIPE_GO   (0x000002C8U)

◆ CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_MASK

#define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_SHIFT

#define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_MAX

#define CSL_DSS_VID1_ACCUH_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUH_0_RESERVED_MASK

#define CSL_DSS_VID1_ACCUH_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_ACCUH_0_RESERVED_SHIFT

#define CSL_DSS_VID1_ACCUH_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ACCUH_0_RESERVED_MAX

#define CSL_DSS_VID1_ACCUH_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_MASK

#define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_SHIFT

#define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_MAX

#define CSL_DSS_VID1_ACCUH_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUH_1_RESERVED_MASK

#define CSL_DSS_VID1_ACCUH_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_ACCUH_1_RESERVED_SHIFT

#define CSL_DSS_VID1_ACCUH_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ACCUH_1_RESERVED_MAX

#define CSL_DSS_VID1_ACCUH_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_MASK

#define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_SHIFT

#define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_MAX

#define CSL_DSS_VID1_ACCUH2_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUH2_0_RESERVED_MASK

#define CSL_DSS_VID1_ACCUH2_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_ACCUH2_0_RESERVED_SHIFT

#define CSL_DSS_VID1_ACCUH2_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ACCUH2_0_RESERVED_MAX

#define CSL_DSS_VID1_ACCUH2_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_MASK

#define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_SHIFT

#define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_MAX

#define CSL_DSS_VID1_ACCUH2_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUH2_1_RESERVED_MASK

#define CSL_DSS_VID1_ACCUH2_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_ACCUH2_1_RESERVED_SHIFT

#define CSL_DSS_VID1_ACCUH2_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ACCUH2_1_RESERVED_MAX

#define CSL_DSS_VID1_ACCUH2_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_ACCUV_0_VERTICALACCU_MASK

#define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUV_0_VERTICALACCU_SHIFT

#define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ACCUV_0_VERTICALACCU_MAX

#define CSL_DSS_VID1_ACCUV_0_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUV_0_RESERVED_MASK

#define CSL_DSS_VID1_ACCUV_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_ACCUV_0_RESERVED_SHIFT

#define CSL_DSS_VID1_ACCUV_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ACCUV_0_RESERVED_MAX

#define CSL_DSS_VID1_ACCUV_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_ACCUV_1_VERTICALACCU_MASK

#define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUV_1_VERTICALACCU_SHIFT

#define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ACCUV_1_VERTICALACCU_MAX

#define CSL_DSS_VID1_ACCUV_1_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUV_1_RESERVED_MASK

#define CSL_DSS_VID1_ACCUV_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_ACCUV_1_RESERVED_SHIFT

#define CSL_DSS_VID1_ACCUV_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ACCUV_1_RESERVED_MAX

#define CSL_DSS_VID1_ACCUV_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_MASK

#define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_SHIFT

#define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_MAX

#define CSL_DSS_VID1_ACCUV2_0_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUV2_0_RESERVED_MASK

#define CSL_DSS_VID1_ACCUV2_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_ACCUV2_0_RESERVED_SHIFT

#define CSL_DSS_VID1_ACCUV2_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ACCUV2_0_RESERVED_MAX

#define CSL_DSS_VID1_ACCUV2_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_MASK

#define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_SHIFT

#define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_MAX

#define CSL_DSS_VID1_ACCUV2_1_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_ACCUV2_1_RESERVED_MASK

#define CSL_DSS_VID1_ACCUV2_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_ACCUV2_1_RESERVED_SHIFT

#define CSL_DSS_VID1_ACCUV2_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ACCUV2_1_RESERVED_MAX

#define CSL_DSS_VID1_ACCUV2_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_ENABLE_VAL_VIDEOENB

#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_VAL_VIDEOENB   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_ENABLE_VAL_VIDEODIS

#define CSL_DSS_VID1_ATTRIBUTES_ENABLE_VAL_VIDEODIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB16_565

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR16_565

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB24P_888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR24P_888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR24P_888   (0xCU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010   (0xEU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010   (0xFU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP1

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP1   (0x12U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP2

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP2   (0x13U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP4

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP4   (0x14U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP8

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BITMAP8   (0x15U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB565A8

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR565A8

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010   (0x2EU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010   (0x2FU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_NV12

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)

◆ CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY

#define CSL_DSS_VID1_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)

◆ CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_MASK

#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_MASK   (0x00000180U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_SHIFT   (0x00000007U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_MAX

#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_MAX   (0x00000003U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC

#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE

#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE

#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE   (0x2U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE

#define CSL_DSS_VID1_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE   (0x3U)

◆ CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_MASK

#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000200U)

◆ CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x00000009U)

◆ CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_MAX

#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_VID1_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_MASK

#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_MASK   (0x00000400U)

◆ CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_MAX

#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN

#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS

#define CSL_DSS_VID1_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_MASK

#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_MASK   (0x00000800U)

◆ CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_MAX

#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_VID1_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_FLIP_MASK

#define CSL_DSS_VID1_ATTRIBUTES_FLIP_MASK   (0x00001000U)

◆ CSL_DSS_VID1_ATTRIBUTES_FLIP_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_FLIP_SHIFT   (0x0000000CU)

◆ CSL_DSS_VID1_ATTRIBUTES_FLIP_MAX

#define CSL_DSS_VID1_ATTRIBUTES_FLIP_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_FLIP_VAL_FLIP

#define CSL_DSS_VID1_ATTRIBUTES_FLIP_VAL_FLIP   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_FLIP_VAL_NOFLIP

#define CSL_DSS_VID1_ATTRIBUTES_FLIP_VAL_NOFLIP   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_CROP_MASK

#define CSL_DSS_VID1_ATTRIBUTES_CROP_MASK   (0x00002000U)

◆ CSL_DSS_VID1_ATTRIBUTES_CROP_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_CROP_SHIFT   (0x0000000DU)

◆ CSL_DSS_VID1_ATTRIBUTES_CROP_MAX

#define CSL_DSS_VID1_ATTRIBUTES_CROP_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_CROP_VAL_CROPEN

#define CSL_DSS_VID1_ATTRIBUTES_CROP_VAL_CROPEN   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_CROP_VAL_CROPDIS

#define CSL_DSS_VID1_ATTRIBUTES_CROP_VAL_CROPDIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED9_MASK

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_MASK   (0x0001C000U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED9_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_SHIFT   (0x0000000EU)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED9_MAX

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED9_MAX   (0x00000007U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_MASK

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_MASK   (0x00020000U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_SHIFT   (0x00000011U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_MAX

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED7_MASK

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_MASK   (0x00040000U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED7_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_SHIFT   (0x00000012U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED7_MAX

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED7_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_MASK

#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_MASK   (0x00080000U)

◆ CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_SHIFT   (0x00000013U)

◆ CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_MAX

#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES

#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL

#define CSL_DSS_VID1_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED2_MASK

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_MASK   (0x00100000U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED2_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED2_MAX

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_MASK

#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_MASK   (0x00200000U)

◆ CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_SHIFT   (0x00000015U)

◆ CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_MAX

#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5

#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3

#define CSL_DSS_VID1_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED6_MASK

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_MASK   (0x00400000U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED6_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_SHIFT   (0x00000016U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED6_MAX

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED6_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_MASK

#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)

◆ CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)

◆ CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_MAX

#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO

#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO

#define CSL_DSS_VID1_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_MASK

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_MASK   (0x01000000U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_MAX

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS

#define CSL_DSS_VID1_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED5_MASK

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_MASK   (0x0E000000U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED5_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_SHIFT   (0x00000019U)

◆ CSL_DSS_VID1_ATTRIBUTES_RESERVED5_MAX

#define CSL_DSS_VID1_ATTRIBUTES_RESERVED5_MAX   (0x00000007U)

◆ CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_MASK

#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_MASK   (0x10000000U)

◆ CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT   (0x0000001CU)

◆ CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_MAX

#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA

#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA

#define CSL_DSS_VID1_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_MASK

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_MASK   (0x20000000U)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT   (0x0000001DU)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_MAX

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_MASK

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_MASK   (0x40000000U)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_MAX

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS

#define CSL_DSS_VID1_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_MASK

#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_MASK   (0x80000000U)

◆ CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_MAX

#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN

#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS

#define CSL_DSS_VID1_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB

#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS

#define CSL_DSS_VID1_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_MASK   (0x0000000EU)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_SHIFT   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_Y_MAX   (0x00000007U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_MASK   (0x00000070U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT   (0x00000004U)

◆ CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_VC1_RANGE_CBCR_MAX   (0x00000007U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_8B

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_10B

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_12B

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_VAL_PACKED

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB

#define CSL_DSS_VID1_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_MASK   (0x0000F800U)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED1_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_MASK   (0x01F00000U)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED2_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_MASK   (0x02000000U)

◆ CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_SHIFT   (0x00000019U)

◆ CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_MAX   (0x00000001U)

◆ CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY

#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY   (0x0U)

◆ CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY

#define CSL_DSS_VID1_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY   (0x1U)

◆ CSL_DSS_VID1_ATTRIBUTES2_TAGS_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)

◆ CSL_DSS_VID1_ATTRIBUTES2_TAGS_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)

◆ CSL_DSS_VID1_ATTRIBUTES2_TAGS_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_MASK

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_MASK   (0x80000000U)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_SHIFT

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_MAX

#define CSL_DSS_VID1_ATTRIBUTES2_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VID1_BA_0_BA_MASK

#define CSL_DSS_VID1_BA_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_BA_0_BA_SHIFT

#define CSL_DSS_VID1_BA_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BA_0_BA_MAX

#define CSL_DSS_VID1_BA_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_BA_1_BA_MASK

#define CSL_DSS_VID1_BA_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_BA_1_BA_SHIFT

#define CSL_DSS_VID1_BA_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BA_1_BA_MAX

#define CSL_DSS_VID1_BA_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_BA_UV_0_BA_MASK

#define CSL_DSS_VID1_BA_UV_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_BA_UV_0_BA_SHIFT

#define CSL_DSS_VID1_BA_UV_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BA_UV_0_BA_MAX

#define CSL_DSS_VID1_BA_UV_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_BA_UV_1_BA_MASK

#define CSL_DSS_VID1_BA_UV_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_BA_UV_1_BA_SHIFT

#define CSL_DSS_VID1_BA_UV_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BA_UV_1_BA_MAX

#define CSL_DSS_VID1_BA_UV_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_MASK

#define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_SHIFT

#define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_MAX

#define CSL_DSS_VID1_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_MASK

#define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_SHIFT

#define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_MAX

#define CSL_DSS_VID1_BUF_SIZE_STATUS_RESERVED_61_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK

#define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT

#define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX

#define CSL_DSS_VID1_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK

#define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT

#define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX

#define CSL_DSS_VID1_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_CSC_COEF0_C00_MASK

#define CSL_DSS_VID1_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF0_C00_SHIFT

#define CSL_DSS_VID1_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CSC_COEF0_C00_MAX

#define CSL_DSS_VID1_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_VID1_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID1_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_VID1_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CSC_COEF0_C01_MASK

#define CSL_DSS_VID1_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_VID1_CSC_COEF0_C01_SHIFT

#define CSL_DSS_VID1_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_CSC_COEF0_C01_MAX

#define CSL_DSS_VID1_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_VID1_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_VID1_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_VID1_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CSC_COEF1_C02_MASK

#define CSL_DSS_VID1_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF1_C02_SHIFT

#define CSL_DSS_VID1_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CSC_COEF1_C02_MAX

#define CSL_DSS_VID1_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_VID1_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID1_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_VID1_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CSC_COEF1_C10_MASK

#define CSL_DSS_VID1_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_VID1_CSC_COEF1_C10_SHIFT

#define CSL_DSS_VID1_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_CSC_COEF1_C10_MAX

#define CSL_DSS_VID1_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_VID1_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_VID1_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_VID1_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CSC_COEF2_C11_MASK

#define CSL_DSS_VID1_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF2_C11_SHIFT

#define CSL_DSS_VID1_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CSC_COEF2_C11_MAX

#define CSL_DSS_VID1_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_VID1_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID1_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_VID1_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CSC_COEF2_C12_MASK

#define CSL_DSS_VID1_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_VID1_CSC_COEF2_C12_SHIFT

#define CSL_DSS_VID1_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_CSC_COEF2_C12_MAX

#define CSL_DSS_VID1_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_VID1_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_VID1_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_VID1_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CSC_COEF3_C20_MASK

#define CSL_DSS_VID1_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF3_C20_SHIFT

#define CSL_DSS_VID1_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CSC_COEF3_C20_MAX

#define CSL_DSS_VID1_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_VID1_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID1_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_VID1_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CSC_COEF3_C21_MASK

#define CSL_DSS_VID1_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_VID1_CSC_COEF3_C21_SHIFT

#define CSL_DSS_VID1_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_CSC_COEF3_C21_MAX

#define CSL_DSS_VID1_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_VID1_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_VID1_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_VID1_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CSC_COEF4_C22_MASK

#define CSL_DSS_VID1_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF4_C22_SHIFT

#define CSL_DSS_VID1_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CSC_COEF4_C22_MAX

#define CSL_DSS_VID1_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_VID1_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_VID1_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID1_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_VID1_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_VID1_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_VID1_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_VID1_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_VID1_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VID1_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_VID1_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VID1_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_VID1_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_VID1_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_VID1_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VID1_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_VID1_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_VID1_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_VID1_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_VID1_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VID1_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_VID1_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VID1_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_VID1_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_VID1_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_VID1_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VID1_FIRH_FIRHINC_MASK

#define CSL_DSS_VID1_FIRH_FIRHINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_FIRH_FIRHINC_SHIFT

#define CSL_DSS_VID1_FIRH_FIRHINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIRH_FIRHINC_MAX

#define CSL_DSS_VID1_FIRH_FIRHINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_FIRH_RESERVED_MASK

#define CSL_DSS_VID1_FIRH_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_FIRH_RESERVED_SHIFT

#define CSL_DSS_VID1_FIRH_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_FIRH_RESERVED_MAX

#define CSL_DSS_VID1_FIRH_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_FIRH2_FIRHINC_MASK

#define CSL_DSS_VID1_FIRH2_FIRHINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_FIRH2_FIRHINC_SHIFT

#define CSL_DSS_VID1_FIRH2_FIRHINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIRH2_FIRHINC_MAX

#define CSL_DSS_VID1_FIRH2_FIRHINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_FIRH2_RESERVED_MASK

#define CSL_DSS_VID1_FIRH2_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_FIRH2_RESERVED_SHIFT

#define CSL_DSS_VID1_FIRH2_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_FIRH2_RESERVED_MAX

#define CSL_DSS_VID1_FIRH2_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_FIRV_FIRVINC_MASK

#define CSL_DSS_VID1_FIRV_FIRVINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_FIRV_FIRVINC_SHIFT

#define CSL_DSS_VID1_FIRV_FIRVINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIRV_FIRVINC_MAX

#define CSL_DSS_VID1_FIRV_FIRVINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_FIRV_RESERVED_MASK

#define CSL_DSS_VID1_FIRV_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_FIRV_RESERVED_SHIFT

#define CSL_DSS_VID1_FIRV_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_FIRV_RESERVED_MAX

#define CSL_DSS_VID1_FIRV_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_FIRV2_FIRVINC_MASK

#define CSL_DSS_VID1_FIRV2_FIRVINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID1_FIRV2_FIRVINC_SHIFT

#define CSL_DSS_VID1_FIRV2_FIRVINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIRV2_FIRVINC_MAX

#define CSL_DSS_VID1_FIRV2_FIRVINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_FIRV2_RESERVED_MASK

#define CSL_DSS_VID1_FIRV2_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID1_FIRV2_RESERVED_SHIFT

#define CSL_DSS_VID1_FIRV2_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_FIRV2_RESERVED_MAX

#define CSL_DSS_VID1_FIRV2_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_MASK

#define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_MAX

#define CSL_DSS_VID1_FIR_COEF_H0_FIRHC0_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_MASK

#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_MASK   (0x3FFFFC00U)

◆ CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_MAX

#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED1_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID1_FIR_COEF_H0_RESERVED_MASK

#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID1_FIR_COEF_H0_RESERVED_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_FIR_COEF_H0_RESERVED_MAX

#define CSL_DSS_VID1_FIR_COEF_H0_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_MASK

#define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_MAX

#define CSL_DSS_VID1_FIR_COEF_H0_C_FIRHC0_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_MASK

#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_MASK   (0x3FFFFC00U)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_MAX

#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED1_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_MASK

#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_MAX

#define CSL_DSS_VID1_FIR_COEF_H0_C_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_MASK

#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_MAX

#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED1_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_MASK

#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_MAX

#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC1_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_MASK

#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_MAX

#define CSL_DSS_VID1_FIR_COEF_H12_FIRHC2_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H12_RESERVED_MASK

#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID1_FIR_COEF_H12_RESERVED_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_FIR_COEF_H12_RESERVED_MAX

#define CSL_DSS_VID1_FIR_COEF_H12_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_MASK

#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_MAX

#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED1_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_MASK

#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_MAX

#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC1_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_MASK

#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_MAX

#define CSL_DSS_VID1_FIR_COEF_H12_C_FIRHC2_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_MASK

#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_SHIFT

#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_MAX

#define CSL_DSS_VID1_FIR_COEF_H12_C_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_MASK

#define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_MAX

#define CSL_DSS_VID1_FIR_COEF_V0_FIRVC0_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_MASK

#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_MASK   (0x3FFFFC00U)

◆ CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_MAX

#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED1_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID1_FIR_COEF_V0_RESERVED_MASK

#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID1_FIR_COEF_V0_RESERVED_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_FIR_COEF_V0_RESERVED_MAX

#define CSL_DSS_VID1_FIR_COEF_V0_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_MASK

#define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_MAX

#define CSL_DSS_VID1_FIR_COEF_V0_C_FIRVC0_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_MASK

#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_MASK   (0x3FFFFC00U)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_MAX

#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED1_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_MASK

#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_MAX

#define CSL_DSS_VID1_FIR_COEF_V0_C_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_MASK

#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_MAX

#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED1_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_MASK

#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_MAX

#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC1_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_MASK

#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_MAX

#define CSL_DSS_VID1_FIR_COEF_V12_FIRVC2_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V12_RESERVED_MASK

#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID1_FIR_COEF_V12_RESERVED_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_FIR_COEF_V12_RESERVED_MAX

#define CSL_DSS_VID1_FIR_COEF_V12_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_MASK

#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_MAX

#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED1_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_MASK

#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_MAX

#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC1_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_MASK

#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_MAX

#define CSL_DSS_VID1_FIR_COEF_V12_C_FIRVC2_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_MASK

#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_SHIFT

#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_MAX

#define CSL_DSS_VID1_FIR_COEF_V12_C_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_MASK

#define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_MASK   (0x000000FFU)

◆ CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT

#define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_MAX

#define CSL_DSS_VID1_GLOBAL_ALPHA_GLOBALALPHA_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_MASK

#define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_MASK   (0xFFFFFF00U)

◆ CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_SHIFT

#define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_SHIFT   (0x00000008U)

◆ CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_MAX

#define CSL_DSS_VID1_GLOBAL_ALPHA_RESERVED_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_MASK

#define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT

#define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_MAX

#define CSL_DSS_VID1_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_MASK

#define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT

#define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_MAX

#define CSL_DSS_VID1_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_MASK

#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_SHIFT

#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_MAX

#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_MASK

#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_SHIFT

#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_MAX

#define CSL_DSS_VID1_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VID1_PIXEL_INC_PIXELINC_MASK

#define CSL_DSS_VID1_PIXEL_INC_PIXELINC_MASK   (0x000000FFU)

◆ CSL_DSS_VID1_PIXEL_INC_PIXELINC_SHIFT

#define CSL_DSS_VID1_PIXEL_INC_PIXELINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_PIXEL_INC_PIXELINC_MAX

#define CSL_DSS_VID1_PIXEL_INC_PIXELINC_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_PIXEL_INC_RESERVED_68_MASK

#define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_MASK   (0xFFFFFF00U)

◆ CSL_DSS_VID1_PIXEL_INC_RESERVED_68_SHIFT

#define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_SHIFT   (0x00000008U)

◆ CSL_DSS_VID1_PIXEL_INC_RESERVED_68_MAX

#define CSL_DSS_VID1_PIXEL_INC_RESERVED_68_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID1_PRELOAD_PRELOAD_MASK

#define CSL_DSS_VID1_PRELOAD_PRELOAD_MASK   (0x00000FFFU)

◆ CSL_DSS_VID1_PRELOAD_PRELOAD_SHIFT

#define CSL_DSS_VID1_PRELOAD_PRELOAD_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_PRELOAD_PRELOAD_MAX

#define CSL_DSS_VID1_PRELOAD_PRELOAD_MAX   (0x00000FFFU)

◆ CSL_DSS_VID1_PRELOAD_RESERVED_212_MASK

#define CSL_DSS_VID1_PRELOAD_RESERVED_212_MASK   (0xFFFFF000U)

◆ CSL_DSS_VID1_PRELOAD_RESERVED_212_SHIFT

#define CSL_DSS_VID1_PRELOAD_RESERVED_212_SHIFT   (0x0000000CU)

◆ CSL_DSS_VID1_PRELOAD_RESERVED_212_MAX

#define CSL_DSS_VID1_PRELOAD_RESERVED_212_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID1_ROW_INC_ROWINC_MASK

#define CSL_DSS_VID1_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_ROW_INC_ROWINC_SHIFT

#define CSL_DSS_VID1_ROW_INC_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ROW_INC_ROWINC_MAX

#define CSL_DSS_VID1_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_SIZE_SIZEX_MASK

#define CSL_DSS_VID1_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VID1_SIZE_SIZEX_SHIFT

#define CSL_DSS_VID1_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_SIZE_SIZEX_MAX

#define CSL_DSS_VID1_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VID1_SIZE_SIZEY_MASK

#define CSL_DSS_VID1_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VID1_SIZE_SIZEY_SHIFT

#define CSL_DSS_VID1_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_SIZE_SIZEY_MAX

#define CSL_DSS_VID1_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VID1_BA_EXT_0_BA_EXT_MASK

#define CSL_DSS_VID1_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_EXT_0_BA_EXT_SHIFT

#define CSL_DSS_VID1_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BA_EXT_0_BA_EXT_MAX

#define CSL_DSS_VID1_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_EXT_0_RESERVED_MASK

#define CSL_DSS_VID1_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID1_BA_EXT_0_RESERVED_SHIFT

#define CSL_DSS_VID1_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_BA_EXT_0_RESERVED_MAX

#define CSL_DSS_VID1_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_EXT_1_BA_EXT_MASK

#define CSL_DSS_VID1_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_EXT_1_BA_EXT_SHIFT

#define CSL_DSS_VID1_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BA_EXT_1_BA_EXT_MAX

#define CSL_DSS_VID1_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_EXT_1_RESERVED_MASK

#define CSL_DSS_VID1_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID1_BA_EXT_1_RESERVED_SHIFT

#define CSL_DSS_VID1_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_BA_EXT_1_RESERVED_MAX

#define CSL_DSS_VID1_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_MASK

#define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_SHIFT

#define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_MAX

#define CSL_DSS_VID1_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_MASK

#define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_SHIFT

#define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_MAX

#define CSL_DSS_VID1_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_MASK

#define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_SHIFT

#define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_MAX

#define CSL_DSS_VID1_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_MASK

#define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_SHIFT

#define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_MAX

#define CSL_DSS_VID1_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID1_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_VID1_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_VID1_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_VID1_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VID1_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_VID1_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VID1_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_VID1_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_VID1_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_VID1_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VID1_ROW_INC_UV_ROWINC_MASK

#define CSL_DSS_VID1_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_ROW_INC_UV_ROWINC_SHIFT

#define CSL_DSS_VID1_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_ROW_INC_UV_ROWINC_MAX

#define CSL_DSS_VID1_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_TILE_TILEINDEX_MASK

#define CSL_DSS_VID1_TILE_TILEINDEX_MASK   (0x007FFFFFU)

◆ CSL_DSS_VID1_TILE_TILEINDEX_SHIFT

#define CSL_DSS_VID1_TILE_TILEINDEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_TILE_TILEINDEX_MAX

#define CSL_DSS_VID1_TILE_TILEINDEX_MAX   (0x007FFFFFU)

◆ CSL_DSS_VID1_TILE2_NUM_TILES_MASK

#define CSL_DSS_VID1_TILE2_NUM_TILES_MASK   (0x007FFFFFU)

◆ CSL_DSS_VID1_TILE2_NUM_TILES_SHIFT

#define CSL_DSS_VID1_TILE2_NUM_TILES_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_TILE2_NUM_TILES_MAX

#define CSL_DSS_VID1_TILE2_NUM_TILES_MAX   (0x007FFFFFU)

◆ CSL_DSS_VID1_TILE2_RESERVED_MASK

#define CSL_DSS_VID1_TILE2_RESERVED_MASK   (0xFF800000U)

◆ CSL_DSS_VID1_TILE2_RESERVED_SHIFT

#define CSL_DSS_VID1_TILE2_RESERVED_SHIFT   (0x00000017U)

◆ CSL_DSS_VID1_TILE2_RESERVED_MAX

#define CSL_DSS_VID1_TILE2_RESERVED_MAX   (0x000001FFU)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_MASK   (0x000000FEU)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_MAX   (0x0000007FU)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8   (0xCU)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10   (0xEU)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_MASK

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_MASK   (0x00000300U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_SHIFT

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_SHIFT   (0x00000008U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_MAX

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_MAX   (0x00000003U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4   (0x2U)

◆ CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2

#define CSL_DSS_VID1_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2   (0x3U)

◆ CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK

#define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT

#define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX

#define CSL_DSS_VID1_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_CLUT_0_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_0_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_0_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_0_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_0_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_0_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_0_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_0_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_0_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_0_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_0_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_0_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_0_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_0_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_0_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_0_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_0_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_0_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_0_INDEX_MASK

#define CSL_DSS_VID1_CLUT_0_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_0_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_0_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_0_INDEX_MAX

#define CSL_DSS_VID1_CLUT_0_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_1_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_1_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_1_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_1_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_1_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_1_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_1_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_1_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_1_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_1_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_1_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_1_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_1_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_1_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_1_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_1_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_1_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_1_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_1_INDEX_MASK

#define CSL_DSS_VID1_CLUT_1_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_1_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_1_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_1_INDEX_MAX

#define CSL_DSS_VID1_CLUT_1_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_2_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_2_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_2_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_2_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_2_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_2_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_2_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_2_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_2_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_2_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_2_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_2_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_2_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_2_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_2_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_2_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_2_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_2_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_2_INDEX_MASK

#define CSL_DSS_VID1_CLUT_2_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_2_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_2_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_2_INDEX_MAX

#define CSL_DSS_VID1_CLUT_2_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_3_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_3_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_3_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_3_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_3_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_3_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_3_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_3_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_3_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_3_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_3_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_3_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_3_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_3_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_3_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_3_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_3_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_3_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_3_INDEX_MASK

#define CSL_DSS_VID1_CLUT_3_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_3_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_3_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_3_INDEX_MAX

#define CSL_DSS_VID1_CLUT_3_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_4_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_4_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_4_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_4_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_4_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_4_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_4_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_4_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_4_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_4_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_4_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_4_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_4_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_4_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_4_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_4_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_4_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_4_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_4_INDEX_MASK

#define CSL_DSS_VID1_CLUT_4_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_4_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_4_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_4_INDEX_MAX

#define CSL_DSS_VID1_CLUT_4_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_5_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_5_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_5_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_5_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_5_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_5_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_5_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_5_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_5_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_5_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_5_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_5_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_5_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_5_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_5_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_5_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_5_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_5_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_5_INDEX_MASK

#define CSL_DSS_VID1_CLUT_5_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_5_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_5_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_5_INDEX_MAX

#define CSL_DSS_VID1_CLUT_5_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_6_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_6_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_6_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_6_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_6_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_6_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_6_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_6_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_6_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_6_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_6_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_6_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_6_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_6_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_6_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_6_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_6_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_6_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_6_INDEX_MASK

#define CSL_DSS_VID1_CLUT_6_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_6_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_6_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_6_INDEX_MAX

#define CSL_DSS_VID1_CLUT_6_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_7_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_7_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_7_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_7_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_7_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_7_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_7_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_7_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_7_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_7_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_7_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_7_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_7_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_7_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_7_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_7_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_7_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_7_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_7_INDEX_MASK

#define CSL_DSS_VID1_CLUT_7_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_7_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_7_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_7_INDEX_MAX

#define CSL_DSS_VID1_CLUT_7_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_8_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_8_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_8_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_8_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_8_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_8_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_8_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_8_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_8_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_8_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_8_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_8_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_8_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_8_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_8_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_8_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_8_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_8_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_8_INDEX_MASK

#define CSL_DSS_VID1_CLUT_8_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_8_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_8_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_8_INDEX_MAX

#define CSL_DSS_VID1_CLUT_8_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_9_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_9_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_9_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_9_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_9_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_9_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_9_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_9_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_9_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_9_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_9_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_9_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_9_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_9_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_9_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_9_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_9_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_9_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_9_INDEX_MASK

#define CSL_DSS_VID1_CLUT_9_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_9_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_9_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_9_INDEX_MAX

#define CSL_DSS_VID1_CLUT_9_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_10_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_10_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_10_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_10_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_10_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_10_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_10_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_10_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_10_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_10_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_10_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_10_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_10_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_10_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_10_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_10_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_10_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_10_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_10_INDEX_MASK

#define CSL_DSS_VID1_CLUT_10_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_10_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_10_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_10_INDEX_MAX

#define CSL_DSS_VID1_CLUT_10_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_11_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_11_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_11_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_11_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_11_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_11_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_11_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_11_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_11_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_11_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_11_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_11_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_11_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_11_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_11_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_11_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_11_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_11_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_11_INDEX_MASK

#define CSL_DSS_VID1_CLUT_11_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_11_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_11_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_11_INDEX_MAX

#define CSL_DSS_VID1_CLUT_11_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_12_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_12_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_12_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_12_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_12_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_12_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_12_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_12_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_12_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_12_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_12_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_12_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_12_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_12_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_12_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_12_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_12_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_12_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_12_INDEX_MASK

#define CSL_DSS_VID1_CLUT_12_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_12_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_12_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_12_INDEX_MAX

#define CSL_DSS_VID1_CLUT_12_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_13_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_13_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_13_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_13_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_13_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_13_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_13_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_13_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_13_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_13_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_13_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_13_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_13_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_13_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_13_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_13_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_13_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_13_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_13_INDEX_MASK

#define CSL_DSS_VID1_CLUT_13_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_13_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_13_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_13_INDEX_MAX

#define CSL_DSS_VID1_CLUT_13_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_14_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_14_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_14_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_14_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_14_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_14_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_14_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_14_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_14_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_14_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_14_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_14_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_14_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_14_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_14_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_14_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_14_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_14_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_14_INDEX_MASK

#define CSL_DSS_VID1_CLUT_14_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_14_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_14_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_14_INDEX_MAX

#define CSL_DSS_VID1_CLUT_14_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_CLUT_15_VALUE_B_MASK

#define CSL_DSS_VID1_CLUT_15_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_15_VALUE_B_SHIFT

#define CSL_DSS_VID1_CLUT_15_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CLUT_15_VALUE_B_MAX

#define CSL_DSS_VID1_CLUT_15_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_15_VALUE_G_MASK

#define CSL_DSS_VID1_CLUT_15_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID1_CLUT_15_VALUE_G_SHIFT

#define CSL_DSS_VID1_CLUT_15_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID1_CLUT_15_VALUE_G_MAX

#define CSL_DSS_VID1_CLUT_15_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_15_VALUE_R_MASK

#define CSL_DSS_VID1_CLUT_15_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID1_CLUT_15_VALUE_R_SHIFT

#define CSL_DSS_VID1_CLUT_15_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID1_CLUT_15_VALUE_R_MAX

#define CSL_DSS_VID1_CLUT_15_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID1_CLUT_15_INDEX_MASK

#define CSL_DSS_VID1_CLUT_15_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID1_CLUT_15_INDEX_SHIFT

#define CSL_DSS_VID1_CLUT_15_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID1_CLUT_15_INDEX_MAX

#define CSL_DSS_VID1_CLUT_15_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_MASK

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_MAX

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_MASK

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_SHIFT

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)

◆ CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_MAX

#define CSL_DSS_VID1_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)

◆ CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VID1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_SAFETY_POSITION_POSX_MASK

#define CSL_DSS_VID1_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_VID1_SAFETY_POSITION_POSX_SHIFT

#define CSL_DSS_VID1_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_SAFETY_POSITION_POSX_MAX

#define CSL_DSS_VID1_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_VID1_SAFETY_POSITION_POSY_MASK

#define CSL_DSS_VID1_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VID1_SAFETY_POSITION_POSY_SHIFT

#define CSL_DSS_VID1_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_SAFETY_POSITION_POSY_MAX

#define CSL_DSS_VID1_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VID1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_SAFETY_SIZE_SIZEX_MASK

#define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VID1_SAFETY_SIZE_SIZEX_SHIFT

#define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_SAFETY_SIZE_SIZEX_MAX

#define CSL_DSS_VID1_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VID1_SAFETY_SIZE_SIZEY_MASK

#define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VID1_SAFETY_SIZE_SIZEY_SHIFT

#define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_SAFETY_SIZE_SIZEY_MAX

#define CSL_DSS_VID1_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_MASK

#define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_SHIFT

#define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_MAX

#define CSL_DSS_VID1_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_MASK

#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_MASK   (0x00000FFFU)

◆ CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_SHIFT

#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_MAX

#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMIN_MAX   (0x00000FFFU)

◆ CSL_DSS_VID1_LUMAKEY_RESERVED_MASK

#define CSL_DSS_VID1_LUMAKEY_RESERVED_MASK   (0x0000F000U)

◆ CSL_DSS_VID1_LUMAKEY_RESERVED_SHIFT

#define CSL_DSS_VID1_LUMAKEY_RESERVED_SHIFT   (0x0000000CU)

◆ CSL_DSS_VID1_LUMAKEY_RESERVED_MAX

#define CSL_DSS_VID1_LUMAKEY_RESERVED_MAX   (0x0000000FU)

◆ CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_MASK

#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_MASK   (0x0FFF0000U)

◆ CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_SHIFT

#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_MAX

#define CSL_DSS_VID1_LUMAKEY_LUMAKEYMAX_MAX   (0x00000FFFU)

◆ CSL_DSS_VID1_LUMAKEY_RESERVED1_MASK

#define CSL_DSS_VID1_LUMAKEY_RESERVED1_MASK   (0xF0000000U)

◆ CSL_DSS_VID1_LUMAKEY_RESERVED1_SHIFT

#define CSL_DSS_VID1_LUMAKEY_RESERVED1_SHIFT   (0x0000001CU)

◆ CSL_DSS_VID1_LUMAKEY_RESERVED1_MAX

#define CSL_DSS_VID1_LUMAKEY_RESERVED1_MAX   (0x0000000FU)

◆ CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_MASK

#define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_MASK   (0x0000001FU)

◆ CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_SHIFT

#define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_MAX

#define CSL_DSS_VID1_DMA_BUFSIZE_BUFSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_MASK

#define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_SHIFT

#define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_MAX

#define CSL_DSS_VID1_DMA_BUFSIZE_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_VID1_CROP_CROPLEFT_MASK

#define CSL_DSS_VID1_CROP_CROPLEFT_MASK   (0x0000001FU)

◆ CSL_DSS_VID1_CROP_CROPLEFT_SHIFT

#define CSL_DSS_VID1_CROP_CROPLEFT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_CROP_CROPLEFT_MAX

#define CSL_DSS_VID1_CROP_CROPLEFT_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CROP_CROPRIGHT_MASK

#define CSL_DSS_VID1_CROP_CROPRIGHT_MASK   (0x00001F00U)

◆ CSL_DSS_VID1_CROP_CROPRIGHT_SHIFT

#define CSL_DSS_VID1_CROP_CROPRIGHT_SHIFT   (0x00000008U)

◆ CSL_DSS_VID1_CROP_CROPRIGHT_MAX

#define CSL_DSS_VID1_CROP_CROPRIGHT_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CROP_CROPTOP_MASK

#define CSL_DSS_VID1_CROP_CROPTOP_MASK   (0x001F0000U)

◆ CSL_DSS_VID1_CROP_CROPTOP_SHIFT

#define CSL_DSS_VID1_CROP_CROPTOP_SHIFT   (0x00000010U)

◆ CSL_DSS_VID1_CROP_CROPTOP_MAX

#define CSL_DSS_VID1_CROP_CROPTOP_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_CROP_CROPBOTTOM_MASK

#define CSL_DSS_VID1_CROP_CROPBOTTOM_MASK   (0x1F000000U)

◆ CSL_DSS_VID1_CROP_CROPBOTTOM_SHIFT

#define CSL_DSS_VID1_CROP_CROPBOTTOM_SHIFT   (0x00000018U)

◆ CSL_DSS_VID1_CROP_CROPBOTTOM_MAX

#define CSL_DSS_VID1_CROP_CROPBOTTOM_MAX   (0x0000001FU)

◆ CSL_DSS_VID1_SECURE_SECURE_MASK

#define CSL_DSS_VID1_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_VID1_SECURE_SECURE_SHIFT

#define CSL_DSS_VID1_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_SECURE_SECURE_MAX

#define CSL_DSS_VID1_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_VID1_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_VID1_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_VID1_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_VID1_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_VID1_SECURE_RESERVED_MASK

#define CSL_DSS_VID1_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VID1_SECURE_RESERVED_SHIFT

#define CSL_DSS_VID1_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VID1_SECURE_RESERVED_MAX

#define CSL_DSS_VID1_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VID1_PIPE_GO_GOBIT_MASK

#define CSL_DSS_VID1_PIPE_GO_GOBIT_MASK   (0x00000001U)

◆ CSL_DSS_VID1_PIPE_GO_GOBIT_SHIFT

#define CSL_DSS_VID1_PIPE_GO_GOBIT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID1_PIPE_GO_GOBIT_MAX

#define CSL_DSS_VID1_PIPE_GO_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_VID1_PIPE_GO_GOBIT_VAL_HFUISR

#define CSL_DSS_VID1_PIPE_GO_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_VID1_PIPE_GO_GOBIT_VAL_UFPSR

#define CSL_DSS_VID1_PIPE_GO_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_VID1_PIPE_GO_RESERVED_MASK

#define CSL_DSS_VID1_PIPE_GO_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VID1_PIPE_GO_RESERVED_SHIFT

#define CSL_DSS_VID1_PIPE_GO_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VID1_PIPE_GO_RESERVED_MAX

#define CSL_DSS_VID1_PIPE_GO_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VID2_ACCUH_0

#define CSL_DSS_VID2_ACCUH_0   (0x00000000U)

◆ CSL_DSS_VID2_ACCUH_1

#define CSL_DSS_VID2_ACCUH_1   (0x00000004U)

◆ CSL_DSS_VID2_ACCUH2_0

#define CSL_DSS_VID2_ACCUH2_0   (0x00000008U)

◆ CSL_DSS_VID2_ACCUH2_1

#define CSL_DSS_VID2_ACCUH2_1   (0x0000000CU)

◆ CSL_DSS_VID2_ACCUV_0

#define CSL_DSS_VID2_ACCUV_0   (0x00000010U)

◆ CSL_DSS_VID2_ACCUV_1

#define CSL_DSS_VID2_ACCUV_1   (0x00000014U)

◆ CSL_DSS_VID2_ACCUV2_0

#define CSL_DSS_VID2_ACCUV2_0   (0x00000018U)

◆ CSL_DSS_VID2_ACCUV2_1

#define CSL_DSS_VID2_ACCUV2_1   (0x0000001CU)

◆ CSL_DSS_VID2_ATTRIBUTES

#define CSL_DSS_VID2_ATTRIBUTES   (0x00000020U)

◆ CSL_DSS_VID2_ATTRIBUTES2

#define CSL_DSS_VID2_ATTRIBUTES2   (0x00000024U)

◆ CSL_DSS_VID2_BA_0

#define CSL_DSS_VID2_BA_0   (0x00000028U)

◆ CSL_DSS_VID2_BA_1

#define CSL_DSS_VID2_BA_1   (0x0000002CU)

◆ CSL_DSS_VID2_BA_UV_0

#define CSL_DSS_VID2_BA_UV_0   (0x00000030U)

◆ CSL_DSS_VID2_BA_UV_1

#define CSL_DSS_VID2_BA_UV_1   (0x00000034U)

◆ CSL_DSS_VID2_BUF_SIZE_STATUS

#define CSL_DSS_VID2_BUF_SIZE_STATUS   (0x00000038U)

◆ CSL_DSS_VID2_BUF_THRESHOLD

#define CSL_DSS_VID2_BUF_THRESHOLD   (0x0000003CU)

◆ CSL_DSS_VID2_CSC_COEF0

#define CSL_DSS_VID2_CSC_COEF0   (0x00000040U)

◆ CSL_DSS_VID2_CSC_COEF1

#define CSL_DSS_VID2_CSC_COEF1   (0x00000044U)

◆ CSL_DSS_VID2_CSC_COEF2

#define CSL_DSS_VID2_CSC_COEF2   (0x00000048U)

◆ CSL_DSS_VID2_CSC_COEF3

#define CSL_DSS_VID2_CSC_COEF3   (0x0000004CU)

◆ CSL_DSS_VID2_CSC_COEF4

#define CSL_DSS_VID2_CSC_COEF4   (0x00000050U)

◆ CSL_DSS_VID2_CSC_COEF5

#define CSL_DSS_VID2_CSC_COEF5   (0x00000054U)

◆ CSL_DSS_VID2_CSC_COEF6

#define CSL_DSS_VID2_CSC_COEF6   (0x00000058U)

◆ CSL_DSS_VID2_FIRH

#define CSL_DSS_VID2_FIRH   (0x0000005CU)

◆ CSL_DSS_VID2_FIRH2

#define CSL_DSS_VID2_FIRH2   (0x00000060U)

◆ CSL_DSS_VID2_FIRV

#define CSL_DSS_VID2_FIRV   (0x00000064U)

◆ CSL_DSS_VID2_FIRV2

#define CSL_DSS_VID2_FIRV2   (0x00000068U)

◆ CSL_DSS_VID2_FIR_COEF_H0

#define CSL_DSS_VID2_FIR_COEF_H0 (   index)    (0x0000006CU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID2_FIR_COEF_H0_C

#define CSL_DSS_VID2_FIR_COEF_H0_C (   index)    (0x00000090U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID2_FIR_COEF_H12

#define CSL_DSS_VID2_FIR_COEF_H12 (   index)    (0x000000B4U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID2_FIR_COEF_H12_C

#define CSL_DSS_VID2_FIR_COEF_H12_C (   index)    (0x000000F4U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID2_FIR_COEF_V0

#define CSL_DSS_VID2_FIR_COEF_V0 (   index)    (0x00000134U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID2_FIR_COEF_V0_C

#define CSL_DSS_VID2_FIR_COEF_V0_C (   index)    (0x00000158U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID2_FIR_COEF_V12

#define CSL_DSS_VID2_FIR_COEF_V12 (   index)    (0x0000017CU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID2_FIR_COEF_V12_C

#define CSL_DSS_VID2_FIR_COEF_V12_C (   index)    (0x000001BCU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VID2_GLOBAL_ALPHA

#define CSL_DSS_VID2_GLOBAL_ALPHA   (0x000001FCU)

◆ CSL_DSS_VID2_MFLAG_THRESHOLD

#define CSL_DSS_VID2_MFLAG_THRESHOLD   (0x00000208U)

◆ CSL_DSS_VID2_PICTURE_SIZE

#define CSL_DSS_VID2_PICTURE_SIZE   (0x0000020CU)

◆ CSL_DSS_VID2_PIXEL_INC

#define CSL_DSS_VID2_PIXEL_INC   (0x00000210U)

◆ CSL_DSS_VID2_PRELOAD

#define CSL_DSS_VID2_PRELOAD   (0x00000218U)

◆ CSL_DSS_VID2_ROW_INC

#define CSL_DSS_VID2_ROW_INC   (0x0000021CU)

◆ CSL_DSS_VID2_SIZE

#define CSL_DSS_VID2_SIZE   (0x00000220U)

◆ CSL_DSS_VID2_BA_EXT_0

#define CSL_DSS_VID2_BA_EXT_0   (0x0000022CU)

◆ CSL_DSS_VID2_BA_EXT_1

#define CSL_DSS_VID2_BA_EXT_1   (0x00000230U)

◆ CSL_DSS_VID2_BA_UV_EXT_0

#define CSL_DSS_VID2_BA_UV_EXT_0   (0x00000234U)

◆ CSL_DSS_VID2_BA_UV_EXT_1

#define CSL_DSS_VID2_BA_UV_EXT_1   (0x00000238U)

◆ CSL_DSS_VID2_CSC_COEF7

#define CSL_DSS_VID2_CSC_COEF7   (0x0000023CU)

◆ CSL_DSS_VID2_ROW_INC_UV

#define CSL_DSS_VID2_ROW_INC_UV   (0x00000248U)

◆ CSL_DSS_VID2_TILE

#define CSL_DSS_VID2_TILE   (0x0000024CU)

◆ CSL_DSS_VID2_TILE2

#define CSL_DSS_VID2_TILE2   (0x00000250U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES

#define CSL_DSS_VID2_FBDC_ATTRIBUTES   (0x00000254U)

◆ CSL_DSS_VID2_FBDC_CLEAR_COLOR

#define CSL_DSS_VID2_FBDC_CLEAR_COLOR   (0x00000258U)

◆ CSL_DSS_VID2_CLUT_0

#define CSL_DSS_VID2_CLUT_0   (0x00000260U)

◆ CSL_DSS_VID2_CLUT_1

#define CSL_DSS_VID2_CLUT_1   (0x00000264U)

◆ CSL_DSS_VID2_CLUT_2

#define CSL_DSS_VID2_CLUT_2   (0x00000268U)

◆ CSL_DSS_VID2_CLUT_3

#define CSL_DSS_VID2_CLUT_3   (0x0000026CU)

◆ CSL_DSS_VID2_CLUT_4

#define CSL_DSS_VID2_CLUT_4   (0x00000270U)

◆ CSL_DSS_VID2_CLUT_5

#define CSL_DSS_VID2_CLUT_5   (0x00000274U)

◆ CSL_DSS_VID2_CLUT_6

#define CSL_DSS_VID2_CLUT_6   (0x00000278U)

◆ CSL_DSS_VID2_CLUT_7

#define CSL_DSS_VID2_CLUT_7   (0x0000027CU)

◆ CSL_DSS_VID2_CLUT_8

#define CSL_DSS_VID2_CLUT_8   (0x00000280U)

◆ CSL_DSS_VID2_CLUT_9

#define CSL_DSS_VID2_CLUT_9   (0x00000284U)

◆ CSL_DSS_VID2_CLUT_10

#define CSL_DSS_VID2_CLUT_10   (0x00000288U)

◆ CSL_DSS_VID2_CLUT_11

#define CSL_DSS_VID2_CLUT_11   (0x0000028CU)

◆ CSL_DSS_VID2_CLUT_12

#define CSL_DSS_VID2_CLUT_12   (0x00000290U)

◆ CSL_DSS_VID2_CLUT_13

#define CSL_DSS_VID2_CLUT_13   (0x00000294U)

◆ CSL_DSS_VID2_CLUT_14

#define CSL_DSS_VID2_CLUT_14   (0x00000298U)

◆ CSL_DSS_VID2_CLUT_15

#define CSL_DSS_VID2_CLUT_15   (0x0000029CU)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES   (0x000002A0U)

◆ CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE

#define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE   (0x000002A4U)

◆ CSL_DSS_VID2_SAFETY_POSITION

#define CSL_DSS_VID2_SAFETY_POSITION   (0x000002A8U)

◆ CSL_DSS_VID2_SAFETY_REF_SIGNATURE

#define CSL_DSS_VID2_SAFETY_REF_SIGNATURE   (0x000002ACU)

◆ CSL_DSS_VID2_SAFETY_SIZE

#define CSL_DSS_VID2_SAFETY_SIZE   (0x000002B0U)

◆ CSL_DSS_VID2_SAFETY_LFSR_SEED

#define CSL_DSS_VID2_SAFETY_LFSR_SEED   (0x000002B4U)

◆ CSL_DSS_VID2_LUMAKEY

#define CSL_DSS_VID2_LUMAKEY   (0x000002B8U)

◆ CSL_DSS_VID2_DMA_BUFSIZE

#define CSL_DSS_VID2_DMA_BUFSIZE   (0x000002BCU)

◆ CSL_DSS_VID2_CROP

#define CSL_DSS_VID2_CROP   (0x000002C0U)

◆ CSL_DSS_VID2_SECURE

#define CSL_DSS_VID2_SECURE   (0x000002C4U)

◆ CSL_DSS_VID2_PIPE_GO

#define CSL_DSS_VID2_PIPE_GO   (0x000002C8U)

◆ CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_MASK

#define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_SHIFT

#define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_MAX

#define CSL_DSS_VID2_ACCUH_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUH_0_RESERVED_MASK

#define CSL_DSS_VID2_ACCUH_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_ACCUH_0_RESERVED_SHIFT

#define CSL_DSS_VID2_ACCUH_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ACCUH_0_RESERVED_MAX

#define CSL_DSS_VID2_ACCUH_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_MASK

#define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_SHIFT

#define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_MAX

#define CSL_DSS_VID2_ACCUH_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUH_1_RESERVED_MASK

#define CSL_DSS_VID2_ACCUH_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_ACCUH_1_RESERVED_SHIFT

#define CSL_DSS_VID2_ACCUH_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ACCUH_1_RESERVED_MAX

#define CSL_DSS_VID2_ACCUH_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_MASK

#define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_SHIFT

#define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_MAX

#define CSL_DSS_VID2_ACCUH2_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUH2_0_RESERVED_MASK

#define CSL_DSS_VID2_ACCUH2_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_ACCUH2_0_RESERVED_SHIFT

#define CSL_DSS_VID2_ACCUH2_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ACCUH2_0_RESERVED_MAX

#define CSL_DSS_VID2_ACCUH2_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_MASK

#define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_SHIFT

#define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_MAX

#define CSL_DSS_VID2_ACCUH2_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUH2_1_RESERVED_MASK

#define CSL_DSS_VID2_ACCUH2_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_ACCUH2_1_RESERVED_SHIFT

#define CSL_DSS_VID2_ACCUH2_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ACCUH2_1_RESERVED_MAX

#define CSL_DSS_VID2_ACCUH2_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_ACCUV_0_VERTICALACCU_MASK

#define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUV_0_VERTICALACCU_SHIFT

#define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ACCUV_0_VERTICALACCU_MAX

#define CSL_DSS_VID2_ACCUV_0_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUV_0_RESERVED_MASK

#define CSL_DSS_VID2_ACCUV_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_ACCUV_0_RESERVED_SHIFT

#define CSL_DSS_VID2_ACCUV_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ACCUV_0_RESERVED_MAX

#define CSL_DSS_VID2_ACCUV_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_ACCUV_1_VERTICALACCU_MASK

#define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUV_1_VERTICALACCU_SHIFT

#define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ACCUV_1_VERTICALACCU_MAX

#define CSL_DSS_VID2_ACCUV_1_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUV_1_RESERVED_MASK

#define CSL_DSS_VID2_ACCUV_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_ACCUV_1_RESERVED_SHIFT

#define CSL_DSS_VID2_ACCUV_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ACCUV_1_RESERVED_MAX

#define CSL_DSS_VID2_ACCUV_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_MASK

#define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_SHIFT

#define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_MAX

#define CSL_DSS_VID2_ACCUV2_0_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUV2_0_RESERVED_MASK

#define CSL_DSS_VID2_ACCUV2_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_ACCUV2_0_RESERVED_SHIFT

#define CSL_DSS_VID2_ACCUV2_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ACCUV2_0_RESERVED_MAX

#define CSL_DSS_VID2_ACCUV2_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_MASK

#define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_SHIFT

#define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_MAX

#define CSL_DSS_VID2_ACCUV2_1_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_ACCUV2_1_RESERVED_MASK

#define CSL_DSS_VID2_ACCUV2_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_ACCUV2_1_RESERVED_SHIFT

#define CSL_DSS_VID2_ACCUV2_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ACCUV2_1_RESERVED_MAX

#define CSL_DSS_VID2_ACCUV2_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_ENABLE_VAL_VIDEOENB

#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_VAL_VIDEOENB   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_ENABLE_VAL_VIDEODIS

#define CSL_DSS_VID2_ATTRIBUTES_ENABLE_VAL_VIDEODIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB16_4444

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR16_4444

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA16_4444

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB16_565

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR16_565

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB16_1555

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR16_1555

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB32_8888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR32_8888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA32_8888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGRA32_8888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB24P_888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR24P_888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR24P_888   (0xCU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB32_2101010   (0xEU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ABGR32_2101010   (0xFU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP1

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP1   (0x12U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP2

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP2   (0x13U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP4

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP4   (0x14U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP8

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BITMAP8   (0x15U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB565A8

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR565A8

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB16_4444

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR16_4444

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX16_4444

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB16_1555

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR16_1555

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB32_8888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR32_8888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX32_8888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGRX32_8888

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB32_2101010   (0x2EU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XBGR32_2101010   (0x2FU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_NV12

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV420_NV12

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)

◆ CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY

#define CSL_DSS_VID2_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)

◆ CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_MASK

#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_MASK   (0x00000180U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_SHIFT   (0x00000007U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_MAX

#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_MAX   (0x00000003U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC

#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE

#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE

#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE   (0x2U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE

#define CSL_DSS_VID2_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE   (0x3U)

◆ CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_MASK

#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000200U)

◆ CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x00000009U)

◆ CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_MAX

#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_VID2_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_MASK

#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_MASK   (0x00000400U)

◆ CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_MAX

#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN

#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEEN   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS

#define CSL_DSS_VID2_ATTRIBUTES_NIBBLEMODE_VAL_NIBBLEMODEDIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_MASK

#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_MASK   (0x00000800U)

◆ CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_MAX

#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_VID2_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_FLIP_MASK

#define CSL_DSS_VID2_ATTRIBUTES_FLIP_MASK   (0x00001000U)

◆ CSL_DSS_VID2_ATTRIBUTES_FLIP_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_FLIP_SHIFT   (0x0000000CU)

◆ CSL_DSS_VID2_ATTRIBUTES_FLIP_MAX

#define CSL_DSS_VID2_ATTRIBUTES_FLIP_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_FLIP_VAL_FLIP

#define CSL_DSS_VID2_ATTRIBUTES_FLIP_VAL_FLIP   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_FLIP_VAL_NOFLIP

#define CSL_DSS_VID2_ATTRIBUTES_FLIP_VAL_NOFLIP   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_CROP_MASK

#define CSL_DSS_VID2_ATTRIBUTES_CROP_MASK   (0x00002000U)

◆ CSL_DSS_VID2_ATTRIBUTES_CROP_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_CROP_SHIFT   (0x0000000DU)

◆ CSL_DSS_VID2_ATTRIBUTES_CROP_MAX

#define CSL_DSS_VID2_ATTRIBUTES_CROP_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_CROP_VAL_CROPEN

#define CSL_DSS_VID2_ATTRIBUTES_CROP_VAL_CROPEN   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_CROP_VAL_CROPDIS

#define CSL_DSS_VID2_ATTRIBUTES_CROP_VAL_CROPDIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED9_MASK

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_MASK   (0x0001C000U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED9_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_SHIFT   (0x0000000EU)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED9_MAX

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED9_MAX   (0x00000007U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_MASK

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_MASK   (0x00020000U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_SHIFT   (0x00000011U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_MAX

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTOEN   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESHAUTO_VAL_SELFREFRESHAUTODIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED7_MASK

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_MASK   (0x00040000U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED7_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_SHIFT   (0x00000012U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED7_MAX

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED7_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_MASK

#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_MASK   (0x00080000U)

◆ CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_SHIFT   (0x00000013U)

◆ CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_MAX

#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES

#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_VAL_HIGHTHRES   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL

#define CSL_DSS_VID2_ATTRIBUTES_BUFPRELOAD_VAL_DEFVAL   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED2_MASK

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_MASK   (0x00100000U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED2_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED2_MAX

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_MASK

#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_MASK   (0x00200000U)

◆ CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_SHIFT   (0x00000015U)

◆ CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_MAX

#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5

#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3

#define CSL_DSS_VID2_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED6_MASK

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_MASK   (0x00400000U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED6_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_SHIFT   (0x00000016U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED6_MAX

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED6_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_MASK

#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)

◆ CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)

◆ CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_MAX

#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO

#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO

#define CSL_DSS_VID2_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_MASK

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_MASK   (0x01000000U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_MAX

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHENB   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS

#define CSL_DSS_VID2_ATTRIBUTES_SELFREFRESH_VAL_SELFREFRESHDIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED5_MASK

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_MASK   (0x0E000000U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED5_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_SHIFT   (0x00000019U)

◆ CSL_DSS_VID2_ATTRIBUTES_RESERVED5_MAX

#define CSL_DSS_VID2_ATTRIBUTES_RESERVED5_MAX   (0x00000007U)

◆ CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_MASK

#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_MASK   (0x10000000U)

◆ CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_SHIFT   (0x0000001CU)

◆ CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_MAX

#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA

#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_PREMULTIPLIEDALPHA   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA

#define CSL_DSS_VID2_ATTRIBUTES_PREMULTIPLYALPHA_VAL_NONPREMULTIPLIEDALPHA   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_MASK

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_MASK   (0x20000000U)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_SHIFT   (0x0000001DU)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_MAX

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_PRESCALER   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSIONPOS_VAL_POSTSCALER   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_MASK

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_MASK   (0x40000000U)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_MAX

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMAEN   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS

#define CSL_DSS_VID2_ATTRIBUTES_GAMMAINVERSION_VAL_INVGAMMADIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_MASK

#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_MASK   (0x80000000U)

◆ CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_MAX

#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN

#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYEN   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS

#define CSL_DSS_VID2_ATTRIBUTES_LUMAKEYENABLE_VAL_LUMAKEYDIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB

#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_VAL_VC1ENB   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS

#define CSL_DSS_VID2_ATTRIBUTES2_VC1ENABLE_VAL_VC1DIS   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_MASK   (0x0000000EU)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_SHIFT   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_Y_MAX   (0x00000007U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_MASK   (0x00000070U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_SHIFT   (0x00000004U)

◆ CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_VC1_RANGE_CBCR_MAX   (0x00000007U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_8B

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_10B

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_12B

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_VAL_PACKED

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_VAL_MSB

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_VAL_LSB

#define CSL_DSS_VID2_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_MASK   (0x0000F800U)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED1_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_MASK   (0x01F00000U)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED2_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_MASK   (0x02000000U)

◆ CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_SHIFT   (0x00000019U)

◆ CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_MAX   (0x00000001U)

◆ CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY

#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_VAL_PRIMARY   (0x0U)

◆ CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY

#define CSL_DSS_VID2_ATTRIBUTES2_MPORTSEL_VAL_SECONDARY   (0x1U)

◆ CSL_DSS_VID2_ATTRIBUTES2_TAGS_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)

◆ CSL_DSS_VID2_ATTRIBUTES2_TAGS_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)

◆ CSL_DSS_VID2_ATTRIBUTES2_TAGS_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_MASK

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_MASK   (0x80000000U)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_SHIFT

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_MAX

#define CSL_DSS_VID2_ATTRIBUTES2_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VID2_BA_0_BA_MASK

#define CSL_DSS_VID2_BA_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_BA_0_BA_SHIFT

#define CSL_DSS_VID2_BA_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BA_0_BA_MAX

#define CSL_DSS_VID2_BA_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_BA_1_BA_MASK

#define CSL_DSS_VID2_BA_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_BA_1_BA_SHIFT

#define CSL_DSS_VID2_BA_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BA_1_BA_MAX

#define CSL_DSS_VID2_BA_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_BA_UV_0_BA_MASK

#define CSL_DSS_VID2_BA_UV_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_BA_UV_0_BA_SHIFT

#define CSL_DSS_VID2_BA_UV_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BA_UV_0_BA_MAX

#define CSL_DSS_VID2_BA_UV_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_BA_UV_1_BA_MASK

#define CSL_DSS_VID2_BA_UV_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_BA_UV_1_BA_SHIFT

#define CSL_DSS_VID2_BA_UV_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BA_UV_1_BA_MAX

#define CSL_DSS_VID2_BA_UV_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_MASK

#define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_SHIFT

#define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_MAX

#define CSL_DSS_VID2_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_MASK

#define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_SHIFT

#define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_MAX

#define CSL_DSS_VID2_BUF_SIZE_STATUS_RESERVED_61_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK

#define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT

#define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX

#define CSL_DSS_VID2_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK

#define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT

#define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX

#define CSL_DSS_VID2_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_CSC_COEF0_C00_MASK

#define CSL_DSS_VID2_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF0_C00_SHIFT

#define CSL_DSS_VID2_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CSC_COEF0_C00_MAX

#define CSL_DSS_VID2_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_VID2_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID2_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_VID2_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CSC_COEF0_C01_MASK

#define CSL_DSS_VID2_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_VID2_CSC_COEF0_C01_SHIFT

#define CSL_DSS_VID2_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_CSC_COEF0_C01_MAX

#define CSL_DSS_VID2_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_VID2_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_VID2_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_VID2_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CSC_COEF1_C02_MASK

#define CSL_DSS_VID2_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF1_C02_SHIFT

#define CSL_DSS_VID2_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CSC_COEF1_C02_MAX

#define CSL_DSS_VID2_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_VID2_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID2_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_VID2_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CSC_COEF1_C10_MASK

#define CSL_DSS_VID2_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_VID2_CSC_COEF1_C10_SHIFT

#define CSL_DSS_VID2_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_CSC_COEF1_C10_MAX

#define CSL_DSS_VID2_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_VID2_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_VID2_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_VID2_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CSC_COEF2_C11_MASK

#define CSL_DSS_VID2_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF2_C11_SHIFT

#define CSL_DSS_VID2_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CSC_COEF2_C11_MAX

#define CSL_DSS_VID2_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_VID2_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID2_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_VID2_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CSC_COEF2_C12_MASK

#define CSL_DSS_VID2_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_VID2_CSC_COEF2_C12_SHIFT

#define CSL_DSS_VID2_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_CSC_COEF2_C12_MAX

#define CSL_DSS_VID2_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_VID2_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_VID2_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_VID2_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CSC_COEF3_C20_MASK

#define CSL_DSS_VID2_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF3_C20_SHIFT

#define CSL_DSS_VID2_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CSC_COEF3_C20_MAX

#define CSL_DSS_VID2_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_VID2_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID2_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_VID2_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CSC_COEF3_C21_MASK

#define CSL_DSS_VID2_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_VID2_CSC_COEF3_C21_SHIFT

#define CSL_DSS_VID2_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_CSC_COEF3_C21_MAX

#define CSL_DSS_VID2_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_VID2_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_VID2_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_VID2_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CSC_COEF4_C22_MASK

#define CSL_DSS_VID2_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF4_C22_SHIFT

#define CSL_DSS_VID2_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CSC_COEF4_C22_MAX

#define CSL_DSS_VID2_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_VID2_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_VID2_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID2_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_VID2_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_VID2_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_VID2_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_VID2_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_VID2_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VID2_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_VID2_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VID2_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_VID2_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_VID2_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_VID2_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VID2_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_VID2_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_VID2_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_VID2_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_VID2_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VID2_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_VID2_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VID2_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_VID2_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_VID2_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_VID2_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VID2_FIRH_FIRHINC_MASK

#define CSL_DSS_VID2_FIRH_FIRHINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_FIRH_FIRHINC_SHIFT

#define CSL_DSS_VID2_FIRH_FIRHINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIRH_FIRHINC_MAX

#define CSL_DSS_VID2_FIRH_FIRHINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_FIRH_RESERVED_MASK

#define CSL_DSS_VID2_FIRH_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_FIRH_RESERVED_SHIFT

#define CSL_DSS_VID2_FIRH_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_FIRH_RESERVED_MAX

#define CSL_DSS_VID2_FIRH_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_FIRH2_FIRHINC_MASK

#define CSL_DSS_VID2_FIRH2_FIRHINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_FIRH2_FIRHINC_SHIFT

#define CSL_DSS_VID2_FIRH2_FIRHINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIRH2_FIRHINC_MAX

#define CSL_DSS_VID2_FIRH2_FIRHINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_FIRH2_RESERVED_MASK

#define CSL_DSS_VID2_FIRH2_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_FIRH2_RESERVED_SHIFT

#define CSL_DSS_VID2_FIRH2_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_FIRH2_RESERVED_MAX

#define CSL_DSS_VID2_FIRH2_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_FIRV_FIRVINC_MASK

#define CSL_DSS_VID2_FIRV_FIRVINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_FIRV_FIRVINC_SHIFT

#define CSL_DSS_VID2_FIRV_FIRVINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIRV_FIRVINC_MAX

#define CSL_DSS_VID2_FIRV_FIRVINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_FIRV_RESERVED_MASK

#define CSL_DSS_VID2_FIRV_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_FIRV_RESERVED_SHIFT

#define CSL_DSS_VID2_FIRV_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_FIRV_RESERVED_MAX

#define CSL_DSS_VID2_FIRV_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_FIRV2_FIRVINC_MASK

#define CSL_DSS_VID2_FIRV2_FIRVINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_VID2_FIRV2_FIRVINC_SHIFT

#define CSL_DSS_VID2_FIRV2_FIRVINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIRV2_FIRVINC_MAX

#define CSL_DSS_VID2_FIRV2_FIRVINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_FIRV2_RESERVED_MASK

#define CSL_DSS_VID2_FIRV2_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_VID2_FIRV2_RESERVED_SHIFT

#define CSL_DSS_VID2_FIRV2_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_FIRV2_RESERVED_MAX

#define CSL_DSS_VID2_FIRV2_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_MASK

#define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_MAX

#define CSL_DSS_VID2_FIR_COEF_H0_FIRHC0_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_MASK

#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_MASK   (0x3FFFFC00U)

◆ CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_MAX

#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED1_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID2_FIR_COEF_H0_RESERVED_MASK

#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID2_FIR_COEF_H0_RESERVED_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_FIR_COEF_H0_RESERVED_MAX

#define CSL_DSS_VID2_FIR_COEF_H0_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_MASK

#define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_MAX

#define CSL_DSS_VID2_FIR_COEF_H0_C_FIRHC0_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_MASK

#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_MASK   (0x3FFFFC00U)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_MAX

#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED1_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_MASK

#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_MAX

#define CSL_DSS_VID2_FIR_COEF_H0_C_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_MASK

#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_MAX

#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED1_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_MASK

#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_MAX

#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC1_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_MASK

#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_MAX

#define CSL_DSS_VID2_FIR_COEF_H12_FIRHC2_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H12_RESERVED_MASK

#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID2_FIR_COEF_H12_RESERVED_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_FIR_COEF_H12_RESERVED_MAX

#define CSL_DSS_VID2_FIR_COEF_H12_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_MASK

#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_MAX

#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED1_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_MASK

#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_MAX

#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC1_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_MASK

#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_MAX

#define CSL_DSS_VID2_FIR_COEF_H12_C_FIRHC2_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_MASK

#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_SHIFT

#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_MAX

#define CSL_DSS_VID2_FIR_COEF_H12_C_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_MASK

#define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_MAX

#define CSL_DSS_VID2_FIR_COEF_V0_FIRVC0_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_MASK

#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_MASK   (0x3FFFFC00U)

◆ CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_MAX

#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED1_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID2_FIR_COEF_V0_RESERVED_MASK

#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID2_FIR_COEF_V0_RESERVED_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_FIR_COEF_V0_RESERVED_MAX

#define CSL_DSS_VID2_FIR_COEF_V0_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_MASK

#define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_MAX

#define CSL_DSS_VID2_FIR_COEF_V0_C_FIRVC0_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_MASK

#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_MASK   (0x3FFFFC00U)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_MAX

#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED1_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_MASK

#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_MAX

#define CSL_DSS_VID2_FIR_COEF_V0_C_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_MASK

#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_MAX

#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED1_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_MASK

#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_MAX

#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC1_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_MASK

#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_MAX

#define CSL_DSS_VID2_FIR_COEF_V12_FIRVC2_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V12_RESERVED_MASK

#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID2_FIR_COEF_V12_RESERVED_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_FIR_COEF_V12_RESERVED_MAX

#define CSL_DSS_VID2_FIR_COEF_V12_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_MASK

#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_MAX

#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED1_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_MASK

#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_MAX

#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC1_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_MASK

#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_MAX

#define CSL_DSS_VID2_FIR_COEF_V12_C_FIRVC2_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_MASK

#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_MASK   (0xC0000000U)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_SHIFT

#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_SHIFT   (0x0000001EU)

◆ CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_MAX

#define CSL_DSS_VID2_FIR_COEF_V12_C_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_MASK

#define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_MASK   (0x000000FFU)

◆ CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_SHIFT

#define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_MAX

#define CSL_DSS_VID2_GLOBAL_ALPHA_GLOBALALPHA_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_MASK

#define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_MASK   (0xFFFFFF00U)

◆ CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_SHIFT

#define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_SHIFT   (0x00000008U)

◆ CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_MAX

#define CSL_DSS_VID2_GLOBAL_ALPHA_RESERVED_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_MASK

#define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_SHIFT

#define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_MAX

#define CSL_DSS_VID2_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_MASK

#define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_SHIFT

#define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_MAX

#define CSL_DSS_VID2_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_MASK

#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_SHIFT

#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_MAX

#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_MASK

#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_SHIFT

#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_MAX

#define CSL_DSS_VID2_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VID2_PIXEL_INC_PIXELINC_MASK

#define CSL_DSS_VID2_PIXEL_INC_PIXELINC_MASK   (0x000000FFU)

◆ CSL_DSS_VID2_PIXEL_INC_PIXELINC_SHIFT

#define CSL_DSS_VID2_PIXEL_INC_PIXELINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_PIXEL_INC_PIXELINC_MAX

#define CSL_DSS_VID2_PIXEL_INC_PIXELINC_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_PIXEL_INC_RESERVED_68_MASK

#define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_MASK   (0xFFFFFF00U)

◆ CSL_DSS_VID2_PIXEL_INC_RESERVED_68_SHIFT

#define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_SHIFT   (0x00000008U)

◆ CSL_DSS_VID2_PIXEL_INC_RESERVED_68_MAX

#define CSL_DSS_VID2_PIXEL_INC_RESERVED_68_MAX   (0x00FFFFFFU)

◆ CSL_DSS_VID2_PRELOAD_PRELOAD_MASK

#define CSL_DSS_VID2_PRELOAD_PRELOAD_MASK   (0x00000FFFU)

◆ CSL_DSS_VID2_PRELOAD_PRELOAD_SHIFT

#define CSL_DSS_VID2_PRELOAD_PRELOAD_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_PRELOAD_PRELOAD_MAX

#define CSL_DSS_VID2_PRELOAD_PRELOAD_MAX   (0x00000FFFU)

◆ CSL_DSS_VID2_PRELOAD_RESERVED_212_MASK

#define CSL_DSS_VID2_PRELOAD_RESERVED_212_MASK   (0xFFFFF000U)

◆ CSL_DSS_VID2_PRELOAD_RESERVED_212_SHIFT

#define CSL_DSS_VID2_PRELOAD_RESERVED_212_SHIFT   (0x0000000CU)

◆ CSL_DSS_VID2_PRELOAD_RESERVED_212_MAX

#define CSL_DSS_VID2_PRELOAD_RESERVED_212_MAX   (0x000FFFFFU)

◆ CSL_DSS_VID2_ROW_INC_ROWINC_MASK

#define CSL_DSS_VID2_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_ROW_INC_ROWINC_SHIFT

#define CSL_DSS_VID2_ROW_INC_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ROW_INC_ROWINC_MAX

#define CSL_DSS_VID2_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_SIZE_SIZEX_MASK

#define CSL_DSS_VID2_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VID2_SIZE_SIZEX_SHIFT

#define CSL_DSS_VID2_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_SIZE_SIZEX_MAX

#define CSL_DSS_VID2_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VID2_SIZE_SIZEY_MASK

#define CSL_DSS_VID2_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VID2_SIZE_SIZEY_SHIFT

#define CSL_DSS_VID2_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_SIZE_SIZEY_MAX

#define CSL_DSS_VID2_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VID2_BA_EXT_0_BA_EXT_MASK

#define CSL_DSS_VID2_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_EXT_0_BA_EXT_SHIFT

#define CSL_DSS_VID2_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BA_EXT_0_BA_EXT_MAX

#define CSL_DSS_VID2_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_EXT_0_RESERVED_MASK

#define CSL_DSS_VID2_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID2_BA_EXT_0_RESERVED_SHIFT

#define CSL_DSS_VID2_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_BA_EXT_0_RESERVED_MAX

#define CSL_DSS_VID2_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_EXT_1_BA_EXT_MASK

#define CSL_DSS_VID2_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_EXT_1_BA_EXT_SHIFT

#define CSL_DSS_VID2_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BA_EXT_1_BA_EXT_MAX

#define CSL_DSS_VID2_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_EXT_1_RESERVED_MASK

#define CSL_DSS_VID2_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID2_BA_EXT_1_RESERVED_SHIFT

#define CSL_DSS_VID2_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_BA_EXT_1_RESERVED_MAX

#define CSL_DSS_VID2_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_MASK

#define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_SHIFT

#define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_MAX

#define CSL_DSS_VID2_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_MASK

#define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_SHIFT

#define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_MAX

#define CSL_DSS_VID2_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_MASK

#define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_SHIFT

#define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_MAX

#define CSL_DSS_VID2_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_MASK

#define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_SHIFT

#define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_MAX

#define CSL_DSS_VID2_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_VID2_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_VID2_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_VID2_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_VID2_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VID2_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_VID2_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VID2_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_VID2_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_VID2_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_VID2_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VID2_ROW_INC_UV_ROWINC_MASK

#define CSL_DSS_VID2_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_ROW_INC_UV_ROWINC_SHIFT

#define CSL_DSS_VID2_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_ROW_INC_UV_ROWINC_MAX

#define CSL_DSS_VID2_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_TILE_TILEINDEX_MASK

#define CSL_DSS_VID2_TILE_TILEINDEX_MASK   (0x007FFFFFU)

◆ CSL_DSS_VID2_TILE_TILEINDEX_SHIFT

#define CSL_DSS_VID2_TILE_TILEINDEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_TILE_TILEINDEX_MAX

#define CSL_DSS_VID2_TILE_TILEINDEX_MAX   (0x007FFFFFU)

◆ CSL_DSS_VID2_TILE2_NUM_TILES_MASK

#define CSL_DSS_VID2_TILE2_NUM_TILES_MASK   (0x007FFFFFU)

◆ CSL_DSS_VID2_TILE2_NUM_TILES_SHIFT

#define CSL_DSS_VID2_TILE2_NUM_TILES_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_TILE2_NUM_TILES_MAX

#define CSL_DSS_VID2_TILE2_NUM_TILES_MAX   (0x007FFFFFU)

◆ CSL_DSS_VID2_TILE2_RESERVED_MASK

#define CSL_DSS_VID2_TILE2_RESERVED_MASK   (0xFF800000U)

◆ CSL_DSS_VID2_TILE2_RESERVED_SHIFT

#define CSL_DSS_VID2_TILE2_RESERVED_SHIFT   (0x00000017U)

◆ CSL_DSS_VID2_TILE2_RESERVED_MAX

#define CSL_DSS_VID2_TILE2_RESERVED_MAX   (0x000001FFU)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_MASK   (0x000000FEU)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_MAX   (0x0000007FU)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_VAL_U8U8U8U8   (0xCU)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_FORMAT_VAL_A2R10B10G10   (0xEU)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_MASK

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_MASK   (0x00000300U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_SHIFT

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_SHIFT   (0x00000008U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_MAX

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_MAX   (0x00000003U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE16BY4   (0x2U)

◆ CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2

#define CSL_DSS_VID2_FBDC_ATTRIBUTES_TILETYPE_VAL_TILE32BY2   (0x3U)

◆ CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK

#define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT

#define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX

#define CSL_DSS_VID2_FBDC_CLEAR_COLOR_CLEARCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_CLUT_0_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_0_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_0_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_0_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_0_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_0_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_0_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_0_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_0_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_0_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_0_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_0_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_0_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_0_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_0_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_0_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_0_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_0_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_0_INDEX_MASK

#define CSL_DSS_VID2_CLUT_0_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_0_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_0_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_0_INDEX_MAX

#define CSL_DSS_VID2_CLUT_0_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_1_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_1_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_1_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_1_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_1_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_1_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_1_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_1_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_1_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_1_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_1_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_1_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_1_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_1_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_1_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_1_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_1_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_1_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_1_INDEX_MASK

#define CSL_DSS_VID2_CLUT_1_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_1_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_1_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_1_INDEX_MAX

#define CSL_DSS_VID2_CLUT_1_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_2_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_2_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_2_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_2_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_2_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_2_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_2_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_2_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_2_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_2_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_2_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_2_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_2_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_2_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_2_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_2_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_2_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_2_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_2_INDEX_MASK

#define CSL_DSS_VID2_CLUT_2_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_2_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_2_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_2_INDEX_MAX

#define CSL_DSS_VID2_CLUT_2_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_3_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_3_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_3_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_3_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_3_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_3_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_3_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_3_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_3_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_3_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_3_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_3_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_3_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_3_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_3_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_3_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_3_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_3_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_3_INDEX_MASK

#define CSL_DSS_VID2_CLUT_3_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_3_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_3_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_3_INDEX_MAX

#define CSL_DSS_VID2_CLUT_3_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_4_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_4_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_4_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_4_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_4_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_4_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_4_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_4_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_4_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_4_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_4_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_4_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_4_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_4_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_4_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_4_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_4_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_4_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_4_INDEX_MASK

#define CSL_DSS_VID2_CLUT_4_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_4_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_4_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_4_INDEX_MAX

#define CSL_DSS_VID2_CLUT_4_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_5_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_5_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_5_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_5_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_5_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_5_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_5_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_5_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_5_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_5_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_5_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_5_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_5_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_5_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_5_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_5_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_5_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_5_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_5_INDEX_MASK

#define CSL_DSS_VID2_CLUT_5_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_5_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_5_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_5_INDEX_MAX

#define CSL_DSS_VID2_CLUT_5_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_6_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_6_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_6_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_6_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_6_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_6_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_6_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_6_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_6_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_6_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_6_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_6_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_6_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_6_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_6_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_6_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_6_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_6_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_6_INDEX_MASK

#define CSL_DSS_VID2_CLUT_6_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_6_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_6_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_6_INDEX_MAX

#define CSL_DSS_VID2_CLUT_6_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_7_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_7_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_7_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_7_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_7_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_7_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_7_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_7_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_7_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_7_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_7_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_7_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_7_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_7_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_7_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_7_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_7_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_7_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_7_INDEX_MASK

#define CSL_DSS_VID2_CLUT_7_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_7_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_7_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_7_INDEX_MAX

#define CSL_DSS_VID2_CLUT_7_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_8_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_8_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_8_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_8_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_8_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_8_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_8_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_8_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_8_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_8_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_8_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_8_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_8_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_8_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_8_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_8_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_8_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_8_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_8_INDEX_MASK

#define CSL_DSS_VID2_CLUT_8_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_8_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_8_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_8_INDEX_MAX

#define CSL_DSS_VID2_CLUT_8_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_9_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_9_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_9_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_9_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_9_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_9_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_9_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_9_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_9_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_9_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_9_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_9_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_9_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_9_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_9_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_9_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_9_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_9_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_9_INDEX_MASK

#define CSL_DSS_VID2_CLUT_9_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_9_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_9_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_9_INDEX_MAX

#define CSL_DSS_VID2_CLUT_9_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_10_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_10_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_10_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_10_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_10_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_10_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_10_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_10_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_10_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_10_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_10_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_10_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_10_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_10_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_10_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_10_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_10_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_10_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_10_INDEX_MASK

#define CSL_DSS_VID2_CLUT_10_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_10_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_10_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_10_INDEX_MAX

#define CSL_DSS_VID2_CLUT_10_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_11_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_11_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_11_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_11_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_11_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_11_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_11_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_11_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_11_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_11_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_11_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_11_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_11_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_11_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_11_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_11_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_11_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_11_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_11_INDEX_MASK

#define CSL_DSS_VID2_CLUT_11_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_11_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_11_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_11_INDEX_MAX

#define CSL_DSS_VID2_CLUT_11_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_12_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_12_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_12_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_12_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_12_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_12_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_12_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_12_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_12_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_12_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_12_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_12_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_12_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_12_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_12_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_12_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_12_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_12_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_12_INDEX_MASK

#define CSL_DSS_VID2_CLUT_12_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_12_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_12_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_12_INDEX_MAX

#define CSL_DSS_VID2_CLUT_12_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_13_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_13_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_13_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_13_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_13_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_13_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_13_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_13_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_13_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_13_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_13_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_13_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_13_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_13_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_13_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_13_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_13_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_13_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_13_INDEX_MASK

#define CSL_DSS_VID2_CLUT_13_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_13_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_13_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_13_INDEX_MAX

#define CSL_DSS_VID2_CLUT_13_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_14_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_14_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_14_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_14_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_14_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_14_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_14_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_14_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_14_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_14_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_14_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_14_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_14_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_14_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_14_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_14_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_14_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_14_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_14_INDEX_MASK

#define CSL_DSS_VID2_CLUT_14_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_14_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_14_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_14_INDEX_MAX

#define CSL_DSS_VID2_CLUT_14_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_CLUT_15_VALUE_B_MASK

#define CSL_DSS_VID2_CLUT_15_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_15_VALUE_B_SHIFT

#define CSL_DSS_VID2_CLUT_15_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CLUT_15_VALUE_B_MAX

#define CSL_DSS_VID2_CLUT_15_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_15_VALUE_G_MASK

#define CSL_DSS_VID2_CLUT_15_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VID2_CLUT_15_VALUE_G_SHIFT

#define CSL_DSS_VID2_CLUT_15_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VID2_CLUT_15_VALUE_G_MAX

#define CSL_DSS_VID2_CLUT_15_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_15_VALUE_R_MASK

#define CSL_DSS_VID2_CLUT_15_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VID2_CLUT_15_VALUE_R_SHIFT

#define CSL_DSS_VID2_CLUT_15_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VID2_CLUT_15_VALUE_R_MAX

#define CSL_DSS_VID2_CLUT_15_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VID2_CLUT_15_INDEX_MASK

#define CSL_DSS_VID2_CLUT_15_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VID2_CLUT_15_INDEX_SHIFT

#define CSL_DSS_VID2_CLUT_15_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VID2_CLUT_15_INDEX_MAX

#define CSL_DSS_VID2_CLUT_15_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_MASK

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_MAX

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_MASK

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_SHIFT

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)

◆ CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_MAX

#define CSL_DSS_VID2_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)

◆ CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VID2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_SAFETY_POSITION_POSX_MASK

#define CSL_DSS_VID2_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_VID2_SAFETY_POSITION_POSX_SHIFT

#define CSL_DSS_VID2_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_SAFETY_POSITION_POSX_MAX

#define CSL_DSS_VID2_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_VID2_SAFETY_POSITION_POSY_MASK

#define CSL_DSS_VID2_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VID2_SAFETY_POSITION_POSY_SHIFT

#define CSL_DSS_VID2_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_SAFETY_POSITION_POSY_MAX

#define CSL_DSS_VID2_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VID2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_SAFETY_SIZE_SIZEX_MASK

#define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VID2_SAFETY_SIZE_SIZEX_SHIFT

#define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_SAFETY_SIZE_SIZEX_MAX

#define CSL_DSS_VID2_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VID2_SAFETY_SIZE_SIZEY_MASK

#define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VID2_SAFETY_SIZE_SIZEY_SHIFT

#define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_SAFETY_SIZE_SIZEY_MAX

#define CSL_DSS_VID2_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_MASK

#define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_SHIFT

#define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_MAX

#define CSL_DSS_VID2_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_MASK

#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_MASK   (0x00000FFFU)

◆ CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_SHIFT

#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_MAX

#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMIN_MAX   (0x00000FFFU)

◆ CSL_DSS_VID2_LUMAKEY_RESERVED_MASK

#define CSL_DSS_VID2_LUMAKEY_RESERVED_MASK   (0x0000F000U)

◆ CSL_DSS_VID2_LUMAKEY_RESERVED_SHIFT

#define CSL_DSS_VID2_LUMAKEY_RESERVED_SHIFT   (0x0000000CU)

◆ CSL_DSS_VID2_LUMAKEY_RESERVED_MAX

#define CSL_DSS_VID2_LUMAKEY_RESERVED_MAX   (0x0000000FU)

◆ CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_MASK

#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_MASK   (0x0FFF0000U)

◆ CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_SHIFT

#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_MAX

#define CSL_DSS_VID2_LUMAKEY_LUMAKEYMAX_MAX   (0x00000FFFU)

◆ CSL_DSS_VID2_LUMAKEY_RESERVED1_MASK

#define CSL_DSS_VID2_LUMAKEY_RESERVED1_MASK   (0xF0000000U)

◆ CSL_DSS_VID2_LUMAKEY_RESERVED1_SHIFT

#define CSL_DSS_VID2_LUMAKEY_RESERVED1_SHIFT   (0x0000001CU)

◆ CSL_DSS_VID2_LUMAKEY_RESERVED1_MAX

#define CSL_DSS_VID2_LUMAKEY_RESERVED1_MAX   (0x0000000FU)

◆ CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_MASK

#define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_MASK   (0x0000001FU)

◆ CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_SHIFT

#define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_MAX

#define CSL_DSS_VID2_DMA_BUFSIZE_BUFSIZE_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_MASK

#define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_SHIFT

#define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_MAX

#define CSL_DSS_VID2_DMA_BUFSIZE_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_VID2_CROP_CROPLEFT_MASK

#define CSL_DSS_VID2_CROP_CROPLEFT_MASK   (0x0000001FU)

◆ CSL_DSS_VID2_CROP_CROPLEFT_SHIFT

#define CSL_DSS_VID2_CROP_CROPLEFT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_CROP_CROPLEFT_MAX

#define CSL_DSS_VID2_CROP_CROPLEFT_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CROP_CROPRIGHT_MASK

#define CSL_DSS_VID2_CROP_CROPRIGHT_MASK   (0x00001F00U)

◆ CSL_DSS_VID2_CROP_CROPRIGHT_SHIFT

#define CSL_DSS_VID2_CROP_CROPRIGHT_SHIFT   (0x00000008U)

◆ CSL_DSS_VID2_CROP_CROPRIGHT_MAX

#define CSL_DSS_VID2_CROP_CROPRIGHT_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CROP_CROPTOP_MASK

#define CSL_DSS_VID2_CROP_CROPTOP_MASK   (0x001F0000U)

◆ CSL_DSS_VID2_CROP_CROPTOP_SHIFT

#define CSL_DSS_VID2_CROP_CROPTOP_SHIFT   (0x00000010U)

◆ CSL_DSS_VID2_CROP_CROPTOP_MAX

#define CSL_DSS_VID2_CROP_CROPTOP_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_CROP_CROPBOTTOM_MASK

#define CSL_DSS_VID2_CROP_CROPBOTTOM_MASK   (0x1F000000U)

◆ CSL_DSS_VID2_CROP_CROPBOTTOM_SHIFT

#define CSL_DSS_VID2_CROP_CROPBOTTOM_SHIFT   (0x00000018U)

◆ CSL_DSS_VID2_CROP_CROPBOTTOM_MAX

#define CSL_DSS_VID2_CROP_CROPBOTTOM_MAX   (0x0000001FU)

◆ CSL_DSS_VID2_SECURE_SECURE_MASK

#define CSL_DSS_VID2_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_VID2_SECURE_SECURE_SHIFT

#define CSL_DSS_VID2_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_SECURE_SECURE_MAX

#define CSL_DSS_VID2_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_VID2_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_VID2_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_VID2_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_VID2_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_VID2_SECURE_RESERVED_MASK

#define CSL_DSS_VID2_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VID2_SECURE_RESERVED_SHIFT

#define CSL_DSS_VID2_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VID2_SECURE_RESERVED_MAX

#define CSL_DSS_VID2_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VID2_PIPE_GO_GOBIT_MASK

#define CSL_DSS_VID2_PIPE_GO_GOBIT_MASK   (0x00000001U)

◆ CSL_DSS_VID2_PIPE_GO_GOBIT_SHIFT

#define CSL_DSS_VID2_PIPE_GO_GOBIT_SHIFT   (0x00000000U)

◆ CSL_DSS_VID2_PIPE_GO_GOBIT_MAX

#define CSL_DSS_VID2_PIPE_GO_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_VID2_PIPE_GO_GOBIT_VAL_HFUISR

#define CSL_DSS_VID2_PIPE_GO_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_VID2_PIPE_GO_GOBIT_VAL_UFPSR

#define CSL_DSS_VID2_PIPE_GO_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_VID2_PIPE_GO_RESERVED_MASK

#define CSL_DSS_VID2_PIPE_GO_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VID2_PIPE_GO_RESERVED_SHIFT

#define CSL_DSS_VID2_PIPE_GO_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VID2_PIPE_GO_RESERVED_MAX

#define CSL_DSS_VID2_PIPE_GO_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_OVR1_CONFIG

#define CSL_DSS_OVR1_CONFIG   (0x00000000U)

◆ CSL_DSS_OVR1_VIRTUALVP

#define CSL_DSS_OVR1_VIRTUALVP   (0x00000004U)

◆ CSL_DSS_OVR1_DEFAULT_COLOR

#define CSL_DSS_OVR1_DEFAULT_COLOR   (0x00000008U)

◆ CSL_DSS_OVR1_DEFAULT_COLOR2

#define CSL_DSS_OVR1_DEFAULT_COLOR2   (0x0000000CU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX

#define CSL_DSS_OVR1_TRANS_COLOR_MAX   (0x00000010U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX2

#define CSL_DSS_OVR1_TRANS_COLOR_MAX2   (0x00000014U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN

#define CSL_DSS_OVR1_TRANS_COLOR_MIN   (0x00000018U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN2

#define CSL_DSS_OVR1_TRANS_COLOR_MIN2   (0x0000001CU)

◆ CSL_DSS_OVR1_ATTRIBUTES

#define CSL_DSS_OVR1_ATTRIBUTES (   index)    (0x00000020U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_OVR1_ATTRIBUTES2

#define CSL_DSS_OVR1_ATTRIBUTES2 (   index)    (0x00000034U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_OVR1_SECURE

#define CSL_DSS_OVR1_SECURE   (0x00000048U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED6_MASK

#define CSL_DSS_OVR1_CONFIG_RESERVED6_MASK   (0x00000001U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED6_SHIFT

#define CSL_DSS_OVR1_CONFIG_RESERVED6_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED6_MAX

#define CSL_DSS_OVR1_CONFIG_RESERVED6_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_CONFIG_COLORBAREN_MASK

#define CSL_DSS_OVR1_CONFIG_COLORBAREN_MASK   (0x00000002U)

◆ CSL_DSS_OVR1_CONFIG_COLORBAREN_SHIFT

#define CSL_DSS_OVR1_CONFIG_COLORBAREN_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR1_CONFIG_COLORBAREN_MAX

#define CSL_DSS_OVR1_CONFIG_COLORBAREN_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBARDIS

#define CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBARDIS   (0x0U)

◆ CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBAREN

#define CSL_DSS_OVR1_CONFIG_COLORBAREN_VAL_COLORBAREN   (0x1U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED_MASK

#define CSL_DSS_OVR1_CONFIG_RESERVED_MASK   (0x000003FCU)

◆ CSL_DSS_OVR1_CONFIG_RESERVED_SHIFT

#define CSL_DSS_OVR1_CONFIG_RESERVED_SHIFT   (0x00000002U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED_MAX

#define CSL_DSS_OVR1_CONFIG_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MASK

#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MASK   (0x00000400U)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_SHIFT

#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_SHIFT   (0x0000000AU)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MAX

#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_DISTCK

#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_DISTCK   (0x0U)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_ENBTCK

#define CSL_DSS_OVR1_CONFIG_TCKLCDENABLE_VAL_ENBTCK   (0x1U)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MASK

#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MASK   (0x00000800U)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_SHIFT

#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_SHIFT   (0x0000000BU)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MAX

#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_GDTK

#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_GDTK   (0x0U)

◆ CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_VSTK

#define CSL_DSS_OVR1_CONFIG_TCKLCDSELECTION_VAL_VSTK   (0x1U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED2_MASK

#define CSL_DSS_OVR1_CONFIG_RESERVED2_MASK   (0x00001000U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED2_SHIFT

#define CSL_DSS_OVR1_CONFIG_RESERVED2_SHIFT   (0x0000000CU)

◆ CSL_DSS_OVR1_CONFIG_RESERVED2_MAX

#define CSL_DSS_OVR1_CONFIG_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED3_MASK

#define CSL_DSS_OVR1_CONFIG_RESERVED3_MASK   (0x00002000U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED3_SHIFT

#define CSL_DSS_OVR1_CONFIG_RESERVED3_SHIFT   (0x0000000DU)

◆ CSL_DSS_OVR1_CONFIG_RESERVED3_MAX

#define CSL_DSS_OVR1_CONFIG_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED1_MASK

#define CSL_DSS_OVR1_CONFIG_RESERVED1_MASK   (0xFFFFC000U)

◆ CSL_DSS_OVR1_CONFIG_RESERVED1_SHIFT

#define CSL_DSS_OVR1_CONFIG_RESERVED1_SHIFT   (0x0000000EU)

◆ CSL_DSS_OVR1_CONFIG_RESERVED1_MAX

#define CSL_DSS_OVR1_CONFIG_RESERVED1_MAX   (0x0003FFFFU)

◆ CSL_DSS_OVR1_VIRTUALVP_PPL_MASK

#define CSL_DSS_OVR1_VIRTUALVP_PPL_MASK   (0x00003FFFU)

◆ CSL_DSS_OVR1_VIRTUALVP_PPL_SHIFT

#define CSL_DSS_OVR1_VIRTUALVP_PPL_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_VIRTUALVP_PPL_MAX

#define CSL_DSS_OVR1_VIRTUALVP_PPL_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR1_VIRTUALVP_LPP_MASK

#define CSL_DSS_OVR1_VIRTUALVP_LPP_MASK   (0x3FFF0000U)

◆ CSL_DSS_OVR1_VIRTUALVP_LPP_SHIFT

#define CSL_DSS_OVR1_VIRTUALVP_LPP_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR1_VIRTUALVP_LPP_MAX

#define CSL_DSS_OVR1_VIRTUALVP_LPP_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR1_VIRTUALVP_ENABLE_MASK

#define CSL_DSS_OVR1_VIRTUALVP_ENABLE_MASK   (0x80000000U)

◆ CSL_DSS_OVR1_VIRTUALVP_ENABLE_SHIFT

#define CSL_DSS_OVR1_VIRTUALVP_ENABLE_SHIFT   (0x0000001FU)

◆ CSL_DSS_OVR1_VIRTUALVP_ENABLE_MAX

#define CSL_DSS_OVR1_VIRTUALVP_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MASK

#define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT

#define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MAX

#define CSL_DSS_OVR1_DEFAULT_COLOR_DEFAULTCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MASK

#define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MASK   (0x0000FFFFU)

◆ CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT

#define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MAX

#define CSL_DSS_OVR1_DEFAULT_COLOR2_DEFAULTCOLOR_MAX   (0x0000FFFFU)

◆ CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MASK

#define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_SHIFT

#define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MAX

#define CSL_DSS_OVR1_DEFAULT_COLOR2_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR1_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK   (0x0000000FU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX   (0x0000000FU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MASK

#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_SHIFT

#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MAX

#define CSL_DSS_OVR1_TRANS_COLOR_MAX2_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR1_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK   (0x0000000FU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX   (0x0000000FU)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MASK

#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_SHIFT

#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MAX

#define CSL_DSS_OVR1_TRANS_COLOR_MIN2_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_OVR1_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_OVR1_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_OVR1_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_MASK

#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_MASK   (0x0000001EU)

◆ CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_SHIFT

#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_MAX

#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_MAX   (0x0000000FU)

◆ CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VID1

#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VID1   (0x0U)

◆ CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIDL1

#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIDL1   (0x1U)

◆ CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VID2

#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VID2   (0x2U)

◆ CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIDL2

#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIDL2   (0x3U)

◆ CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIRTCH

#define CSL_DSS_OVR1_ATTRIBUTES_CHANNELIN_VAL_VIRTCH   (0x4U)

◆ CSL_DSS_OVR1_ATTRIBUTES2_POSX_MASK

#define CSL_DSS_OVR1_ATTRIBUTES2_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_OVR1_ATTRIBUTES2_POSX_SHIFT

#define CSL_DSS_OVR1_ATTRIBUTES2_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_ATTRIBUTES2_POSX_MAX

#define CSL_DSS_OVR1_ATTRIBUTES2_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR1_ATTRIBUTES2_POSY_MASK

#define CSL_DSS_OVR1_ATTRIBUTES2_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_OVR1_ATTRIBUTES2_POSY_SHIFT

#define CSL_DSS_OVR1_ATTRIBUTES2_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR1_ATTRIBUTES2_POSY_MAX

#define CSL_DSS_OVR1_ATTRIBUTES2_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR1_SECURE_SECURE_MASK

#define CSL_DSS_OVR1_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_OVR1_SECURE_SECURE_SHIFT

#define CSL_DSS_OVR1_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR1_SECURE_SECURE_MAX

#define CSL_DSS_OVR1_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_OVR1_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_OVR1_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_OVR1_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_OVR1_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_OVR1_SECURE_RESERVED_MASK

#define CSL_DSS_OVR1_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_OVR1_SECURE_RESERVED_SHIFT

#define CSL_DSS_OVR1_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR1_SECURE_RESERVED_MAX

#define CSL_DSS_OVR1_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VP1_CONFIG

#define CSL_DSS_VP1_CONFIG   (0x00000000U)

◆ CSL_DSS_VP1_CONTROL

#define CSL_DSS_VP1_CONTROL   (0x00000004U)

◆ CSL_DSS_VP1_CSC_COEF0

#define CSL_DSS_VP1_CSC_COEF0   (0x00000008U)

◆ CSL_DSS_VP1_CSC_COEF1

#define CSL_DSS_VP1_CSC_COEF1   (0x0000000CU)

◆ CSL_DSS_VP1_CSC_COEF2

#define CSL_DSS_VP1_CSC_COEF2   (0x00000010U)

◆ CSL_DSS_VP1_DATA_CYCLE_0

#define CSL_DSS_VP1_DATA_CYCLE_0   (0x00000014U)

◆ CSL_DSS_VP1_DATA_CYCLE_1

#define CSL_DSS_VP1_DATA_CYCLE_1   (0x00000018U)

◆ CSL_DSS_VP1_DATA_CYCLE_2

#define CSL_DSS_VP1_DATA_CYCLE_2   (0x0000001CU)

◆ CSL_DSS_VP1_LINE_NUMBER

#define CSL_DSS_VP1_LINE_NUMBER   (0x00000044U)

◆ CSL_DSS_VP1_POL_FREQ

#define CSL_DSS_VP1_POL_FREQ   (0x0000004CU)

◆ CSL_DSS_VP1_SIZE_SCREEN

#define CSL_DSS_VP1_SIZE_SCREEN   (0x00000050U)

◆ CSL_DSS_VP1_TIMING_H

#define CSL_DSS_VP1_TIMING_H   (0x00000054U)

◆ CSL_DSS_VP1_TIMING_V

#define CSL_DSS_VP1_TIMING_V   (0x00000058U)

◆ CSL_DSS_VP1_CSC_COEF3

#define CSL_DSS_VP1_CSC_COEF3   (0x0000005CU)

◆ CSL_DSS_VP1_CSC_COEF4

#define CSL_DSS_VP1_CSC_COEF4   (0x00000060U)

◆ CSL_DSS_VP1_CSC_COEF5

#define CSL_DSS_VP1_CSC_COEF5   (0x00000064U)

◆ CSL_DSS_VP1_CSC_COEF6

#define CSL_DSS_VP1_CSC_COEF6   (0x00000068U)

◆ CSL_DSS_VP1_CSC_COEF7

#define CSL_DSS_VP1_CSC_COEF7   (0x0000006CU)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES (   index)    (0x00000070U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE

#define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE (   index)    (0x00000090U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP1_SAFETY_POSITION

#define CSL_DSS_VP1_SAFETY_POSITION (   index)    (0x000000B0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP1_SAFETY_REF_SIGNATURE

#define CSL_DSS_VP1_SAFETY_REF_SIGNATURE (   index)    (0x000000D0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP1_SAFETY_SIZE

#define CSL_DSS_VP1_SAFETY_SIZE (   index)    (0x000000F0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP1_SAFETY_LFSR_SEED

#define CSL_DSS_VP1_SAFETY_LFSR_SEED   (0x00000110U)

◆ CSL_DSS_VP1_GAMMA_TABLE_0

#define CSL_DSS_VP1_GAMMA_TABLE_0   (0x00000120U)

◆ CSL_DSS_VP1_GAMMA_TABLE_1

#define CSL_DSS_VP1_GAMMA_TABLE_1   (0x00000124U)

◆ CSL_DSS_VP1_GAMMA_TABLE_2

#define CSL_DSS_VP1_GAMMA_TABLE_2   (0x00000128U)

◆ CSL_DSS_VP1_GAMMA_TABLE_3

#define CSL_DSS_VP1_GAMMA_TABLE_3   (0x0000012CU)

◆ CSL_DSS_VP1_GAMMA_TABLE_4

#define CSL_DSS_VP1_GAMMA_TABLE_4   (0x00000130U)

◆ CSL_DSS_VP1_GAMMA_TABLE_5

#define CSL_DSS_VP1_GAMMA_TABLE_5   (0x00000134U)

◆ CSL_DSS_VP1_GAMMA_TABLE_6

#define CSL_DSS_VP1_GAMMA_TABLE_6   (0x00000138U)

◆ CSL_DSS_VP1_GAMMA_TABLE_7

#define CSL_DSS_VP1_GAMMA_TABLE_7   (0x0000013CU)

◆ CSL_DSS_VP1_GAMMA_TABLE_8

#define CSL_DSS_VP1_GAMMA_TABLE_8   (0x00000140U)

◆ CSL_DSS_VP1_GAMMA_TABLE_9

#define CSL_DSS_VP1_GAMMA_TABLE_9   (0x00000144U)

◆ CSL_DSS_VP1_GAMMA_TABLE_10

#define CSL_DSS_VP1_GAMMA_TABLE_10   (0x00000148U)

◆ CSL_DSS_VP1_GAMMA_TABLE_11

#define CSL_DSS_VP1_GAMMA_TABLE_11   (0x0000014CU)

◆ CSL_DSS_VP1_GAMMA_TABLE_12

#define CSL_DSS_VP1_GAMMA_TABLE_12   (0x00000150U)

◆ CSL_DSS_VP1_GAMMA_TABLE_13

#define CSL_DSS_VP1_GAMMA_TABLE_13   (0x00000154U)

◆ CSL_DSS_VP1_GAMMA_TABLE_14

#define CSL_DSS_VP1_GAMMA_TABLE_14   (0x00000158U)

◆ CSL_DSS_VP1_GAMMA_TABLE_15

#define CSL_DSS_VP1_GAMMA_TABLE_15   (0x0000015CU)

◆ CSL_DSS_VP1_DSS_OLDI_CFG

#define CSL_DSS_VP1_DSS_OLDI_CFG   (0x00000160U)

◆ CSL_DSS_VP1_DSS_OLDI_STATUS

#define CSL_DSS_VP1_DSS_OLDI_STATUS   (0x00000164U)

◆ CSL_DSS_VP1_DSS_OLDI_LB

#define CSL_DSS_VP1_DSS_OLDI_LB   (0x00000168U)

◆ CSL_DSS_VP1_SECURE

#define CSL_DSS_VP1_SECURE   (0x00000178U)

◆ CSL_DSS_VP1_CONFIG_PIXELGATED_MASK

#define CSL_DSS_VP1_CONFIG_PIXELGATED_MASK   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_PIXELGATED_SHIFT

#define CSL_DSS_VP1_CONFIG_PIXELGATED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CONFIG_PIXELGATED_MAX

#define CSL_DSS_VP1_CONFIG_PIXELGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGA

#define CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGA   (0x0U)

◆ CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGV

#define CSL_DSS_VP1_CONFIG_PIXELGATED_VAL_PCLKTOGV   (0x1U)

◆ CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MASK

#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MASK   (0x00000002U)

◆ CSL_DSS_VP1_CONFIG_DATAENABLEGATED_SHIFT

#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_SHIFT   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MAX

#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGDIS

#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGDIS   (0x0U)

◆ CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGENB

#define CSL_DSS_VP1_CONFIG_DATAENABLEGATED_VAL_DEGENB   (0x1U)

◆ CSL_DSS_VP1_CONFIG_GAMMAENABLE_MASK

#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_MASK   (0x00000004U)

◆ CSL_DSS_VP1_CONFIG_GAMMAENABLE_SHIFT

#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_SHIFT   (0x00000002U)

◆ CSL_DSS_VP1_CONFIG_GAMMAENABLE_MAX

#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMADIS

#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMADIS   (0x0U)

◆ CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMAENB

#define CSL_DSS_VP1_CONFIG_GAMMAENABLE_VAL_GAMMAENB   (0x1U)

◆ CSL_DSS_VP1_CONFIG_HDMIMODE_MASK

#define CSL_DSS_VP1_CONFIG_HDMIMODE_MASK   (0x00000008U)

◆ CSL_DSS_VP1_CONFIG_HDMIMODE_SHIFT

#define CSL_DSS_VP1_CONFIG_HDMIMODE_SHIFT   (0x00000003U)

◆ CSL_DSS_VP1_CONFIG_HDMIMODE_MAX

#define CSL_DSS_VP1_CONFIG_HDMIMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MASK

#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MASK   (0x00000010U)

◆ CSL_DSS_VP1_CONFIG_PIXELDATAGATED_SHIFT

#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_SHIFT   (0x00000004U)

◆ CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MAX

#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGDIS

#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGDIS   (0x0U)

◆ CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGENB

#define CSL_DSS_VP1_CONFIG_PIXELDATAGATED_VAL_PDGENB   (0x1U)

◆ CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MASK

#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MASK   (0x00000020U)

◆ CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_SHIFT

#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_SHIFT   (0x00000005U)

◆ CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MAX

#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS

#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS   (0x0U)

◆ CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGENB

#define CSL_DSS_VP1_CONFIG_PIXELCLOCKGATED_VAL_PCGENB   (0x1U)

◆ CSL_DSS_VP1_CONFIG_HSYNCGATED_MASK

#define CSL_DSS_VP1_CONFIG_HSYNCGATED_MASK   (0x00000040U)

◆ CSL_DSS_VP1_CONFIG_HSYNCGATED_SHIFT

#define CSL_DSS_VP1_CONFIG_HSYNCGATED_SHIFT   (0x00000006U)

◆ CSL_DSS_VP1_CONFIG_HSYNCGATED_MAX

#define CSL_DSS_VP1_CONFIG_HSYNCGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGDIS

#define CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGDIS   (0x0U)

◆ CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGENB

#define CSL_DSS_VP1_CONFIG_HSYNCGATED_VAL_HGENB   (0x1U)

◆ CSL_DSS_VP1_CONFIG_VSYNCGATED_MASK

#define CSL_DSS_VP1_CONFIG_VSYNCGATED_MASK   (0x00000080U)

◆ CSL_DSS_VP1_CONFIG_VSYNCGATED_SHIFT

#define CSL_DSS_VP1_CONFIG_VSYNCGATED_SHIFT   (0x00000007U)

◆ CSL_DSS_VP1_CONFIG_VSYNCGATED_MAX

#define CSL_DSS_VP1_CONFIG_VSYNCGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGDIS

#define CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGDIS   (0x0U)

◆ CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGENB

#define CSL_DSS_VP1_CONFIG_VSYNCGATED_VAL_VGENB   (0x1U)

◆ CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MASK

#define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MASK   (0x00000100U)

◆ CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_SHIFT

#define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_SHIFT   (0x00000008U)

◆ CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MAX

#define CSL_DSS_VP1_CONFIG_EXTERNALSYNCEN_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_RESERVED1_MASK

#define CSL_DSS_VP1_CONFIG_RESERVED1_MASK   (0x00007E00U)

◆ CSL_DSS_VP1_CONFIG_RESERVED1_SHIFT

#define CSL_DSS_VP1_CONFIG_RESERVED1_SHIFT   (0x00000009U)

◆ CSL_DSS_VP1_CONFIG_RESERVED1_MAX

#define CSL_DSS_VP1_CONFIG_RESERVED1_MAX   (0x0000003FU)

◆ CSL_DSS_VP1_CONFIG_CPR_MASK

#define CSL_DSS_VP1_CONFIG_CPR_MASK   (0x00008000U)

◆ CSL_DSS_VP1_CONFIG_CPR_SHIFT

#define CSL_DSS_VP1_CONFIG_CPR_SHIFT   (0x0000000FU)

◆ CSL_DSS_VP1_CONFIG_CPR_MAX

#define CSL_DSS_VP1_CONFIG_CPR_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MASK

#define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MASK   (0x00010000U)

◆ CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_SHIFT

#define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MAX

#define CSL_DSS_VP1_CONFIG_BUFFERHANDSHAKE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_RESERVED2_MASK

#define CSL_DSS_VP1_CONFIG_RESERVED2_MASK   (0x000E0000U)

◆ CSL_DSS_VP1_CONFIG_RESERVED2_SHIFT

#define CSL_DSS_VP1_CONFIG_RESERVED2_SHIFT   (0x00000011U)

◆ CSL_DSS_VP1_CONFIG_RESERVED2_MAX

#define CSL_DSS_VP1_CONFIG_RESERVED2_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CONFIG_BT656ENABLE_MASK

#define CSL_DSS_VP1_CONFIG_BT656ENABLE_MASK   (0x00100000U)

◆ CSL_DSS_VP1_CONFIG_BT656ENABLE_SHIFT

#define CSL_DSS_VP1_CONFIG_BT656ENABLE_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_CONFIG_BT656ENABLE_MAX

#define CSL_DSS_VP1_CONFIG_BT656ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_DISABLE

#define CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_ENABLE

#define CSL_DSS_VP1_CONFIG_BT656ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP1_CONFIG_BT1120ENABLE_MASK

#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_MASK   (0x00200000U)

◆ CSL_DSS_VP1_CONFIG_BT1120ENABLE_SHIFT

#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_SHIFT   (0x00000015U)

◆ CSL_DSS_VP1_CONFIG_BT1120ENABLE_MAX

#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_DISABLE

#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_ENABLE

#define CSL_DSS_VP1_CONFIG_BT1120ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MASK

#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MASK   (0x00400000U)

◆ CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_SHIFT

#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_SHIFT   (0x00000016U)

◆ CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MAX

#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE

#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE

#define CSL_DSS_VP1_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP1_CONFIG_FIDFIRST_MASK

#define CSL_DSS_VP1_CONFIG_FIDFIRST_MASK   (0x00800000U)

◆ CSL_DSS_VP1_CONFIG_FIDFIRST_SHIFT

#define CSL_DSS_VP1_CONFIG_FIDFIRST_SHIFT   (0x00000017U)

◆ CSL_DSS_VP1_CONFIG_FIDFIRST_MAX

#define CSL_DSS_VP1_CONFIG_FIDFIRST_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_EVEN

#define CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_EVEN   (0x0U)

◆ CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_ODD

#define CSL_DSS_VP1_CONFIG_FIDFIRST_VAL_ODD   (0x1U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MASK

#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MASK   (0x01000000U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVENABLE_SHIFT

#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_SHIFT   (0x00000018U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MAX

#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_VP1_CONFIG_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_VP1_CONFIG_FULLRANGE_MASK

#define CSL_DSS_VP1_CONFIG_FULLRANGE_MASK   (0x02000000U)

◆ CSL_DSS_VP1_CONFIG_FULLRANGE_SHIFT

#define CSL_DSS_VP1_CONFIG_FULLRANGE_SHIFT   (0x00000019U)

◆ CSL_DSS_VP1_CONFIG_FULLRANGE_MAX

#define CSL_DSS_VP1_CONFIG_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_VP1_CONFIG_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVPOS_MASK

#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_MASK   (0x04000000U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVPOS_SHIFT

#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_SHIFT   (0x0000001AU)

◆ CSL_DSS_VP1_CONFIG_COLORCONVPOS_MAX

#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA

#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA   (0x0U)

◆ CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA

#define CSL_DSS_VP1_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA   (0x1U)

◆ CSL_DSS_VP1_CONFIG_RESERVED3_MASK

#define CSL_DSS_VP1_CONFIG_RESERVED3_MASK   (0xF8000000U)

◆ CSL_DSS_VP1_CONFIG_RESERVED3_SHIFT

#define CSL_DSS_VP1_CONFIG_RESERVED3_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP1_CONFIG_RESERVED3_MAX

#define CSL_DSS_VP1_CONFIG_RESERVED3_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_CONTROL_ENABLE_MASK

#define CSL_DSS_VP1_CONTROL_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_ENABLE_SHIFT

#define CSL_DSS_VP1_CONTROL_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CONTROL_ENABLE_MAX

#define CSL_DSS_VP1_CONTROL_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPDIS

#define CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPDIS   (0x0U)

◆ CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPENB

#define CSL_DSS_VP1_CONTROL_ENABLE_VAL_LCDOPENB   (0x1U)

◆ CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MASK

#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MASK   (0x00000002U)

◆ CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_SHIFT

#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_SHIFT   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MAX

#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS

#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS   (0x0U)

◆ CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN

#define CSL_DSS_VP1_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN   (0x1U)

◆ CSL_DSS_VP1_CONTROL_MONOCOLOR_MASK

#define CSL_DSS_VP1_CONTROL_MONOCOLOR_MASK   (0x00000004U)

◆ CSL_DSS_VP1_CONTROL_MONOCOLOR_SHIFT

#define CSL_DSS_VP1_CONTROL_MONOCOLOR_SHIFT   (0x00000002U)

◆ CSL_DSS_VP1_CONTROL_MONOCOLOR_MAX

#define CSL_DSS_VP1_CONTROL_MONOCOLOR_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_STN_MASK

#define CSL_DSS_VP1_CONTROL_STN_MASK   (0x00000008U)

◆ CSL_DSS_VP1_CONTROL_STN_SHIFT

#define CSL_DSS_VP1_CONTROL_STN_SHIFT   (0x00000003U)

◆ CSL_DSS_VP1_CONTROL_STN_MAX

#define CSL_DSS_VP1_CONTROL_STN_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_M8B_MASK

#define CSL_DSS_VP1_CONTROL_M8B_MASK   (0x00000010U)

◆ CSL_DSS_VP1_CONTROL_M8B_SHIFT

#define CSL_DSS_VP1_CONTROL_M8B_SHIFT   (0x00000004U)

◆ CSL_DSS_VP1_CONTROL_M8B_MAX

#define CSL_DSS_VP1_CONTROL_M8B_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_GOBIT_MASK

#define CSL_DSS_VP1_CONTROL_GOBIT_MASK   (0x00000020U)

◆ CSL_DSS_VP1_CONTROL_GOBIT_SHIFT

#define CSL_DSS_VP1_CONTROL_GOBIT_SHIFT   (0x00000005U)

◆ CSL_DSS_VP1_CONTROL_GOBIT_MAX

#define CSL_DSS_VP1_CONTROL_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_GOBIT_VAL_HFUISR

#define CSL_DSS_VP1_CONTROL_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_VP1_CONTROL_GOBIT_VAL_UFPSR

#define CSL_DSS_VP1_CONTROL_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_VP1_CONTROL_DPIENABLE_MASK

#define CSL_DSS_VP1_CONTROL_DPIENABLE_MASK   (0x00000040U)

◆ CSL_DSS_VP1_CONTROL_DPIENABLE_SHIFT

#define CSL_DSS_VP1_CONTROL_DPIENABLE_SHIFT   (0x00000006U)

◆ CSL_DSS_VP1_CONTROL_DPIENABLE_MAX

#define CSL_DSS_VP1_CONTROL_DPIENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPDIS

#define CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPDIS   (0x0U)

◆ CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPENB

#define CSL_DSS_VP1_CONTROL_DPIENABLE_VAL_DPIOPENB   (0x1U)

◆ CSL_DSS_VP1_CONTROL_STDITHERENABLE_MASK

#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_MASK   (0x00000080U)

◆ CSL_DSS_VP1_CONTROL_STDITHERENABLE_SHIFT

#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_SHIFT   (0x00000007U)

◆ CSL_DSS_VP1_CONTROL_STDITHERENABLE_MAX

#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHDIS

#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHDIS   (0x0U)

◆ CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHENB

#define CSL_DSS_VP1_CONTROL_STDITHERENABLE_VAL_STDITHENB   (0x1U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_MASK

#define CSL_DSS_VP1_CONTROL_DATALINES_MASK   (0x00000700U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_SHIFT

#define CSL_DSS_VP1_CONTROL_DATALINES_SHIFT   (0x00000008U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_MAX

#define CSL_DSS_VP1_CONTROL_DATALINES_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB12B

#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB12B   (0x0U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB16B

#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB16B   (0x1U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB18B

#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB18B   (0x2U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB24B

#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB24B   (0x3U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB30B

#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB30B   (0x4U)

◆ CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB36B

#define CSL_DSS_VP1_CONTROL_DATALINES_VAL_OALSB36B   (0x5U)

◆ CSL_DSS_VP1_CONTROL_STALLMODE_MASK

#define CSL_DSS_VP1_CONTROL_STALLMODE_MASK   (0x00000800U)

◆ CSL_DSS_VP1_CONTROL_STALLMODE_SHIFT

#define CSL_DSS_VP1_CONTROL_STALLMODE_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP1_CONTROL_STALLMODE_MAX

#define CSL_DSS_VP1_CONTROL_STALLMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_STALLMODE_VAL_STALLDIS

#define CSL_DSS_VP1_CONTROL_STALLMODE_VAL_STALLDIS   (0x0U)

◆ CSL_DSS_VP1_CONTROL_STALLMODE_VAL_STALLENB

#define CSL_DSS_VP1_CONTROL_STALLMODE_VAL_STALLENB   (0x1U)

◆ CSL_DSS_VP1_CONTROL_STALLMODETYPE_MASK

#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_MASK   (0x00001000U)

◆ CSL_DSS_VP1_CONTROL_STALLMODETYPE_SHIFT

#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP1_CONTROL_STALLMODETYPE_MAX

#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_COMMANDMODE

#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_COMMANDMODE   (0x0U)

◆ CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_VIDEOMODE

#define CSL_DSS_VP1_CONTROL_STALLMODETYPE_VAL_VIDEOMODE   (0x1U)

◆ CSL_DSS_VP1_CONTROL_RESERVED3_MASK

#define CSL_DSS_VP1_CONTROL_RESERVED3_MASK   (0x00002000U)

◆ CSL_DSS_VP1_CONTROL_RESERVED3_SHIFT

#define CSL_DSS_VP1_CONTROL_RESERVED3_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP1_CONTROL_RESERVED3_MAX

#define CSL_DSS_VP1_CONTROL_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_HT_MASK

#define CSL_DSS_VP1_CONTROL_HT_MASK   (0x0001C000U)

◆ CSL_DSS_VP1_CONTROL_HT_SHIFT

#define CSL_DSS_VP1_CONTROL_HT_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP1_CONTROL_HT_MAX

#define CSL_DSS_VP1_CONTROL_HT_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CONTROL_RESERVED1_MASK

#define CSL_DSS_VP1_CONTROL_RESERVED1_MASK   (0x000E0000U)

◆ CSL_DSS_VP1_CONTROL_RESERVED1_SHIFT

#define CSL_DSS_VP1_CONTROL_RESERVED1_SHIFT   (0x00000011U)

◆ CSL_DSS_VP1_CONTROL_RESERVED1_MAX

#define CSL_DSS_VP1_CONTROL_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CONTROL_TDMENABLE_MASK

#define CSL_DSS_VP1_CONTROL_TDMENABLE_MASK   (0x00100000U)

◆ CSL_DSS_VP1_CONTROL_TDMENABLE_SHIFT

#define CSL_DSS_VP1_CONTROL_TDMENABLE_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_CONTROL_TDMENABLE_MAX

#define CSL_DSS_VP1_CONTROL_TDMENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMDIS

#define CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMDIS   (0x0U)

◆ CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMENB

#define CSL_DSS_VP1_CONTROL_TDMENABLE_VAL_TDMENB   (0x1U)

◆ CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MASK

#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MASK   (0x00600000U)

◆ CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_SHIFT

#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_SHIFT   (0x00000015U)

◆ CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MAX

#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_MAX   (0x00000003U)

◆ CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT

#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT   (0x0U)

◆ CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT

#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT   (0x1U)

◆ CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT

#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT   (0x2U)

◆ CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT

#define CSL_DSS_VP1_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT   (0x3U)

◆ CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MASK

#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MASK   (0x01800000U)

◆ CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_SHIFT

#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_SHIFT   (0x00000017U)

◆ CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MAX

#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_MAX   (0x00000003U)

◆ CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX

#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX   (0x0U)

◆ CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX

#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX   (0x1U)

◆ CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX

#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX   (0x2U)

◆ CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX

#define CSL_DSS_VP1_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX   (0x3U)

◆ CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MASK

#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MASK   (0x06000000U)

◆ CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_SHIFT

#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_SHIFT   (0x00000019U)

◆ CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MAX

#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_MAX   (0x00000003U)

◆ CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL

#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL   (0x0U)

◆ CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL

#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL   (0x1U)

◆ CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED

#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED   (0x2U)

◆ CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_RES

#define CSL_DSS_VP1_CONTROL_TDMUNUSEDBITS_VAL_RES   (0x3U)

◆ CSL_DSS_VP1_CONTROL_RESERVED_MASK

#define CSL_DSS_VP1_CONTROL_RESERVED_MASK   (0x38000000U)

◆ CSL_DSS_VP1_CONTROL_RESERVED_SHIFT

#define CSL_DSS_VP1_CONTROL_RESERVED_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP1_CONTROL_RESERVED_MAX

#define CSL_DSS_VP1_CONTROL_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK

#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK   (0xC0000000U)

◆ CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT

#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT   (0x0000001EU)

◆ CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX

#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX   (0x00000003U)

◆ CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME

#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME   (0x0U)

◆ CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES

#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES   (0x1U)

◆ CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES

#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES   (0x2U)

◆ CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED

#define CSL_DSS_VP1_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VP1_CSC_COEF0_C00_MASK

#define CSL_DSS_VP1_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF0_C00_SHIFT

#define CSL_DSS_VP1_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CSC_COEF0_C00_MAX

#define CSL_DSS_VP1_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_VP1_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_VP1_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_CSC_COEF0_C01_MASK

#define CSL_DSS_VP1_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_VP1_CSC_COEF0_C01_SHIFT

#define CSL_DSS_VP1_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_CSC_COEF0_C01_MAX

#define CSL_DSS_VP1_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_VP1_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_VP1_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_CSC_COEF1_C02_MASK

#define CSL_DSS_VP1_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF1_C02_SHIFT

#define CSL_DSS_VP1_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CSC_COEF1_C02_MAX

#define CSL_DSS_VP1_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_VP1_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_VP1_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_CSC_COEF1_C10_MASK

#define CSL_DSS_VP1_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_VP1_CSC_COEF1_C10_SHIFT

#define CSL_DSS_VP1_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_CSC_COEF1_C10_MAX

#define CSL_DSS_VP1_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_VP1_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_VP1_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_CSC_COEF2_C11_MASK

#define CSL_DSS_VP1_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF2_C11_SHIFT

#define CSL_DSS_VP1_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CSC_COEF2_C11_MAX

#define CSL_DSS_VP1_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_VP1_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_VP1_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_CSC_COEF2_C12_MASK

#define CSL_DSS_VP1_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_VP1_CSC_COEF2_C12_SHIFT

#define CSL_DSS_VP1_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_CSC_COEF2_C12_MAX

#define CSL_DSS_VP1_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_VP1_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_VP1_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MASK

#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MAX

#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MASK

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MAX

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MASK

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MAX

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MASK

#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MAX

#define CSL_DSS_VP1_DATA_CYCLE_0_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MASK

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MAX

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP1_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MASK

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MAX

#define CSL_DSS_VP1_DATA_CYCLE_0_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MASK

#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MAX

#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MASK

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MAX

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MASK

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MAX

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MASK

#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MAX

#define CSL_DSS_VP1_DATA_CYCLE_1_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MASK

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MAX

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP1_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MASK

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MAX

#define CSL_DSS_VP1_DATA_CYCLE_1_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MASK

#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MAX

#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MASK

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MAX

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MASK

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MAX

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MASK

#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MAX

#define CSL_DSS_VP1_DATA_CYCLE_2_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MASK

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MAX

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP1_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MASK

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_SHIFT

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MAX

#define CSL_DSS_VP1_DATA_CYCLE_2_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MASK

#define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MASK   (0x00003FFFU)

◆ CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_SHIFT

#define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MAX

#define CSL_DSS_VP1_LINE_NUMBER_LINENUMBER_MAX   (0x00003FFFU)

◆ CSL_DSS_VP1_LINE_NUMBER_RESERVED_MASK

#define CSL_DSS_VP1_LINE_NUMBER_RESERVED_MASK   (0xFFFFC000U)

◆ CSL_DSS_VP1_LINE_NUMBER_RESERVED_SHIFT

#define CSL_DSS_VP1_LINE_NUMBER_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP1_LINE_NUMBER_RESERVED_MAX

#define CSL_DSS_VP1_LINE_NUMBER_RESERVED_MAX   (0x0003FFFFU)

◆ CSL_DSS_VP1_POL_FREQ_ACB_MASK

#define CSL_DSS_VP1_POL_FREQ_ACB_MASK   (0x000000FFU)

◆ CSL_DSS_VP1_POL_FREQ_ACB_SHIFT

#define CSL_DSS_VP1_POL_FREQ_ACB_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_POL_FREQ_ACB_MAX

#define CSL_DSS_VP1_POL_FREQ_ACB_MAX   (0x000000FFU)

◆ CSL_DSS_VP1_POL_FREQ_ACBI_MASK

#define CSL_DSS_VP1_POL_FREQ_ACBI_MASK   (0x00000F00U)

◆ CSL_DSS_VP1_POL_FREQ_ACBI_SHIFT

#define CSL_DSS_VP1_POL_FREQ_ACBI_SHIFT   (0x00000008U)

◆ CSL_DSS_VP1_POL_FREQ_ACBI_MAX

#define CSL_DSS_VP1_POL_FREQ_ACBI_MAX   (0x0000000FU)

◆ CSL_DSS_VP1_POL_FREQ_IVS_MASK

#define CSL_DSS_VP1_POL_FREQ_IVS_MASK   (0x00001000U)

◆ CSL_DSS_VP1_POL_FREQ_IVS_SHIFT

#define CSL_DSS_VP1_POL_FREQ_IVS_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP1_POL_FREQ_IVS_MAX

#define CSL_DSS_VP1_POL_FREQ_IVS_MAX   (0x00000001U)

◆ CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAH

#define CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAH   (0x0U)

◆ CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAL

#define CSL_DSS_VP1_POL_FREQ_IVS_VAL_FCKPINAL   (0x1U)

◆ CSL_DSS_VP1_POL_FREQ_IHS_MASK

#define CSL_DSS_VP1_POL_FREQ_IHS_MASK   (0x00002000U)

◆ CSL_DSS_VP1_POL_FREQ_IHS_SHIFT

#define CSL_DSS_VP1_POL_FREQ_IHS_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP1_POL_FREQ_IHS_MAX

#define CSL_DSS_VP1_POL_FREQ_IHS_MAX   (0x00000001U)

◆ CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAH

#define CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAH   (0x0U)

◆ CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAL

#define CSL_DSS_VP1_POL_FREQ_IHS_VAL_LCKPINAL   (0x1U)

◆ CSL_DSS_VP1_POL_FREQ_IPC_MASK

#define CSL_DSS_VP1_POL_FREQ_IPC_MASK   (0x00004000U)

◆ CSL_DSS_VP1_POL_FREQ_IPC_SHIFT

#define CSL_DSS_VP1_POL_FREQ_IPC_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP1_POL_FREQ_IPC_MAX

#define CSL_DSS_VP1_POL_FREQ_IPC_MAX   (0x00000001U)

◆ CSL_DSS_VP1_POL_FREQ_IPC_VAL_DRPCK

#define CSL_DSS_VP1_POL_FREQ_IPC_VAL_DRPCK   (0x0U)

◆ CSL_DSS_VP1_POL_FREQ_IPC_VAL_DFPCK

#define CSL_DSS_VP1_POL_FREQ_IPC_VAL_DFPCK   (0x1U)

◆ CSL_DSS_VP1_POL_FREQ_IEO_MASK

#define CSL_DSS_VP1_POL_FREQ_IEO_MASK   (0x00008000U)

◆ CSL_DSS_VP1_POL_FREQ_IEO_SHIFT

#define CSL_DSS_VP1_POL_FREQ_IEO_SHIFT   (0x0000000FU)

◆ CSL_DSS_VP1_POL_FREQ_IEO_MAX

#define CSL_DSS_VP1_POL_FREQ_IEO_MAX   (0x00000001U)

◆ CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBAHIGH

#define CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBAHIGH   (0x0U)

◆ CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBALOW

#define CSL_DSS_VP1_POL_FREQ_IEO_VAL_ACBALOW   (0x1U)

◆ CSL_DSS_VP1_POL_FREQ_RF_MASK

#define CSL_DSS_VP1_POL_FREQ_RF_MASK   (0x00010000U)

◆ CSL_DSS_VP1_POL_FREQ_RF_SHIFT

#define CSL_DSS_VP1_POL_FREQ_RF_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_POL_FREQ_RF_MAX

#define CSL_DSS_VP1_POL_FREQ_RF_MAX   (0x00000001U)

◆ CSL_DSS_VP1_POL_FREQ_RF_VAL_DFEDPCK

#define CSL_DSS_VP1_POL_FREQ_RF_VAL_DFEDPCK   (0x0U)

◆ CSL_DSS_VP1_POL_FREQ_RF_VAL_DRIEDPCK

#define CSL_DSS_VP1_POL_FREQ_RF_VAL_DRIEDPCK   (0x1U)

◆ CSL_DSS_VP1_POL_FREQ_ONOFF_MASK

#define CSL_DSS_VP1_POL_FREQ_ONOFF_MASK   (0x00020000U)

◆ CSL_DSS_VP1_POL_FREQ_ONOFF_SHIFT

#define CSL_DSS_VP1_POL_FREQ_ONOFF_SHIFT   (0x00000011U)

◆ CSL_DSS_VP1_POL_FREQ_ONOFF_MAX

#define CSL_DSS_VP1_POL_FREQ_ONOFF_MAX   (0x00000001U)

◆ CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DOPEDPCK

#define CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DOPEDPCK   (0x0U)

◆ CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DBIT16

#define CSL_DSS_VP1_POL_FREQ_ONOFF_VAL_DBIT16   (0x1U)

◆ CSL_DSS_VP1_POL_FREQ_ALIGN_MASK

#define CSL_DSS_VP1_POL_FREQ_ALIGN_MASK   (0x00040000U)

◆ CSL_DSS_VP1_POL_FREQ_ALIGN_SHIFT

#define CSL_DSS_VP1_POL_FREQ_ALIGN_SHIFT   (0x00000012U)

◆ CSL_DSS_VP1_POL_FREQ_ALIGN_MAX

#define CSL_DSS_VP1_POL_FREQ_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_NOTALIGNED

#define CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_NOTALIGNED   (0x0U)

◆ CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_ALIGNED

#define CSL_DSS_VP1_POL_FREQ_ALIGN_VAL_ALIGNED   (0x1U)

◆ CSL_DSS_VP1_POL_FREQ_RESERVED_MASK

#define CSL_DSS_VP1_POL_FREQ_RESERVED_MASK   (0xFFF80000U)

◆ CSL_DSS_VP1_POL_FREQ_RESERVED_SHIFT

#define CSL_DSS_VP1_POL_FREQ_RESERVED_SHIFT   (0x00000013U)

◆ CSL_DSS_VP1_POL_FREQ_RESERVED_MAX

#define CSL_DSS_VP1_POL_FREQ_RESERVED_MAX   (0x00001FFFU)

◆ CSL_DSS_VP1_SIZE_SCREEN_PPL_MASK

#define CSL_DSS_VP1_SIZE_SCREEN_PPL_MASK   (0x00003FFFU)

◆ CSL_DSS_VP1_SIZE_SCREEN_PPL_SHIFT

#define CSL_DSS_VP1_SIZE_SCREEN_PPL_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_SIZE_SCREEN_PPL_MAX

#define CSL_DSS_VP1_SIZE_SCREEN_PPL_MAX   (0x00003FFFU)

◆ CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MASK

#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MASK   (0x0000C000U)

◆ CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_SHIFT

#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MAX

#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_MAX   (0x00000003U)

◆ CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_SAME

#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_SAME   (0x0U)

◆ CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE

#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE   (0x1U)

◆ CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE

#define CSL_DSS_VP1_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE   (0x2U)

◆ CSL_DSS_VP1_SIZE_SCREEN_LPP_MASK

#define CSL_DSS_VP1_SIZE_SCREEN_LPP_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP1_SIZE_SCREEN_LPP_SHIFT

#define CSL_DSS_VP1_SIZE_SCREEN_LPP_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_SIZE_SCREEN_LPP_MAX

#define CSL_DSS_VP1_SIZE_SCREEN_LPP_MAX   (0x00003FFFU)

◆ CSL_DSS_VP1_TIMING_H_HSW_MASK

#define CSL_DSS_VP1_TIMING_H_HSW_MASK   (0x000000FFU)

◆ CSL_DSS_VP1_TIMING_H_HSW_SHIFT

#define CSL_DSS_VP1_TIMING_H_HSW_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_TIMING_H_HSW_MAX

#define CSL_DSS_VP1_TIMING_H_HSW_MAX   (0x000000FFU)

◆ CSL_DSS_VP1_TIMING_H_HFP_MASK

#define CSL_DSS_VP1_TIMING_H_HFP_MASK   (0x000FFF00U)

◆ CSL_DSS_VP1_TIMING_H_HFP_SHIFT

#define CSL_DSS_VP1_TIMING_H_HFP_SHIFT   (0x00000008U)

◆ CSL_DSS_VP1_TIMING_H_HFP_MAX

#define CSL_DSS_VP1_TIMING_H_HFP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP1_TIMING_H_HBP_MASK

#define CSL_DSS_VP1_TIMING_H_HBP_MASK   (0xFFF00000U)

◆ CSL_DSS_VP1_TIMING_H_HBP_SHIFT

#define CSL_DSS_VP1_TIMING_H_HBP_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_TIMING_H_HBP_MAX

#define CSL_DSS_VP1_TIMING_H_HBP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP1_TIMING_V_VSW_MASK

#define CSL_DSS_VP1_TIMING_V_VSW_MASK   (0x000000FFU)

◆ CSL_DSS_VP1_TIMING_V_VSW_SHIFT

#define CSL_DSS_VP1_TIMING_V_VSW_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_TIMING_V_VSW_MAX

#define CSL_DSS_VP1_TIMING_V_VSW_MAX   (0x000000FFU)

◆ CSL_DSS_VP1_TIMING_V_VFP_MASK

#define CSL_DSS_VP1_TIMING_V_VFP_MASK   (0x000FFF00U)

◆ CSL_DSS_VP1_TIMING_V_VFP_SHIFT

#define CSL_DSS_VP1_TIMING_V_VFP_SHIFT   (0x00000008U)

◆ CSL_DSS_VP1_TIMING_V_VFP_MAX

#define CSL_DSS_VP1_TIMING_V_VFP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP1_TIMING_V_VBP_MASK

#define CSL_DSS_VP1_TIMING_V_VBP_MASK   (0xFFF00000U)

◆ CSL_DSS_VP1_TIMING_V_VBP_SHIFT

#define CSL_DSS_VP1_TIMING_V_VBP_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_TIMING_V_VBP_MAX

#define CSL_DSS_VP1_TIMING_V_VBP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP1_CSC_COEF3_C20_MASK

#define CSL_DSS_VP1_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF3_C20_SHIFT

#define CSL_DSS_VP1_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CSC_COEF3_C20_MAX

#define CSL_DSS_VP1_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_VP1_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_VP1_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_CSC_COEF3_C21_MASK

#define CSL_DSS_VP1_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_VP1_CSC_COEF3_C21_SHIFT

#define CSL_DSS_VP1_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_CSC_COEF3_C21_MAX

#define CSL_DSS_VP1_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_VP1_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_VP1_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_VP1_CSC_COEF4_C22_MASK

#define CSL_DSS_VP1_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF4_C22_SHIFT

#define CSL_DSS_VP1_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CSC_COEF4_C22_MAX

#define CSL_DSS_VP1_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_VP1_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_VP1_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_VP1_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_VP1_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_VP1_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_VP1_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VP1_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_VP1_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP1_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_VP1_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_VP1_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_VP1_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VP1_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_VP1_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_VP1_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_VP1_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_VP1_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VP1_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_VP1_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP1_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_VP1_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_VP1_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_VP1_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VP1_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_VP1_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_VP1_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_VP1_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VP1_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_VP1_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP1_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_VP1_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_VP1_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_VP1_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MASK

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MAX

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP   (0x0U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MASK

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_SHIFT

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MAX

#define CSL_DSS_VP1_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)

◆ CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VP1_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_SAFETY_POSITION_POSX_MASK

#define CSL_DSS_VP1_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_VP1_SAFETY_POSITION_POSX_SHIFT

#define CSL_DSS_VP1_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_SAFETY_POSITION_POSX_MAX

#define CSL_DSS_VP1_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_VP1_SAFETY_POSITION_POSY_MASK

#define CSL_DSS_VP1_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP1_SAFETY_POSITION_POSY_SHIFT

#define CSL_DSS_VP1_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_SAFETY_POSITION_POSY_MAX

#define CSL_DSS_VP1_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VP1_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MASK

#define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VP1_SAFETY_SIZE_SIZEX_SHIFT

#define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MAX

#define CSL_DSS_VP1_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MASK

#define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP1_SAFETY_SIZE_SIZEY_SHIFT

#define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MAX

#define CSL_DSS_VP1_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MASK

#define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_SHIFT

#define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MAX

#define CSL_DSS_VP1_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_0_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_0_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_1_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_1_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_2_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_2_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_3_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_3_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_4_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_4_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_5_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_5_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_6_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_6_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_7_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_7_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_8_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_8_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_9_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_9_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_10_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_10_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_11_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_11_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_12_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_12_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_13_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_13_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_14_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_14_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_15_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MASK

#define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_SHIFT

#define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MAX

#define CSL_DSS_VP1_GAMMA_TABLE_15_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_MASK

#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_MASK   (0x00003FFFU)

◆ CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_SHIFT

#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_MAX

#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED1_MAX   (0x00003FFFU)

◆ CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MASK

#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MASK   (0xFFFFC000U)

◆ CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_SHIFT

#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MAX

#define CSL_DSS_VP1_DSS_OLDI_CFG_RESERVED_MAX   (0x0003FFFFU)

◆ CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_MASK

#define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_SHIFT

#define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_MAX

#define CSL_DSS_VP1_DSS_OLDI_STATUS_RESERVED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MASK

#define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_SHIFT

#define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MAX

#define CSL_DSS_VP1_DSS_OLDI_LB_RESERVED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP1_SECURE_SECURE_MASK

#define CSL_DSS_VP1_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_VP1_SECURE_SECURE_SHIFT

#define CSL_DSS_VP1_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP1_SECURE_SECURE_MAX

#define CSL_DSS_VP1_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_VP1_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_VP1_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_VP1_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_VP1_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_VP1_SECURE_RESERVED_MASK

#define CSL_DSS_VP1_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VP1_SECURE_RESERVED_SHIFT

#define CSL_DSS_VP1_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VP1_SECURE_RESERVED_MAX

#define CSL_DSS_VP1_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_OVR2_CONFIG

#define CSL_DSS_OVR2_CONFIG   (0x00000000U)

◆ CSL_DSS_OVR2_VIRTUALVP

#define CSL_DSS_OVR2_VIRTUALVP   (0x00000004U)

◆ CSL_DSS_OVR2_DEFAULT_COLOR

#define CSL_DSS_OVR2_DEFAULT_COLOR   (0x00000008U)

◆ CSL_DSS_OVR2_DEFAULT_COLOR2

#define CSL_DSS_OVR2_DEFAULT_COLOR2   (0x0000000CU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX

#define CSL_DSS_OVR2_TRANS_COLOR_MAX   (0x00000010U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX2

#define CSL_DSS_OVR2_TRANS_COLOR_MAX2   (0x00000014U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN

#define CSL_DSS_OVR2_TRANS_COLOR_MIN   (0x00000018U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN2

#define CSL_DSS_OVR2_TRANS_COLOR_MIN2   (0x0000001CU)

◆ CSL_DSS_OVR2_ATTRIBUTES

#define CSL_DSS_OVR2_ATTRIBUTES (   index)    (0x00000020U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_OVR2_ATTRIBUTES2

#define CSL_DSS_OVR2_ATTRIBUTES2 (   index)    (0x00000034U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_OVR2_SECURE

#define CSL_DSS_OVR2_SECURE   (0x00000048U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED6_MASK

#define CSL_DSS_OVR2_CONFIG_RESERVED6_MASK   (0x00000001U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED6_SHIFT

#define CSL_DSS_OVR2_CONFIG_RESERVED6_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED6_MAX

#define CSL_DSS_OVR2_CONFIG_RESERVED6_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_CONFIG_COLORBAREN_MASK

#define CSL_DSS_OVR2_CONFIG_COLORBAREN_MASK   (0x00000002U)

◆ CSL_DSS_OVR2_CONFIG_COLORBAREN_SHIFT

#define CSL_DSS_OVR2_CONFIG_COLORBAREN_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR2_CONFIG_COLORBAREN_MAX

#define CSL_DSS_OVR2_CONFIG_COLORBAREN_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_CONFIG_COLORBAREN_VAL_COLORBARDIS

#define CSL_DSS_OVR2_CONFIG_COLORBAREN_VAL_COLORBARDIS   (0x0U)

◆ CSL_DSS_OVR2_CONFIG_COLORBAREN_VAL_COLORBAREN

#define CSL_DSS_OVR2_CONFIG_COLORBAREN_VAL_COLORBAREN   (0x1U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED_MASK

#define CSL_DSS_OVR2_CONFIG_RESERVED_MASK   (0x000003FCU)

◆ CSL_DSS_OVR2_CONFIG_RESERVED_SHIFT

#define CSL_DSS_OVR2_CONFIG_RESERVED_SHIFT   (0x00000002U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED_MAX

#define CSL_DSS_OVR2_CONFIG_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_MASK

#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_MASK   (0x00000400U)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_SHIFT

#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_SHIFT   (0x0000000AU)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_MAX

#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_VAL_DISTCK

#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_VAL_DISTCK   (0x0U)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_VAL_ENBTCK

#define CSL_DSS_OVR2_CONFIG_TCKLCDENABLE_VAL_ENBTCK   (0x1U)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_MASK

#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_MASK   (0x00000800U)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_SHIFT

#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_SHIFT   (0x0000000BU)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_MAX

#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_VAL_GDTK

#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_VAL_GDTK   (0x0U)

◆ CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_VAL_VSTK

#define CSL_DSS_OVR2_CONFIG_TCKLCDSELECTION_VAL_VSTK   (0x1U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED2_MASK

#define CSL_DSS_OVR2_CONFIG_RESERVED2_MASK   (0x00001000U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED2_SHIFT

#define CSL_DSS_OVR2_CONFIG_RESERVED2_SHIFT   (0x0000000CU)

◆ CSL_DSS_OVR2_CONFIG_RESERVED2_MAX

#define CSL_DSS_OVR2_CONFIG_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED3_MASK

#define CSL_DSS_OVR2_CONFIG_RESERVED3_MASK   (0x00002000U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED3_SHIFT

#define CSL_DSS_OVR2_CONFIG_RESERVED3_SHIFT   (0x0000000DU)

◆ CSL_DSS_OVR2_CONFIG_RESERVED3_MAX

#define CSL_DSS_OVR2_CONFIG_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED1_MASK

#define CSL_DSS_OVR2_CONFIG_RESERVED1_MASK   (0xFFFFC000U)

◆ CSL_DSS_OVR2_CONFIG_RESERVED1_SHIFT

#define CSL_DSS_OVR2_CONFIG_RESERVED1_SHIFT   (0x0000000EU)

◆ CSL_DSS_OVR2_CONFIG_RESERVED1_MAX

#define CSL_DSS_OVR2_CONFIG_RESERVED1_MAX   (0x0003FFFFU)

◆ CSL_DSS_OVR2_VIRTUALVP_PPL_MASK

#define CSL_DSS_OVR2_VIRTUALVP_PPL_MASK   (0x00003FFFU)

◆ CSL_DSS_OVR2_VIRTUALVP_PPL_SHIFT

#define CSL_DSS_OVR2_VIRTUALVP_PPL_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_VIRTUALVP_PPL_MAX

#define CSL_DSS_OVR2_VIRTUALVP_PPL_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR2_VIRTUALVP_LPP_MASK

#define CSL_DSS_OVR2_VIRTUALVP_LPP_MASK   (0x3FFF0000U)

◆ CSL_DSS_OVR2_VIRTUALVP_LPP_SHIFT

#define CSL_DSS_OVR2_VIRTUALVP_LPP_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR2_VIRTUALVP_LPP_MAX

#define CSL_DSS_OVR2_VIRTUALVP_LPP_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR2_VIRTUALVP_ENABLE_MASK

#define CSL_DSS_OVR2_VIRTUALVP_ENABLE_MASK   (0x80000000U)

◆ CSL_DSS_OVR2_VIRTUALVP_ENABLE_SHIFT

#define CSL_DSS_OVR2_VIRTUALVP_ENABLE_SHIFT   (0x0000001FU)

◆ CSL_DSS_OVR2_VIRTUALVP_ENABLE_MAX

#define CSL_DSS_OVR2_VIRTUALVP_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_MASK

#define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT

#define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_MAX

#define CSL_DSS_OVR2_DEFAULT_COLOR_DEFAULTCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_MASK

#define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_MASK   (0x0000FFFFU)

◆ CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT

#define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_MAX

#define CSL_DSS_OVR2_DEFAULT_COLOR2_DEFAULTCOLOR_MAX   (0x0000FFFFU)

◆ CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_MASK

#define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_SHIFT

#define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_MAX

#define CSL_DSS_OVR2_DEFAULT_COLOR2_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR2_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK   (0x0000000FU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX   (0x0000000FU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_MASK

#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_SHIFT

#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_MAX

#define CSL_DSS_OVR2_TRANS_COLOR_MAX2_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR2_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK   (0x0000000FU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX   (0x0000000FU)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_MASK

#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_SHIFT

#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_MAX

#define CSL_DSS_OVR2_TRANS_COLOR_MIN2_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_OVR2_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_OVR2_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_OVR2_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_MASK

#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_MASK   (0x0000001EU)

◆ CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_SHIFT

#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_MAX

#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_MAX   (0x0000000FU)

◆ CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VID1

#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VID1   (0x0U)

◆ CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIDL1

#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIDL1   (0x1U)

◆ CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VID2

#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VID2   (0x2U)

◆ CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIDL2

#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIDL2   (0x3U)

◆ CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIRTCH

#define CSL_DSS_OVR2_ATTRIBUTES_CHANNELIN_VAL_VIRTCH   (0x4U)

◆ CSL_DSS_OVR2_ATTRIBUTES2_POSX_MASK

#define CSL_DSS_OVR2_ATTRIBUTES2_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_OVR2_ATTRIBUTES2_POSX_SHIFT

#define CSL_DSS_OVR2_ATTRIBUTES2_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_ATTRIBUTES2_POSX_MAX

#define CSL_DSS_OVR2_ATTRIBUTES2_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR2_ATTRIBUTES2_POSY_MASK

#define CSL_DSS_OVR2_ATTRIBUTES2_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_OVR2_ATTRIBUTES2_POSY_SHIFT

#define CSL_DSS_OVR2_ATTRIBUTES2_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR2_ATTRIBUTES2_POSY_MAX

#define CSL_DSS_OVR2_ATTRIBUTES2_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR2_SECURE_SECURE_MASK

#define CSL_DSS_OVR2_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_OVR2_SECURE_SECURE_SHIFT

#define CSL_DSS_OVR2_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR2_SECURE_SECURE_MAX

#define CSL_DSS_OVR2_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_OVR2_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_OVR2_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_OVR2_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_OVR2_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_OVR2_SECURE_RESERVED_MASK

#define CSL_DSS_OVR2_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_OVR2_SECURE_RESERVED_SHIFT

#define CSL_DSS_OVR2_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR2_SECURE_RESERVED_MAX

#define CSL_DSS_OVR2_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VP2_CONFIG

#define CSL_DSS_VP2_CONFIG   (0x00000000U)

◆ CSL_DSS_VP2_CONTROL

#define CSL_DSS_VP2_CONTROL   (0x00000004U)

◆ CSL_DSS_VP2_CSC_COEF0

#define CSL_DSS_VP2_CSC_COEF0   (0x00000008U)

◆ CSL_DSS_VP2_CSC_COEF1

#define CSL_DSS_VP2_CSC_COEF1   (0x0000000CU)

◆ CSL_DSS_VP2_CSC_COEF2

#define CSL_DSS_VP2_CSC_COEF2   (0x00000010U)

◆ CSL_DSS_VP2_DATA_CYCLE_0

#define CSL_DSS_VP2_DATA_CYCLE_0   (0x00000014U)

◆ CSL_DSS_VP2_DATA_CYCLE_1

#define CSL_DSS_VP2_DATA_CYCLE_1   (0x00000018U)

◆ CSL_DSS_VP2_DATA_CYCLE_2

#define CSL_DSS_VP2_DATA_CYCLE_2   (0x0000001CU)

◆ CSL_DSS_VP2_LINE_NUMBER

#define CSL_DSS_VP2_LINE_NUMBER   (0x00000044U)

◆ CSL_DSS_VP2_POL_FREQ

#define CSL_DSS_VP2_POL_FREQ   (0x0000004CU)

◆ CSL_DSS_VP2_SIZE_SCREEN

#define CSL_DSS_VP2_SIZE_SCREEN   (0x00000050U)

◆ CSL_DSS_VP2_TIMING_H

#define CSL_DSS_VP2_TIMING_H   (0x00000054U)

◆ CSL_DSS_VP2_TIMING_V

#define CSL_DSS_VP2_TIMING_V   (0x00000058U)

◆ CSL_DSS_VP2_CSC_COEF3

#define CSL_DSS_VP2_CSC_COEF3   (0x0000005CU)

◆ CSL_DSS_VP2_CSC_COEF4

#define CSL_DSS_VP2_CSC_COEF4   (0x00000060U)

◆ CSL_DSS_VP2_CSC_COEF5

#define CSL_DSS_VP2_CSC_COEF5   (0x00000064U)

◆ CSL_DSS_VP2_CSC_COEF6

#define CSL_DSS_VP2_CSC_COEF6   (0x00000068U)

◆ CSL_DSS_VP2_CSC_COEF7

#define CSL_DSS_VP2_CSC_COEF7   (0x0000006CU)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES (   index)    (0x00000070U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE

#define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE (   index)    (0x00000090U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP2_SAFETY_POSITION

#define CSL_DSS_VP2_SAFETY_POSITION (   index)    (0x000000B0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP2_SAFETY_REF_SIGNATURE

#define CSL_DSS_VP2_SAFETY_REF_SIGNATURE (   index)    (0x000000D0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP2_SAFETY_SIZE

#define CSL_DSS_VP2_SAFETY_SIZE (   index)    (0x000000F0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP2_SAFETY_LFSR_SEED

#define CSL_DSS_VP2_SAFETY_LFSR_SEED   (0x00000110U)

◆ CSL_DSS_VP2_GAMMA_TABLE_0

#define CSL_DSS_VP2_GAMMA_TABLE_0   (0x00000120U)

◆ CSL_DSS_VP2_GAMMA_TABLE_1

#define CSL_DSS_VP2_GAMMA_TABLE_1   (0x00000124U)

◆ CSL_DSS_VP2_GAMMA_TABLE_2

#define CSL_DSS_VP2_GAMMA_TABLE_2   (0x00000128U)

◆ CSL_DSS_VP2_GAMMA_TABLE_3

#define CSL_DSS_VP2_GAMMA_TABLE_3   (0x0000012CU)

◆ CSL_DSS_VP2_GAMMA_TABLE_4

#define CSL_DSS_VP2_GAMMA_TABLE_4   (0x00000130U)

◆ CSL_DSS_VP2_GAMMA_TABLE_5

#define CSL_DSS_VP2_GAMMA_TABLE_5   (0x00000134U)

◆ CSL_DSS_VP2_GAMMA_TABLE_6

#define CSL_DSS_VP2_GAMMA_TABLE_6   (0x00000138U)

◆ CSL_DSS_VP2_GAMMA_TABLE_7

#define CSL_DSS_VP2_GAMMA_TABLE_7   (0x0000013CU)

◆ CSL_DSS_VP2_GAMMA_TABLE_8

#define CSL_DSS_VP2_GAMMA_TABLE_8   (0x00000140U)

◆ CSL_DSS_VP2_GAMMA_TABLE_9

#define CSL_DSS_VP2_GAMMA_TABLE_9   (0x00000144U)

◆ CSL_DSS_VP2_GAMMA_TABLE_10

#define CSL_DSS_VP2_GAMMA_TABLE_10   (0x00000148U)

◆ CSL_DSS_VP2_GAMMA_TABLE_11

#define CSL_DSS_VP2_GAMMA_TABLE_11   (0x0000014CU)

◆ CSL_DSS_VP2_GAMMA_TABLE_12

#define CSL_DSS_VP2_GAMMA_TABLE_12   (0x00000150U)

◆ CSL_DSS_VP2_GAMMA_TABLE_13

#define CSL_DSS_VP2_GAMMA_TABLE_13   (0x00000154U)

◆ CSL_DSS_VP2_GAMMA_TABLE_14

#define CSL_DSS_VP2_GAMMA_TABLE_14   (0x00000158U)

◆ CSL_DSS_VP2_GAMMA_TABLE_15

#define CSL_DSS_VP2_GAMMA_TABLE_15   (0x0000015CU)

◆ CSL_DSS_VP2_DSS_OLDI_CFG

#define CSL_DSS_VP2_DSS_OLDI_CFG   (0x00000160U)

◆ CSL_DSS_VP2_DSS_OLDI_STATUS

#define CSL_DSS_VP2_DSS_OLDI_STATUS   (0x00000164U)

◆ CSL_DSS_VP2_DSS_OLDI_LB

#define CSL_DSS_VP2_DSS_OLDI_LB   (0x00000168U)

◆ CSL_DSS_VP2_SECURE

#define CSL_DSS_VP2_SECURE   (0x00000178U)

◆ CSL_DSS_VP2_CONFIG_PIXELGATED_MASK

#define CSL_DSS_VP2_CONFIG_PIXELGATED_MASK   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_PIXELGATED_SHIFT

#define CSL_DSS_VP2_CONFIG_PIXELGATED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CONFIG_PIXELGATED_MAX

#define CSL_DSS_VP2_CONFIG_PIXELGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_PIXELGATED_VAL_PCLKTOGA

#define CSL_DSS_VP2_CONFIG_PIXELGATED_VAL_PCLKTOGA   (0x0U)

◆ CSL_DSS_VP2_CONFIG_PIXELGATED_VAL_PCLKTOGV

#define CSL_DSS_VP2_CONFIG_PIXELGATED_VAL_PCLKTOGV   (0x1U)

◆ CSL_DSS_VP2_CONFIG_DATAENABLEGATED_MASK

#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_MASK   (0x00000002U)

◆ CSL_DSS_VP2_CONFIG_DATAENABLEGATED_SHIFT

#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_SHIFT   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_DATAENABLEGATED_MAX

#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_DATAENABLEGATED_VAL_DEGDIS

#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_VAL_DEGDIS   (0x0U)

◆ CSL_DSS_VP2_CONFIG_DATAENABLEGATED_VAL_DEGENB

#define CSL_DSS_VP2_CONFIG_DATAENABLEGATED_VAL_DEGENB   (0x1U)

◆ CSL_DSS_VP2_CONFIG_GAMMAENABLE_MASK

#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_MASK   (0x00000004U)

◆ CSL_DSS_VP2_CONFIG_GAMMAENABLE_SHIFT

#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_SHIFT   (0x00000002U)

◆ CSL_DSS_VP2_CONFIG_GAMMAENABLE_MAX

#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_GAMMAENABLE_VAL_GAMMADIS

#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_VAL_GAMMADIS   (0x0U)

◆ CSL_DSS_VP2_CONFIG_GAMMAENABLE_VAL_GAMMAENB

#define CSL_DSS_VP2_CONFIG_GAMMAENABLE_VAL_GAMMAENB   (0x1U)

◆ CSL_DSS_VP2_CONFIG_HDMIMODE_MASK

#define CSL_DSS_VP2_CONFIG_HDMIMODE_MASK   (0x00000008U)

◆ CSL_DSS_VP2_CONFIG_HDMIMODE_SHIFT

#define CSL_DSS_VP2_CONFIG_HDMIMODE_SHIFT   (0x00000003U)

◆ CSL_DSS_VP2_CONFIG_HDMIMODE_MAX

#define CSL_DSS_VP2_CONFIG_HDMIMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_PIXELDATAGATED_MASK

#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_MASK   (0x00000010U)

◆ CSL_DSS_VP2_CONFIG_PIXELDATAGATED_SHIFT

#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_SHIFT   (0x00000004U)

◆ CSL_DSS_VP2_CONFIG_PIXELDATAGATED_MAX

#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_PIXELDATAGATED_VAL_PDGDIS

#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_VAL_PDGDIS   (0x0U)

◆ CSL_DSS_VP2_CONFIG_PIXELDATAGATED_VAL_PDGENB

#define CSL_DSS_VP2_CONFIG_PIXELDATAGATED_VAL_PDGENB   (0x1U)

◆ CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_MASK

#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_MASK   (0x00000020U)

◆ CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_SHIFT

#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_SHIFT   (0x00000005U)

◆ CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_MAX

#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS

#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS   (0x0U)

◆ CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_VAL_PCGENB

#define CSL_DSS_VP2_CONFIG_PIXELCLOCKGATED_VAL_PCGENB   (0x1U)

◆ CSL_DSS_VP2_CONFIG_HSYNCGATED_MASK

#define CSL_DSS_VP2_CONFIG_HSYNCGATED_MASK   (0x00000040U)

◆ CSL_DSS_VP2_CONFIG_HSYNCGATED_SHIFT

#define CSL_DSS_VP2_CONFIG_HSYNCGATED_SHIFT   (0x00000006U)

◆ CSL_DSS_VP2_CONFIG_HSYNCGATED_MAX

#define CSL_DSS_VP2_CONFIG_HSYNCGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_HSYNCGATED_VAL_HGDIS

#define CSL_DSS_VP2_CONFIG_HSYNCGATED_VAL_HGDIS   (0x0U)

◆ CSL_DSS_VP2_CONFIG_HSYNCGATED_VAL_HGENB

#define CSL_DSS_VP2_CONFIG_HSYNCGATED_VAL_HGENB   (0x1U)

◆ CSL_DSS_VP2_CONFIG_VSYNCGATED_MASK

#define CSL_DSS_VP2_CONFIG_VSYNCGATED_MASK   (0x00000080U)

◆ CSL_DSS_VP2_CONFIG_VSYNCGATED_SHIFT

#define CSL_DSS_VP2_CONFIG_VSYNCGATED_SHIFT   (0x00000007U)

◆ CSL_DSS_VP2_CONFIG_VSYNCGATED_MAX

#define CSL_DSS_VP2_CONFIG_VSYNCGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_VSYNCGATED_VAL_VGDIS

#define CSL_DSS_VP2_CONFIG_VSYNCGATED_VAL_VGDIS   (0x0U)

◆ CSL_DSS_VP2_CONFIG_VSYNCGATED_VAL_VGENB

#define CSL_DSS_VP2_CONFIG_VSYNCGATED_VAL_VGENB   (0x1U)

◆ CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_MASK

#define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_MASK   (0x00000100U)

◆ CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_SHIFT

#define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_SHIFT   (0x00000008U)

◆ CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_MAX

#define CSL_DSS_VP2_CONFIG_EXTERNALSYNCEN_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_RESERVED1_MASK

#define CSL_DSS_VP2_CONFIG_RESERVED1_MASK   (0x00007E00U)

◆ CSL_DSS_VP2_CONFIG_RESERVED1_SHIFT

#define CSL_DSS_VP2_CONFIG_RESERVED1_SHIFT   (0x00000009U)

◆ CSL_DSS_VP2_CONFIG_RESERVED1_MAX

#define CSL_DSS_VP2_CONFIG_RESERVED1_MAX   (0x0000003FU)

◆ CSL_DSS_VP2_CONFIG_CPR_MASK

#define CSL_DSS_VP2_CONFIG_CPR_MASK   (0x00008000U)

◆ CSL_DSS_VP2_CONFIG_CPR_SHIFT

#define CSL_DSS_VP2_CONFIG_CPR_SHIFT   (0x0000000FU)

◆ CSL_DSS_VP2_CONFIG_CPR_MAX

#define CSL_DSS_VP2_CONFIG_CPR_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_MASK

#define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_MASK   (0x00010000U)

◆ CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_SHIFT

#define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_MAX

#define CSL_DSS_VP2_CONFIG_BUFFERHANDSHAKE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_RESERVED2_MASK

#define CSL_DSS_VP2_CONFIG_RESERVED2_MASK   (0x000E0000U)

◆ CSL_DSS_VP2_CONFIG_RESERVED2_SHIFT

#define CSL_DSS_VP2_CONFIG_RESERVED2_SHIFT   (0x00000011U)

◆ CSL_DSS_VP2_CONFIG_RESERVED2_MAX

#define CSL_DSS_VP2_CONFIG_RESERVED2_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CONFIG_BT656ENABLE_MASK

#define CSL_DSS_VP2_CONFIG_BT656ENABLE_MASK   (0x00100000U)

◆ CSL_DSS_VP2_CONFIG_BT656ENABLE_SHIFT

#define CSL_DSS_VP2_CONFIG_BT656ENABLE_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_CONFIG_BT656ENABLE_MAX

#define CSL_DSS_VP2_CONFIG_BT656ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_BT656ENABLE_VAL_DISABLE

#define CSL_DSS_VP2_CONFIG_BT656ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP2_CONFIG_BT656ENABLE_VAL_ENABLE

#define CSL_DSS_VP2_CONFIG_BT656ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP2_CONFIG_BT1120ENABLE_MASK

#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_MASK   (0x00200000U)

◆ CSL_DSS_VP2_CONFIG_BT1120ENABLE_SHIFT

#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_SHIFT   (0x00000015U)

◆ CSL_DSS_VP2_CONFIG_BT1120ENABLE_MAX

#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_BT1120ENABLE_VAL_DISABLE

#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP2_CONFIG_BT1120ENABLE_VAL_ENABLE

#define CSL_DSS_VP2_CONFIG_BT1120ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_MASK

#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_MASK   (0x00400000U)

◆ CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_SHIFT

#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_SHIFT   (0x00000016U)

◆ CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_MAX

#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE

#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE

#define CSL_DSS_VP2_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP2_CONFIG_FIDFIRST_MASK

#define CSL_DSS_VP2_CONFIG_FIDFIRST_MASK   (0x00800000U)

◆ CSL_DSS_VP2_CONFIG_FIDFIRST_SHIFT

#define CSL_DSS_VP2_CONFIG_FIDFIRST_SHIFT   (0x00000017U)

◆ CSL_DSS_VP2_CONFIG_FIDFIRST_MAX

#define CSL_DSS_VP2_CONFIG_FIDFIRST_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_FIDFIRST_VAL_EVEN

#define CSL_DSS_VP2_CONFIG_FIDFIRST_VAL_EVEN   (0x0U)

◆ CSL_DSS_VP2_CONFIG_FIDFIRST_VAL_ODD

#define CSL_DSS_VP2_CONFIG_FIDFIRST_VAL_ODD   (0x1U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVENABLE_MASK

#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_MASK   (0x01000000U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVENABLE_SHIFT

#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_SHIFT   (0x00000018U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVENABLE_MAX

#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_VP2_CONFIG_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_VP2_CONFIG_FULLRANGE_MASK

#define CSL_DSS_VP2_CONFIG_FULLRANGE_MASK   (0x02000000U)

◆ CSL_DSS_VP2_CONFIG_FULLRANGE_SHIFT

#define CSL_DSS_VP2_CONFIG_FULLRANGE_SHIFT   (0x00000019U)

◆ CSL_DSS_VP2_CONFIG_FULLRANGE_MAX

#define CSL_DSS_VP2_CONFIG_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_VP2_CONFIG_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_VP2_CONFIG_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_VP2_CONFIG_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVPOS_MASK

#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_MASK   (0x04000000U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVPOS_SHIFT

#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_SHIFT   (0x0000001AU)

◆ CSL_DSS_VP2_CONFIG_COLORCONVPOS_MAX

#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA

#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA   (0x0U)

◆ CSL_DSS_VP2_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA

#define CSL_DSS_VP2_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA   (0x1U)

◆ CSL_DSS_VP2_CONFIG_RESERVED3_MASK

#define CSL_DSS_VP2_CONFIG_RESERVED3_MASK   (0xF8000000U)

◆ CSL_DSS_VP2_CONFIG_RESERVED3_SHIFT

#define CSL_DSS_VP2_CONFIG_RESERVED3_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP2_CONFIG_RESERVED3_MAX

#define CSL_DSS_VP2_CONFIG_RESERVED3_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_CONTROL_ENABLE_MASK

#define CSL_DSS_VP2_CONTROL_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_ENABLE_SHIFT

#define CSL_DSS_VP2_CONTROL_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CONTROL_ENABLE_MAX

#define CSL_DSS_VP2_CONTROL_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_ENABLE_VAL_LCDOPDIS

#define CSL_DSS_VP2_CONTROL_ENABLE_VAL_LCDOPDIS   (0x0U)

◆ CSL_DSS_VP2_CONTROL_ENABLE_VAL_LCDOPENB

#define CSL_DSS_VP2_CONTROL_ENABLE_VAL_LCDOPENB   (0x1U)

◆ CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_MASK

#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_MASK   (0x00000002U)

◆ CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_SHIFT

#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_SHIFT   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_MAX

#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS

#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS   (0x0U)

◆ CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN

#define CSL_DSS_VP2_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN   (0x1U)

◆ CSL_DSS_VP2_CONTROL_MONOCOLOR_MASK

#define CSL_DSS_VP2_CONTROL_MONOCOLOR_MASK   (0x00000004U)

◆ CSL_DSS_VP2_CONTROL_MONOCOLOR_SHIFT

#define CSL_DSS_VP2_CONTROL_MONOCOLOR_SHIFT   (0x00000002U)

◆ CSL_DSS_VP2_CONTROL_MONOCOLOR_MAX

#define CSL_DSS_VP2_CONTROL_MONOCOLOR_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_STN_MASK

#define CSL_DSS_VP2_CONTROL_STN_MASK   (0x00000008U)

◆ CSL_DSS_VP2_CONTROL_STN_SHIFT

#define CSL_DSS_VP2_CONTROL_STN_SHIFT   (0x00000003U)

◆ CSL_DSS_VP2_CONTROL_STN_MAX

#define CSL_DSS_VP2_CONTROL_STN_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_M8B_MASK

#define CSL_DSS_VP2_CONTROL_M8B_MASK   (0x00000010U)

◆ CSL_DSS_VP2_CONTROL_M8B_SHIFT

#define CSL_DSS_VP2_CONTROL_M8B_SHIFT   (0x00000004U)

◆ CSL_DSS_VP2_CONTROL_M8B_MAX

#define CSL_DSS_VP2_CONTROL_M8B_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_GOBIT_MASK

#define CSL_DSS_VP2_CONTROL_GOBIT_MASK   (0x00000020U)

◆ CSL_DSS_VP2_CONTROL_GOBIT_SHIFT

#define CSL_DSS_VP2_CONTROL_GOBIT_SHIFT   (0x00000005U)

◆ CSL_DSS_VP2_CONTROL_GOBIT_MAX

#define CSL_DSS_VP2_CONTROL_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_GOBIT_VAL_HFUISR

#define CSL_DSS_VP2_CONTROL_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_VP2_CONTROL_GOBIT_VAL_UFPSR

#define CSL_DSS_VP2_CONTROL_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_VP2_CONTROL_DPIENABLE_MASK

#define CSL_DSS_VP2_CONTROL_DPIENABLE_MASK   (0x00000040U)

◆ CSL_DSS_VP2_CONTROL_DPIENABLE_SHIFT

#define CSL_DSS_VP2_CONTROL_DPIENABLE_SHIFT   (0x00000006U)

◆ CSL_DSS_VP2_CONTROL_DPIENABLE_MAX

#define CSL_DSS_VP2_CONTROL_DPIENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_DPIENABLE_VAL_DPIOPDIS

#define CSL_DSS_VP2_CONTROL_DPIENABLE_VAL_DPIOPDIS   (0x0U)

◆ CSL_DSS_VP2_CONTROL_DPIENABLE_VAL_DPIOPENB

#define CSL_DSS_VP2_CONTROL_DPIENABLE_VAL_DPIOPENB   (0x1U)

◆ CSL_DSS_VP2_CONTROL_STDITHERENABLE_MASK

#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_MASK   (0x00000080U)

◆ CSL_DSS_VP2_CONTROL_STDITHERENABLE_SHIFT

#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_SHIFT   (0x00000007U)

◆ CSL_DSS_VP2_CONTROL_STDITHERENABLE_MAX

#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_STDITHERENABLE_VAL_STDITHDIS

#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_VAL_STDITHDIS   (0x0U)

◆ CSL_DSS_VP2_CONTROL_STDITHERENABLE_VAL_STDITHENB

#define CSL_DSS_VP2_CONTROL_STDITHERENABLE_VAL_STDITHENB   (0x1U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_MASK

#define CSL_DSS_VP2_CONTROL_DATALINES_MASK   (0x00000700U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_SHIFT

#define CSL_DSS_VP2_CONTROL_DATALINES_SHIFT   (0x00000008U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_MAX

#define CSL_DSS_VP2_CONTROL_DATALINES_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB12B

#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB12B   (0x0U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB16B

#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB16B   (0x1U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB18B

#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB18B   (0x2U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB24B

#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB24B   (0x3U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB30B

#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB30B   (0x4U)

◆ CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB36B

#define CSL_DSS_VP2_CONTROL_DATALINES_VAL_OALSB36B   (0x5U)

◆ CSL_DSS_VP2_CONTROL_STALLMODE_MASK

#define CSL_DSS_VP2_CONTROL_STALLMODE_MASK   (0x00000800U)

◆ CSL_DSS_VP2_CONTROL_STALLMODE_SHIFT

#define CSL_DSS_VP2_CONTROL_STALLMODE_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP2_CONTROL_STALLMODE_MAX

#define CSL_DSS_VP2_CONTROL_STALLMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_STALLMODE_VAL_STALLDIS

#define CSL_DSS_VP2_CONTROL_STALLMODE_VAL_STALLDIS   (0x0U)

◆ CSL_DSS_VP2_CONTROL_STALLMODE_VAL_STALLENB

#define CSL_DSS_VP2_CONTROL_STALLMODE_VAL_STALLENB   (0x1U)

◆ CSL_DSS_VP2_CONTROL_STALLMODETYPE_MASK

#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_MASK   (0x00001000U)

◆ CSL_DSS_VP2_CONTROL_STALLMODETYPE_SHIFT

#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP2_CONTROL_STALLMODETYPE_MAX

#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_STALLMODETYPE_VAL_COMMANDMODE

#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_VAL_COMMANDMODE   (0x0U)

◆ CSL_DSS_VP2_CONTROL_STALLMODETYPE_VAL_VIDEOMODE

#define CSL_DSS_VP2_CONTROL_STALLMODETYPE_VAL_VIDEOMODE   (0x1U)

◆ CSL_DSS_VP2_CONTROL_RESERVED3_MASK

#define CSL_DSS_VP2_CONTROL_RESERVED3_MASK   (0x00002000U)

◆ CSL_DSS_VP2_CONTROL_RESERVED3_SHIFT

#define CSL_DSS_VP2_CONTROL_RESERVED3_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP2_CONTROL_RESERVED3_MAX

#define CSL_DSS_VP2_CONTROL_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_HT_MASK

#define CSL_DSS_VP2_CONTROL_HT_MASK   (0x0001C000U)

◆ CSL_DSS_VP2_CONTROL_HT_SHIFT

#define CSL_DSS_VP2_CONTROL_HT_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP2_CONTROL_HT_MAX

#define CSL_DSS_VP2_CONTROL_HT_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CONTROL_RESERVED1_MASK

#define CSL_DSS_VP2_CONTROL_RESERVED1_MASK   (0x000E0000U)

◆ CSL_DSS_VP2_CONTROL_RESERVED1_SHIFT

#define CSL_DSS_VP2_CONTROL_RESERVED1_SHIFT   (0x00000011U)

◆ CSL_DSS_VP2_CONTROL_RESERVED1_MAX

#define CSL_DSS_VP2_CONTROL_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CONTROL_TDMENABLE_MASK

#define CSL_DSS_VP2_CONTROL_TDMENABLE_MASK   (0x00100000U)

◆ CSL_DSS_VP2_CONTROL_TDMENABLE_SHIFT

#define CSL_DSS_VP2_CONTROL_TDMENABLE_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_CONTROL_TDMENABLE_MAX

#define CSL_DSS_VP2_CONTROL_TDMENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_CONTROL_TDMENABLE_VAL_TDMDIS

#define CSL_DSS_VP2_CONTROL_TDMENABLE_VAL_TDMDIS   (0x0U)

◆ CSL_DSS_VP2_CONTROL_TDMENABLE_VAL_TDMENB

#define CSL_DSS_VP2_CONTROL_TDMENABLE_VAL_TDMENB   (0x1U)

◆ CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_MASK

#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_MASK   (0x00600000U)

◆ CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_SHIFT

#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_SHIFT   (0x00000015U)

◆ CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_MAX

#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_MAX   (0x00000003U)

◆ CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT

#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT   (0x0U)

◆ CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT

#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT   (0x1U)

◆ CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT

#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT   (0x2U)

◆ CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT

#define CSL_DSS_VP2_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT   (0x3U)

◆ CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_MASK

#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_MASK   (0x01800000U)

◆ CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_SHIFT

#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_SHIFT   (0x00000017U)

◆ CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_MAX

#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_MAX   (0x00000003U)

◆ CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX

#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX   (0x0U)

◆ CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX

#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX   (0x1U)

◆ CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX

#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX   (0x2U)

◆ CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX

#define CSL_DSS_VP2_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX   (0x3U)

◆ CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_MASK

#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_MASK   (0x06000000U)

◆ CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_SHIFT

#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_SHIFT   (0x00000019U)

◆ CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_MAX

#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_MAX   (0x00000003U)

◆ CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL

#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL   (0x0U)

◆ CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL

#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL   (0x1U)

◆ CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED

#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED   (0x2U)

◆ CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_RES

#define CSL_DSS_VP2_CONTROL_TDMUNUSEDBITS_VAL_RES   (0x3U)

◆ CSL_DSS_VP2_CONTROL_RESERVED_MASK

#define CSL_DSS_VP2_CONTROL_RESERVED_MASK   (0x38000000U)

◆ CSL_DSS_VP2_CONTROL_RESERVED_SHIFT

#define CSL_DSS_VP2_CONTROL_RESERVED_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP2_CONTROL_RESERVED_MAX

#define CSL_DSS_VP2_CONTROL_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK

#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK   (0xC0000000U)

◆ CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT

#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT   (0x0000001EU)

◆ CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX

#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX   (0x00000003U)

◆ CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME

#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME   (0x0U)

◆ CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES

#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES   (0x1U)

◆ CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES

#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES   (0x2U)

◆ CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED

#define CSL_DSS_VP2_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VP2_CSC_COEF0_C00_MASK

#define CSL_DSS_VP2_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF0_C00_SHIFT

#define CSL_DSS_VP2_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CSC_COEF0_C00_MAX

#define CSL_DSS_VP2_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_VP2_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP2_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_VP2_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_CSC_COEF0_C01_MASK

#define CSL_DSS_VP2_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_VP2_CSC_COEF0_C01_SHIFT

#define CSL_DSS_VP2_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_CSC_COEF0_C01_MAX

#define CSL_DSS_VP2_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_VP2_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP2_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_VP2_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_CSC_COEF1_C02_MASK

#define CSL_DSS_VP2_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF1_C02_SHIFT

#define CSL_DSS_VP2_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CSC_COEF1_C02_MAX

#define CSL_DSS_VP2_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_VP2_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP2_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_VP2_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_CSC_COEF1_C10_MASK

#define CSL_DSS_VP2_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_VP2_CSC_COEF1_C10_SHIFT

#define CSL_DSS_VP2_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_CSC_COEF1_C10_MAX

#define CSL_DSS_VP2_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_VP2_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP2_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_VP2_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_CSC_COEF2_C11_MASK

#define CSL_DSS_VP2_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF2_C11_SHIFT

#define CSL_DSS_VP2_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CSC_COEF2_C11_MAX

#define CSL_DSS_VP2_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_VP2_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP2_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_VP2_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_CSC_COEF2_C12_MASK

#define CSL_DSS_VP2_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_VP2_CSC_COEF2_C12_SHIFT

#define CSL_DSS_VP2_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_CSC_COEF2_C12_MAX

#define CSL_DSS_VP2_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_VP2_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP2_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_VP2_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_MASK

#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_MAX

#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_MASK

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_MAX

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_MASK

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_MAX

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_MASK

#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_MAX

#define CSL_DSS_VP2_DATA_CYCLE_0_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_MASK

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_MAX

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP2_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_MASK

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_MAX

#define CSL_DSS_VP2_DATA_CYCLE_0_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_MASK

#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_MAX

#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_MASK

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_MAX

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_MASK

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_MAX

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_MASK

#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_MAX

#define CSL_DSS_VP2_DATA_CYCLE_1_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_MASK

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_MAX

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP2_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_MASK

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_MAX

#define CSL_DSS_VP2_DATA_CYCLE_1_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_MASK

#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_MAX

#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_MASK

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_MAX

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_MASK

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_MAX

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_MASK

#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_MAX

#define CSL_DSS_VP2_DATA_CYCLE_2_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_MASK

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_MAX

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP2_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_MASK

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_SHIFT

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_MAX

#define CSL_DSS_VP2_DATA_CYCLE_2_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_MASK

#define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_MASK   (0x00003FFFU)

◆ CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_SHIFT

#define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_MAX

#define CSL_DSS_VP2_LINE_NUMBER_LINENUMBER_MAX   (0x00003FFFU)

◆ CSL_DSS_VP2_LINE_NUMBER_RESERVED_MASK

#define CSL_DSS_VP2_LINE_NUMBER_RESERVED_MASK   (0xFFFFC000U)

◆ CSL_DSS_VP2_LINE_NUMBER_RESERVED_SHIFT

#define CSL_DSS_VP2_LINE_NUMBER_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP2_LINE_NUMBER_RESERVED_MAX

#define CSL_DSS_VP2_LINE_NUMBER_RESERVED_MAX   (0x0003FFFFU)

◆ CSL_DSS_VP2_POL_FREQ_ACB_MASK

#define CSL_DSS_VP2_POL_FREQ_ACB_MASK   (0x000000FFU)

◆ CSL_DSS_VP2_POL_FREQ_ACB_SHIFT

#define CSL_DSS_VP2_POL_FREQ_ACB_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_POL_FREQ_ACB_MAX

#define CSL_DSS_VP2_POL_FREQ_ACB_MAX   (0x000000FFU)

◆ CSL_DSS_VP2_POL_FREQ_ACBI_MASK

#define CSL_DSS_VP2_POL_FREQ_ACBI_MASK   (0x00000F00U)

◆ CSL_DSS_VP2_POL_FREQ_ACBI_SHIFT

#define CSL_DSS_VP2_POL_FREQ_ACBI_SHIFT   (0x00000008U)

◆ CSL_DSS_VP2_POL_FREQ_ACBI_MAX

#define CSL_DSS_VP2_POL_FREQ_ACBI_MAX   (0x0000000FU)

◆ CSL_DSS_VP2_POL_FREQ_IVS_MASK

#define CSL_DSS_VP2_POL_FREQ_IVS_MASK   (0x00001000U)

◆ CSL_DSS_VP2_POL_FREQ_IVS_SHIFT

#define CSL_DSS_VP2_POL_FREQ_IVS_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP2_POL_FREQ_IVS_MAX

#define CSL_DSS_VP2_POL_FREQ_IVS_MAX   (0x00000001U)

◆ CSL_DSS_VP2_POL_FREQ_IVS_VAL_FCKPINAH

#define CSL_DSS_VP2_POL_FREQ_IVS_VAL_FCKPINAH   (0x0U)

◆ CSL_DSS_VP2_POL_FREQ_IVS_VAL_FCKPINAL

#define CSL_DSS_VP2_POL_FREQ_IVS_VAL_FCKPINAL   (0x1U)

◆ CSL_DSS_VP2_POL_FREQ_IHS_MASK

#define CSL_DSS_VP2_POL_FREQ_IHS_MASK   (0x00002000U)

◆ CSL_DSS_VP2_POL_FREQ_IHS_SHIFT

#define CSL_DSS_VP2_POL_FREQ_IHS_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP2_POL_FREQ_IHS_MAX

#define CSL_DSS_VP2_POL_FREQ_IHS_MAX   (0x00000001U)

◆ CSL_DSS_VP2_POL_FREQ_IHS_VAL_LCKPINAH

#define CSL_DSS_VP2_POL_FREQ_IHS_VAL_LCKPINAH   (0x0U)

◆ CSL_DSS_VP2_POL_FREQ_IHS_VAL_LCKPINAL

#define CSL_DSS_VP2_POL_FREQ_IHS_VAL_LCKPINAL   (0x1U)

◆ CSL_DSS_VP2_POL_FREQ_IPC_MASK

#define CSL_DSS_VP2_POL_FREQ_IPC_MASK   (0x00004000U)

◆ CSL_DSS_VP2_POL_FREQ_IPC_SHIFT

#define CSL_DSS_VP2_POL_FREQ_IPC_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP2_POL_FREQ_IPC_MAX

#define CSL_DSS_VP2_POL_FREQ_IPC_MAX   (0x00000001U)

◆ CSL_DSS_VP2_POL_FREQ_IPC_VAL_DRPCK

#define CSL_DSS_VP2_POL_FREQ_IPC_VAL_DRPCK   (0x0U)

◆ CSL_DSS_VP2_POL_FREQ_IPC_VAL_DFPCK

#define CSL_DSS_VP2_POL_FREQ_IPC_VAL_DFPCK   (0x1U)

◆ CSL_DSS_VP2_POL_FREQ_IEO_MASK

#define CSL_DSS_VP2_POL_FREQ_IEO_MASK   (0x00008000U)

◆ CSL_DSS_VP2_POL_FREQ_IEO_SHIFT

#define CSL_DSS_VP2_POL_FREQ_IEO_SHIFT   (0x0000000FU)

◆ CSL_DSS_VP2_POL_FREQ_IEO_MAX

#define CSL_DSS_VP2_POL_FREQ_IEO_MAX   (0x00000001U)

◆ CSL_DSS_VP2_POL_FREQ_IEO_VAL_ACBAHIGH

#define CSL_DSS_VP2_POL_FREQ_IEO_VAL_ACBAHIGH   (0x0U)

◆ CSL_DSS_VP2_POL_FREQ_IEO_VAL_ACBALOW

#define CSL_DSS_VP2_POL_FREQ_IEO_VAL_ACBALOW   (0x1U)

◆ CSL_DSS_VP2_POL_FREQ_RF_MASK

#define CSL_DSS_VP2_POL_FREQ_RF_MASK   (0x00010000U)

◆ CSL_DSS_VP2_POL_FREQ_RF_SHIFT

#define CSL_DSS_VP2_POL_FREQ_RF_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_POL_FREQ_RF_MAX

#define CSL_DSS_VP2_POL_FREQ_RF_MAX   (0x00000001U)

◆ CSL_DSS_VP2_POL_FREQ_RF_VAL_DFEDPCK

#define CSL_DSS_VP2_POL_FREQ_RF_VAL_DFEDPCK   (0x0U)

◆ CSL_DSS_VP2_POL_FREQ_RF_VAL_DRIEDPCK

#define CSL_DSS_VP2_POL_FREQ_RF_VAL_DRIEDPCK   (0x1U)

◆ CSL_DSS_VP2_POL_FREQ_ONOFF_MASK

#define CSL_DSS_VP2_POL_FREQ_ONOFF_MASK   (0x00020000U)

◆ CSL_DSS_VP2_POL_FREQ_ONOFF_SHIFT

#define CSL_DSS_VP2_POL_FREQ_ONOFF_SHIFT   (0x00000011U)

◆ CSL_DSS_VP2_POL_FREQ_ONOFF_MAX

#define CSL_DSS_VP2_POL_FREQ_ONOFF_MAX   (0x00000001U)

◆ CSL_DSS_VP2_POL_FREQ_ONOFF_VAL_DOPEDPCK

#define CSL_DSS_VP2_POL_FREQ_ONOFF_VAL_DOPEDPCK   (0x0U)

◆ CSL_DSS_VP2_POL_FREQ_ONOFF_VAL_DBIT16

#define CSL_DSS_VP2_POL_FREQ_ONOFF_VAL_DBIT16   (0x1U)

◆ CSL_DSS_VP2_POL_FREQ_ALIGN_MASK

#define CSL_DSS_VP2_POL_FREQ_ALIGN_MASK   (0x00040000U)

◆ CSL_DSS_VP2_POL_FREQ_ALIGN_SHIFT

#define CSL_DSS_VP2_POL_FREQ_ALIGN_SHIFT   (0x00000012U)

◆ CSL_DSS_VP2_POL_FREQ_ALIGN_MAX

#define CSL_DSS_VP2_POL_FREQ_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_VP2_POL_FREQ_ALIGN_VAL_NOTALIGNED

#define CSL_DSS_VP2_POL_FREQ_ALIGN_VAL_NOTALIGNED   (0x0U)

◆ CSL_DSS_VP2_POL_FREQ_ALIGN_VAL_ALIGNED

#define CSL_DSS_VP2_POL_FREQ_ALIGN_VAL_ALIGNED   (0x1U)

◆ CSL_DSS_VP2_POL_FREQ_RESERVED_MASK

#define CSL_DSS_VP2_POL_FREQ_RESERVED_MASK   (0xFFF80000U)

◆ CSL_DSS_VP2_POL_FREQ_RESERVED_SHIFT

#define CSL_DSS_VP2_POL_FREQ_RESERVED_SHIFT   (0x00000013U)

◆ CSL_DSS_VP2_POL_FREQ_RESERVED_MAX

#define CSL_DSS_VP2_POL_FREQ_RESERVED_MAX   (0x00001FFFU)

◆ CSL_DSS_VP2_SIZE_SCREEN_PPL_MASK

#define CSL_DSS_VP2_SIZE_SCREEN_PPL_MASK   (0x00003FFFU)

◆ CSL_DSS_VP2_SIZE_SCREEN_PPL_SHIFT

#define CSL_DSS_VP2_SIZE_SCREEN_PPL_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_SIZE_SCREEN_PPL_MAX

#define CSL_DSS_VP2_SIZE_SCREEN_PPL_MAX   (0x00003FFFU)

◆ CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_MASK

#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_MASK   (0x0000C000U)

◆ CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_SHIFT

#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_MAX

#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_MAX   (0x00000003U)

◆ CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_SAME

#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_SAME   (0x0U)

◆ CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE

#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE   (0x1U)

◆ CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE

#define CSL_DSS_VP2_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE   (0x2U)

◆ CSL_DSS_VP2_SIZE_SCREEN_LPP_MASK

#define CSL_DSS_VP2_SIZE_SCREEN_LPP_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP2_SIZE_SCREEN_LPP_SHIFT

#define CSL_DSS_VP2_SIZE_SCREEN_LPP_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_SIZE_SCREEN_LPP_MAX

#define CSL_DSS_VP2_SIZE_SCREEN_LPP_MAX   (0x00003FFFU)

◆ CSL_DSS_VP2_TIMING_H_HSW_MASK

#define CSL_DSS_VP2_TIMING_H_HSW_MASK   (0x000000FFU)

◆ CSL_DSS_VP2_TIMING_H_HSW_SHIFT

#define CSL_DSS_VP2_TIMING_H_HSW_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_TIMING_H_HSW_MAX

#define CSL_DSS_VP2_TIMING_H_HSW_MAX   (0x000000FFU)

◆ CSL_DSS_VP2_TIMING_H_HFP_MASK

#define CSL_DSS_VP2_TIMING_H_HFP_MASK   (0x000FFF00U)

◆ CSL_DSS_VP2_TIMING_H_HFP_SHIFT

#define CSL_DSS_VP2_TIMING_H_HFP_SHIFT   (0x00000008U)

◆ CSL_DSS_VP2_TIMING_H_HFP_MAX

#define CSL_DSS_VP2_TIMING_H_HFP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP2_TIMING_H_HBP_MASK

#define CSL_DSS_VP2_TIMING_H_HBP_MASK   (0xFFF00000U)

◆ CSL_DSS_VP2_TIMING_H_HBP_SHIFT

#define CSL_DSS_VP2_TIMING_H_HBP_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_TIMING_H_HBP_MAX

#define CSL_DSS_VP2_TIMING_H_HBP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP2_TIMING_V_VSW_MASK

#define CSL_DSS_VP2_TIMING_V_VSW_MASK   (0x000000FFU)

◆ CSL_DSS_VP2_TIMING_V_VSW_SHIFT

#define CSL_DSS_VP2_TIMING_V_VSW_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_TIMING_V_VSW_MAX

#define CSL_DSS_VP2_TIMING_V_VSW_MAX   (0x000000FFU)

◆ CSL_DSS_VP2_TIMING_V_VFP_MASK

#define CSL_DSS_VP2_TIMING_V_VFP_MASK   (0x000FFF00U)

◆ CSL_DSS_VP2_TIMING_V_VFP_SHIFT

#define CSL_DSS_VP2_TIMING_V_VFP_SHIFT   (0x00000008U)

◆ CSL_DSS_VP2_TIMING_V_VFP_MAX

#define CSL_DSS_VP2_TIMING_V_VFP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP2_TIMING_V_VBP_MASK

#define CSL_DSS_VP2_TIMING_V_VBP_MASK   (0xFFF00000U)

◆ CSL_DSS_VP2_TIMING_V_VBP_SHIFT

#define CSL_DSS_VP2_TIMING_V_VBP_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_TIMING_V_VBP_MAX

#define CSL_DSS_VP2_TIMING_V_VBP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP2_CSC_COEF3_C20_MASK

#define CSL_DSS_VP2_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF3_C20_SHIFT

#define CSL_DSS_VP2_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CSC_COEF3_C20_MAX

#define CSL_DSS_VP2_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_VP2_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP2_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_VP2_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_CSC_COEF3_C21_MASK

#define CSL_DSS_VP2_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_VP2_CSC_COEF3_C21_SHIFT

#define CSL_DSS_VP2_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_CSC_COEF3_C21_MAX

#define CSL_DSS_VP2_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_VP2_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP2_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_VP2_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_VP2_CSC_COEF4_C22_MASK

#define CSL_DSS_VP2_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF4_C22_SHIFT

#define CSL_DSS_VP2_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CSC_COEF4_C22_MAX

#define CSL_DSS_VP2_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_VP2_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_VP2_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP2_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_VP2_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_VP2_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_VP2_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_VP2_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_VP2_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VP2_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_VP2_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP2_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_VP2_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_VP2_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_VP2_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VP2_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_VP2_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_VP2_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_VP2_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_VP2_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VP2_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_VP2_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP2_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_VP2_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_VP2_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_VP2_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VP2_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_VP2_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_VP2_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_VP2_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VP2_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_VP2_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP2_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_VP2_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_VP2_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_VP2_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_MASK

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_MAX

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP   (0x0U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_MASK

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_SHIFT

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_MAX

#define CSL_DSS_VP2_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)

◆ CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VP2_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_SAFETY_POSITION_POSX_MASK

#define CSL_DSS_VP2_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_VP2_SAFETY_POSITION_POSX_SHIFT

#define CSL_DSS_VP2_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_SAFETY_POSITION_POSX_MAX

#define CSL_DSS_VP2_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_VP2_SAFETY_POSITION_POSY_MASK

#define CSL_DSS_VP2_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP2_SAFETY_POSITION_POSY_SHIFT

#define CSL_DSS_VP2_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_SAFETY_POSITION_POSY_MAX

#define CSL_DSS_VP2_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VP2_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_SAFETY_SIZE_SIZEX_MASK

#define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VP2_SAFETY_SIZE_SIZEX_SHIFT

#define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_SAFETY_SIZE_SIZEX_MAX

#define CSL_DSS_VP2_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VP2_SAFETY_SIZE_SIZEY_MASK

#define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP2_SAFETY_SIZE_SIZEY_SHIFT

#define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VP2_SAFETY_SIZE_SIZEY_MAX

#define CSL_DSS_VP2_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_MASK

#define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_SHIFT

#define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_MAX

#define CSL_DSS_VP2_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_0_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_0_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_1_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_1_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_2_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_2_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_3_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_3_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_4_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_4_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_5_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_5_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_6_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_6_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_7_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_7_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_8_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_8_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_9_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_9_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_10_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_10_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_11_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_11_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_12_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_12_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_13_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_13_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_14_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_14_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_15_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_MASK

#define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_SHIFT

#define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_MAX

#define CSL_DSS_VP2_GAMMA_TABLE_15_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_MASK

#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_MASK   (0x00003FFFU)

◆ CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_SHIFT

#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_MAX

#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED1_MAX   (0x00003FFFU)

◆ CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_MASK

#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_MASK   (0xFFFFC000U)

◆ CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_SHIFT

#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_MAX

#define CSL_DSS_VP2_DSS_OLDI_CFG_RESERVED_MAX   (0x0003FFFFU)

◆ CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_MASK

#define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_SHIFT

#define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_MAX

#define CSL_DSS_VP2_DSS_OLDI_STATUS_RESERVED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_MASK

#define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_SHIFT

#define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_MAX

#define CSL_DSS_VP2_DSS_OLDI_LB_RESERVED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP2_SECURE_SECURE_MASK

#define CSL_DSS_VP2_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_VP2_SECURE_SECURE_SHIFT

#define CSL_DSS_VP2_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP2_SECURE_SECURE_MAX

#define CSL_DSS_VP2_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_VP2_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_VP2_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_VP2_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_VP2_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_VP2_SECURE_RESERVED_MASK

#define CSL_DSS_VP2_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VP2_SECURE_RESERVED_SHIFT

#define CSL_DSS_VP2_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VP2_SECURE_RESERVED_MAX

#define CSL_DSS_VP2_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_OVR3_CONFIG

#define CSL_DSS_OVR3_CONFIG   (0x00000000U)

◆ CSL_DSS_OVR3_VIRTUALVP

#define CSL_DSS_OVR3_VIRTUALVP   (0x00000004U)

◆ CSL_DSS_OVR3_DEFAULT_COLOR

#define CSL_DSS_OVR3_DEFAULT_COLOR   (0x00000008U)

◆ CSL_DSS_OVR3_DEFAULT_COLOR2

#define CSL_DSS_OVR3_DEFAULT_COLOR2   (0x0000000CU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX

#define CSL_DSS_OVR3_TRANS_COLOR_MAX   (0x00000010U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX2

#define CSL_DSS_OVR3_TRANS_COLOR_MAX2   (0x00000014U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN

#define CSL_DSS_OVR3_TRANS_COLOR_MIN   (0x00000018U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN2

#define CSL_DSS_OVR3_TRANS_COLOR_MIN2   (0x0000001CU)

◆ CSL_DSS_OVR3_ATTRIBUTES

#define CSL_DSS_OVR3_ATTRIBUTES (   index)    (0x00000020U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_OVR3_ATTRIBUTES2

#define CSL_DSS_OVR3_ATTRIBUTES2 (   index)    (0x00000034U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_OVR3_SECURE

#define CSL_DSS_OVR3_SECURE   (0x00000048U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED6_MASK

#define CSL_DSS_OVR3_CONFIG_RESERVED6_MASK   (0x00000001U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED6_SHIFT

#define CSL_DSS_OVR3_CONFIG_RESERVED6_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED6_MAX

#define CSL_DSS_OVR3_CONFIG_RESERVED6_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_CONFIG_COLORBAREN_MASK

#define CSL_DSS_OVR3_CONFIG_COLORBAREN_MASK   (0x00000002U)

◆ CSL_DSS_OVR3_CONFIG_COLORBAREN_SHIFT

#define CSL_DSS_OVR3_CONFIG_COLORBAREN_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR3_CONFIG_COLORBAREN_MAX

#define CSL_DSS_OVR3_CONFIG_COLORBAREN_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_CONFIG_COLORBAREN_VAL_COLORBARDIS

#define CSL_DSS_OVR3_CONFIG_COLORBAREN_VAL_COLORBARDIS   (0x0U)

◆ CSL_DSS_OVR3_CONFIG_COLORBAREN_VAL_COLORBAREN

#define CSL_DSS_OVR3_CONFIG_COLORBAREN_VAL_COLORBAREN   (0x1U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED_MASK

#define CSL_DSS_OVR3_CONFIG_RESERVED_MASK   (0x000003FCU)

◆ CSL_DSS_OVR3_CONFIG_RESERVED_SHIFT

#define CSL_DSS_OVR3_CONFIG_RESERVED_SHIFT   (0x00000002U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED_MAX

#define CSL_DSS_OVR3_CONFIG_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_MASK

#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_MASK   (0x00000400U)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_SHIFT

#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_SHIFT   (0x0000000AU)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_MAX

#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_VAL_DISTCK

#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_VAL_DISTCK   (0x0U)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_VAL_ENBTCK

#define CSL_DSS_OVR3_CONFIG_TCKLCDENABLE_VAL_ENBTCK   (0x1U)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_MASK

#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_MASK   (0x00000800U)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_SHIFT

#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_SHIFT   (0x0000000BU)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_MAX

#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_VAL_GDTK

#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_VAL_GDTK   (0x0U)

◆ CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_VAL_VSTK

#define CSL_DSS_OVR3_CONFIG_TCKLCDSELECTION_VAL_VSTK   (0x1U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED2_MASK

#define CSL_DSS_OVR3_CONFIG_RESERVED2_MASK   (0x00001000U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED2_SHIFT

#define CSL_DSS_OVR3_CONFIG_RESERVED2_SHIFT   (0x0000000CU)

◆ CSL_DSS_OVR3_CONFIG_RESERVED2_MAX

#define CSL_DSS_OVR3_CONFIG_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED3_MASK

#define CSL_DSS_OVR3_CONFIG_RESERVED3_MASK   (0x00002000U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED3_SHIFT

#define CSL_DSS_OVR3_CONFIG_RESERVED3_SHIFT   (0x0000000DU)

◆ CSL_DSS_OVR3_CONFIG_RESERVED3_MAX

#define CSL_DSS_OVR3_CONFIG_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED1_MASK

#define CSL_DSS_OVR3_CONFIG_RESERVED1_MASK   (0xFFFFC000U)

◆ CSL_DSS_OVR3_CONFIG_RESERVED1_SHIFT

#define CSL_DSS_OVR3_CONFIG_RESERVED1_SHIFT   (0x0000000EU)

◆ CSL_DSS_OVR3_CONFIG_RESERVED1_MAX

#define CSL_DSS_OVR3_CONFIG_RESERVED1_MAX   (0x0003FFFFU)

◆ CSL_DSS_OVR3_VIRTUALVP_PPL_MASK

#define CSL_DSS_OVR3_VIRTUALVP_PPL_MASK   (0x00003FFFU)

◆ CSL_DSS_OVR3_VIRTUALVP_PPL_SHIFT

#define CSL_DSS_OVR3_VIRTUALVP_PPL_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_VIRTUALVP_PPL_MAX

#define CSL_DSS_OVR3_VIRTUALVP_PPL_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR3_VIRTUALVP_LPP_MASK

#define CSL_DSS_OVR3_VIRTUALVP_LPP_MASK   (0x3FFF0000U)

◆ CSL_DSS_OVR3_VIRTUALVP_LPP_SHIFT

#define CSL_DSS_OVR3_VIRTUALVP_LPP_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR3_VIRTUALVP_LPP_MAX

#define CSL_DSS_OVR3_VIRTUALVP_LPP_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR3_VIRTUALVP_ENABLE_MASK

#define CSL_DSS_OVR3_VIRTUALVP_ENABLE_MASK   (0x80000000U)

◆ CSL_DSS_OVR3_VIRTUALVP_ENABLE_SHIFT

#define CSL_DSS_OVR3_VIRTUALVP_ENABLE_SHIFT   (0x0000001FU)

◆ CSL_DSS_OVR3_VIRTUALVP_ENABLE_MAX

#define CSL_DSS_OVR3_VIRTUALVP_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_MASK

#define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT

#define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_MAX

#define CSL_DSS_OVR3_DEFAULT_COLOR_DEFAULTCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_MASK

#define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_MASK   (0x0000FFFFU)

◆ CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT

#define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_MAX

#define CSL_DSS_OVR3_DEFAULT_COLOR2_DEFAULTCOLOR_MAX   (0x0000FFFFU)

◆ CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_MASK

#define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_SHIFT

#define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_MAX

#define CSL_DSS_OVR3_DEFAULT_COLOR2_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR3_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK   (0x0000000FU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX   (0x0000000FU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_MASK

#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_SHIFT

#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_MAX

#define CSL_DSS_OVR3_TRANS_COLOR_MAX2_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR3_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK   (0x0000000FU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX   (0x0000000FU)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_MASK

#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_SHIFT

#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_MAX

#define CSL_DSS_OVR3_TRANS_COLOR_MIN2_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_OVR3_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_OVR3_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_OVR3_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_MASK

#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_MASK   (0x0000001EU)

◆ CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_SHIFT

#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_MAX

#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_MAX   (0x0000000FU)

◆ CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VID1

#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VID1   (0x0U)

◆ CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIDL1

#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIDL1   (0x1U)

◆ CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VID2

#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VID2   (0x2U)

◆ CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIDL2

#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIDL2   (0x3U)

◆ CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIRTCH

#define CSL_DSS_OVR3_ATTRIBUTES_CHANNELIN_VAL_VIRTCH   (0x4U)

◆ CSL_DSS_OVR3_ATTRIBUTES2_POSX_MASK

#define CSL_DSS_OVR3_ATTRIBUTES2_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_OVR3_ATTRIBUTES2_POSX_SHIFT

#define CSL_DSS_OVR3_ATTRIBUTES2_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_ATTRIBUTES2_POSX_MAX

#define CSL_DSS_OVR3_ATTRIBUTES2_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR3_ATTRIBUTES2_POSY_MASK

#define CSL_DSS_OVR3_ATTRIBUTES2_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_OVR3_ATTRIBUTES2_POSY_SHIFT

#define CSL_DSS_OVR3_ATTRIBUTES2_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR3_ATTRIBUTES2_POSY_MAX

#define CSL_DSS_OVR3_ATTRIBUTES2_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR3_SECURE_SECURE_MASK

#define CSL_DSS_OVR3_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_OVR3_SECURE_SECURE_SHIFT

#define CSL_DSS_OVR3_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR3_SECURE_SECURE_MAX

#define CSL_DSS_OVR3_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_OVR3_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_OVR3_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_OVR3_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_OVR3_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_OVR3_SECURE_RESERVED_MASK

#define CSL_DSS_OVR3_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_OVR3_SECURE_RESERVED_SHIFT

#define CSL_DSS_OVR3_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR3_SECURE_RESERVED_MAX

#define CSL_DSS_OVR3_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VP3_CONFIG

#define CSL_DSS_VP3_CONFIG   (0x00000000U)

◆ CSL_DSS_VP3_CONTROL

#define CSL_DSS_VP3_CONTROL   (0x00000004U)

◆ CSL_DSS_VP3_CSC_COEF0

#define CSL_DSS_VP3_CSC_COEF0   (0x00000008U)

◆ CSL_DSS_VP3_CSC_COEF1

#define CSL_DSS_VP3_CSC_COEF1   (0x0000000CU)

◆ CSL_DSS_VP3_CSC_COEF2

#define CSL_DSS_VP3_CSC_COEF2   (0x00000010U)

◆ CSL_DSS_VP3_DATA_CYCLE_0

#define CSL_DSS_VP3_DATA_CYCLE_0   (0x00000014U)

◆ CSL_DSS_VP3_DATA_CYCLE_1

#define CSL_DSS_VP3_DATA_CYCLE_1   (0x00000018U)

◆ CSL_DSS_VP3_DATA_CYCLE_2

#define CSL_DSS_VP3_DATA_CYCLE_2   (0x0000001CU)

◆ CSL_DSS_VP3_LINE_NUMBER

#define CSL_DSS_VP3_LINE_NUMBER   (0x00000044U)

◆ CSL_DSS_VP3_POL_FREQ

#define CSL_DSS_VP3_POL_FREQ   (0x0000004CU)

◆ CSL_DSS_VP3_SIZE_SCREEN

#define CSL_DSS_VP3_SIZE_SCREEN   (0x00000050U)

◆ CSL_DSS_VP3_TIMING_H

#define CSL_DSS_VP3_TIMING_H   (0x00000054U)

◆ CSL_DSS_VP3_TIMING_V

#define CSL_DSS_VP3_TIMING_V   (0x00000058U)

◆ CSL_DSS_VP3_CSC_COEF3

#define CSL_DSS_VP3_CSC_COEF3   (0x0000005CU)

◆ CSL_DSS_VP3_CSC_COEF4

#define CSL_DSS_VP3_CSC_COEF4   (0x00000060U)

◆ CSL_DSS_VP3_CSC_COEF5

#define CSL_DSS_VP3_CSC_COEF5   (0x00000064U)

◆ CSL_DSS_VP3_CSC_COEF6

#define CSL_DSS_VP3_CSC_COEF6   (0x00000068U)

◆ CSL_DSS_VP3_CSC_COEF7

#define CSL_DSS_VP3_CSC_COEF7   (0x0000006CU)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES (   index)    (0x00000070U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE

#define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE (   index)    (0x00000090U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP3_SAFETY_POSITION

#define CSL_DSS_VP3_SAFETY_POSITION (   index)    (0x000000B0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP3_SAFETY_REF_SIGNATURE

#define CSL_DSS_VP3_SAFETY_REF_SIGNATURE (   index)    (0x000000D0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP3_SAFETY_SIZE

#define CSL_DSS_VP3_SAFETY_SIZE (   index)    (0x000000F0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP3_SAFETY_LFSR_SEED

#define CSL_DSS_VP3_SAFETY_LFSR_SEED   (0x00000110U)

◆ CSL_DSS_VP3_GAMMA_TABLE_0

#define CSL_DSS_VP3_GAMMA_TABLE_0   (0x00000120U)

◆ CSL_DSS_VP3_GAMMA_TABLE_1

#define CSL_DSS_VP3_GAMMA_TABLE_1   (0x00000124U)

◆ CSL_DSS_VP3_GAMMA_TABLE_2

#define CSL_DSS_VP3_GAMMA_TABLE_2   (0x00000128U)

◆ CSL_DSS_VP3_GAMMA_TABLE_3

#define CSL_DSS_VP3_GAMMA_TABLE_3   (0x0000012CU)

◆ CSL_DSS_VP3_GAMMA_TABLE_4

#define CSL_DSS_VP3_GAMMA_TABLE_4   (0x00000130U)

◆ CSL_DSS_VP3_GAMMA_TABLE_5

#define CSL_DSS_VP3_GAMMA_TABLE_5   (0x00000134U)

◆ CSL_DSS_VP3_GAMMA_TABLE_6

#define CSL_DSS_VP3_GAMMA_TABLE_6   (0x00000138U)

◆ CSL_DSS_VP3_GAMMA_TABLE_7

#define CSL_DSS_VP3_GAMMA_TABLE_7   (0x0000013CU)

◆ CSL_DSS_VP3_GAMMA_TABLE_8

#define CSL_DSS_VP3_GAMMA_TABLE_8   (0x00000140U)

◆ CSL_DSS_VP3_GAMMA_TABLE_9

#define CSL_DSS_VP3_GAMMA_TABLE_9   (0x00000144U)

◆ CSL_DSS_VP3_GAMMA_TABLE_10

#define CSL_DSS_VP3_GAMMA_TABLE_10   (0x00000148U)

◆ CSL_DSS_VP3_GAMMA_TABLE_11

#define CSL_DSS_VP3_GAMMA_TABLE_11   (0x0000014CU)

◆ CSL_DSS_VP3_GAMMA_TABLE_12

#define CSL_DSS_VP3_GAMMA_TABLE_12   (0x00000150U)

◆ CSL_DSS_VP3_GAMMA_TABLE_13

#define CSL_DSS_VP3_GAMMA_TABLE_13   (0x00000154U)

◆ CSL_DSS_VP3_GAMMA_TABLE_14

#define CSL_DSS_VP3_GAMMA_TABLE_14   (0x00000158U)

◆ CSL_DSS_VP3_GAMMA_TABLE_15

#define CSL_DSS_VP3_GAMMA_TABLE_15   (0x0000015CU)

◆ CSL_DSS_VP3_DSS_OLDI_CFG

#define CSL_DSS_VP3_DSS_OLDI_CFG   (0x00000160U)

◆ CSL_DSS_VP3_DSS_OLDI_STATUS

#define CSL_DSS_VP3_DSS_OLDI_STATUS   (0x00000164U)

◆ CSL_DSS_VP3_DSS_OLDI_LB

#define CSL_DSS_VP3_DSS_OLDI_LB   (0x00000168U)

◆ CSL_DSS_VP3_SECURE

#define CSL_DSS_VP3_SECURE   (0x00000178U)

◆ CSL_DSS_VP3_CONFIG_PIXELGATED_MASK

#define CSL_DSS_VP3_CONFIG_PIXELGATED_MASK   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_PIXELGATED_SHIFT

#define CSL_DSS_VP3_CONFIG_PIXELGATED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CONFIG_PIXELGATED_MAX

#define CSL_DSS_VP3_CONFIG_PIXELGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_PIXELGATED_VAL_PCLKTOGA

#define CSL_DSS_VP3_CONFIG_PIXELGATED_VAL_PCLKTOGA   (0x0U)

◆ CSL_DSS_VP3_CONFIG_PIXELGATED_VAL_PCLKTOGV

#define CSL_DSS_VP3_CONFIG_PIXELGATED_VAL_PCLKTOGV   (0x1U)

◆ CSL_DSS_VP3_CONFIG_DATAENABLEGATED_MASK

#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_MASK   (0x00000002U)

◆ CSL_DSS_VP3_CONFIG_DATAENABLEGATED_SHIFT

#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_SHIFT   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_DATAENABLEGATED_MAX

#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_DATAENABLEGATED_VAL_DEGDIS

#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_VAL_DEGDIS   (0x0U)

◆ CSL_DSS_VP3_CONFIG_DATAENABLEGATED_VAL_DEGENB

#define CSL_DSS_VP3_CONFIG_DATAENABLEGATED_VAL_DEGENB   (0x1U)

◆ CSL_DSS_VP3_CONFIG_GAMMAENABLE_MASK

#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_MASK   (0x00000004U)

◆ CSL_DSS_VP3_CONFIG_GAMMAENABLE_SHIFT

#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_SHIFT   (0x00000002U)

◆ CSL_DSS_VP3_CONFIG_GAMMAENABLE_MAX

#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_GAMMAENABLE_VAL_GAMMADIS

#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_VAL_GAMMADIS   (0x0U)

◆ CSL_DSS_VP3_CONFIG_GAMMAENABLE_VAL_GAMMAENB

#define CSL_DSS_VP3_CONFIG_GAMMAENABLE_VAL_GAMMAENB   (0x1U)

◆ CSL_DSS_VP3_CONFIG_HDMIMODE_MASK

#define CSL_DSS_VP3_CONFIG_HDMIMODE_MASK   (0x00000008U)

◆ CSL_DSS_VP3_CONFIG_HDMIMODE_SHIFT

#define CSL_DSS_VP3_CONFIG_HDMIMODE_SHIFT   (0x00000003U)

◆ CSL_DSS_VP3_CONFIG_HDMIMODE_MAX

#define CSL_DSS_VP3_CONFIG_HDMIMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_PIXELDATAGATED_MASK

#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_MASK   (0x00000010U)

◆ CSL_DSS_VP3_CONFIG_PIXELDATAGATED_SHIFT

#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_SHIFT   (0x00000004U)

◆ CSL_DSS_VP3_CONFIG_PIXELDATAGATED_MAX

#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_PIXELDATAGATED_VAL_PDGDIS

#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_VAL_PDGDIS   (0x0U)

◆ CSL_DSS_VP3_CONFIG_PIXELDATAGATED_VAL_PDGENB

#define CSL_DSS_VP3_CONFIG_PIXELDATAGATED_VAL_PDGENB   (0x1U)

◆ CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_MASK

#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_MASK   (0x00000020U)

◆ CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_SHIFT

#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_SHIFT   (0x00000005U)

◆ CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_MAX

#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS

#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS   (0x0U)

◆ CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_VAL_PCGENB

#define CSL_DSS_VP3_CONFIG_PIXELCLOCKGATED_VAL_PCGENB   (0x1U)

◆ CSL_DSS_VP3_CONFIG_HSYNCGATED_MASK

#define CSL_DSS_VP3_CONFIG_HSYNCGATED_MASK   (0x00000040U)

◆ CSL_DSS_VP3_CONFIG_HSYNCGATED_SHIFT

#define CSL_DSS_VP3_CONFIG_HSYNCGATED_SHIFT   (0x00000006U)

◆ CSL_DSS_VP3_CONFIG_HSYNCGATED_MAX

#define CSL_DSS_VP3_CONFIG_HSYNCGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_HSYNCGATED_VAL_HGDIS

#define CSL_DSS_VP3_CONFIG_HSYNCGATED_VAL_HGDIS   (0x0U)

◆ CSL_DSS_VP3_CONFIG_HSYNCGATED_VAL_HGENB

#define CSL_DSS_VP3_CONFIG_HSYNCGATED_VAL_HGENB   (0x1U)

◆ CSL_DSS_VP3_CONFIG_VSYNCGATED_MASK

#define CSL_DSS_VP3_CONFIG_VSYNCGATED_MASK   (0x00000080U)

◆ CSL_DSS_VP3_CONFIG_VSYNCGATED_SHIFT

#define CSL_DSS_VP3_CONFIG_VSYNCGATED_SHIFT   (0x00000007U)

◆ CSL_DSS_VP3_CONFIG_VSYNCGATED_MAX

#define CSL_DSS_VP3_CONFIG_VSYNCGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_VSYNCGATED_VAL_VGDIS

#define CSL_DSS_VP3_CONFIG_VSYNCGATED_VAL_VGDIS   (0x0U)

◆ CSL_DSS_VP3_CONFIG_VSYNCGATED_VAL_VGENB

#define CSL_DSS_VP3_CONFIG_VSYNCGATED_VAL_VGENB   (0x1U)

◆ CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_MASK

#define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_MASK   (0x00000100U)

◆ CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_SHIFT

#define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_SHIFT   (0x00000008U)

◆ CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_MAX

#define CSL_DSS_VP3_CONFIG_EXTERNALSYNCEN_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_RESERVED1_MASK

#define CSL_DSS_VP3_CONFIG_RESERVED1_MASK   (0x00007E00U)

◆ CSL_DSS_VP3_CONFIG_RESERVED1_SHIFT

#define CSL_DSS_VP3_CONFIG_RESERVED1_SHIFT   (0x00000009U)

◆ CSL_DSS_VP3_CONFIG_RESERVED1_MAX

#define CSL_DSS_VP3_CONFIG_RESERVED1_MAX   (0x0000003FU)

◆ CSL_DSS_VP3_CONFIG_CPR_MASK

#define CSL_DSS_VP3_CONFIG_CPR_MASK   (0x00008000U)

◆ CSL_DSS_VP3_CONFIG_CPR_SHIFT

#define CSL_DSS_VP3_CONFIG_CPR_SHIFT   (0x0000000FU)

◆ CSL_DSS_VP3_CONFIG_CPR_MAX

#define CSL_DSS_VP3_CONFIG_CPR_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_MASK

#define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_MASK   (0x00010000U)

◆ CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_SHIFT

#define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_MAX

#define CSL_DSS_VP3_CONFIG_BUFFERHANDSHAKE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_RESERVED2_MASK

#define CSL_DSS_VP3_CONFIG_RESERVED2_MASK   (0x000E0000U)

◆ CSL_DSS_VP3_CONFIG_RESERVED2_SHIFT

#define CSL_DSS_VP3_CONFIG_RESERVED2_SHIFT   (0x00000011U)

◆ CSL_DSS_VP3_CONFIG_RESERVED2_MAX

#define CSL_DSS_VP3_CONFIG_RESERVED2_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CONFIG_BT656ENABLE_MASK

#define CSL_DSS_VP3_CONFIG_BT656ENABLE_MASK   (0x00100000U)

◆ CSL_DSS_VP3_CONFIG_BT656ENABLE_SHIFT

#define CSL_DSS_VP3_CONFIG_BT656ENABLE_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_CONFIG_BT656ENABLE_MAX

#define CSL_DSS_VP3_CONFIG_BT656ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_BT656ENABLE_VAL_DISABLE

#define CSL_DSS_VP3_CONFIG_BT656ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP3_CONFIG_BT656ENABLE_VAL_ENABLE

#define CSL_DSS_VP3_CONFIG_BT656ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP3_CONFIG_BT1120ENABLE_MASK

#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_MASK   (0x00200000U)

◆ CSL_DSS_VP3_CONFIG_BT1120ENABLE_SHIFT

#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_SHIFT   (0x00000015U)

◆ CSL_DSS_VP3_CONFIG_BT1120ENABLE_MAX

#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_BT1120ENABLE_VAL_DISABLE

#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP3_CONFIG_BT1120ENABLE_VAL_ENABLE

#define CSL_DSS_VP3_CONFIG_BT1120ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_MASK

#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_MASK   (0x00400000U)

◆ CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_SHIFT

#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_SHIFT   (0x00000016U)

◆ CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_MAX

#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE

#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE

#define CSL_DSS_VP3_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP3_CONFIG_FIDFIRST_MASK

#define CSL_DSS_VP3_CONFIG_FIDFIRST_MASK   (0x00800000U)

◆ CSL_DSS_VP3_CONFIG_FIDFIRST_SHIFT

#define CSL_DSS_VP3_CONFIG_FIDFIRST_SHIFT   (0x00000017U)

◆ CSL_DSS_VP3_CONFIG_FIDFIRST_MAX

#define CSL_DSS_VP3_CONFIG_FIDFIRST_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_FIDFIRST_VAL_EVEN

#define CSL_DSS_VP3_CONFIG_FIDFIRST_VAL_EVEN   (0x0U)

◆ CSL_DSS_VP3_CONFIG_FIDFIRST_VAL_ODD

#define CSL_DSS_VP3_CONFIG_FIDFIRST_VAL_ODD   (0x1U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVENABLE_MASK

#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_MASK   (0x01000000U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVENABLE_SHIFT

#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_SHIFT   (0x00000018U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVENABLE_MAX

#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_VP3_CONFIG_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_VP3_CONFIG_FULLRANGE_MASK

#define CSL_DSS_VP3_CONFIG_FULLRANGE_MASK   (0x02000000U)

◆ CSL_DSS_VP3_CONFIG_FULLRANGE_SHIFT

#define CSL_DSS_VP3_CONFIG_FULLRANGE_SHIFT   (0x00000019U)

◆ CSL_DSS_VP3_CONFIG_FULLRANGE_MAX

#define CSL_DSS_VP3_CONFIG_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_VP3_CONFIG_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_VP3_CONFIG_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_VP3_CONFIG_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVPOS_MASK

#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_MASK   (0x04000000U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVPOS_SHIFT

#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_SHIFT   (0x0000001AU)

◆ CSL_DSS_VP3_CONFIG_COLORCONVPOS_MAX

#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA

#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA   (0x0U)

◆ CSL_DSS_VP3_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA

#define CSL_DSS_VP3_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA   (0x1U)

◆ CSL_DSS_VP3_CONFIG_RESERVED3_MASK

#define CSL_DSS_VP3_CONFIG_RESERVED3_MASK   (0xF8000000U)

◆ CSL_DSS_VP3_CONFIG_RESERVED3_SHIFT

#define CSL_DSS_VP3_CONFIG_RESERVED3_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP3_CONFIG_RESERVED3_MAX

#define CSL_DSS_VP3_CONFIG_RESERVED3_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_CONTROL_ENABLE_MASK

#define CSL_DSS_VP3_CONTROL_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_ENABLE_SHIFT

#define CSL_DSS_VP3_CONTROL_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CONTROL_ENABLE_MAX

#define CSL_DSS_VP3_CONTROL_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_ENABLE_VAL_LCDOPDIS

#define CSL_DSS_VP3_CONTROL_ENABLE_VAL_LCDOPDIS   (0x0U)

◆ CSL_DSS_VP3_CONTROL_ENABLE_VAL_LCDOPENB

#define CSL_DSS_VP3_CONTROL_ENABLE_VAL_LCDOPENB   (0x1U)

◆ CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_MASK

#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_MASK   (0x00000002U)

◆ CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_SHIFT

#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_SHIFT   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_MAX

#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS

#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS   (0x0U)

◆ CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN

#define CSL_DSS_VP3_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN   (0x1U)

◆ CSL_DSS_VP3_CONTROL_MONOCOLOR_MASK

#define CSL_DSS_VP3_CONTROL_MONOCOLOR_MASK   (0x00000004U)

◆ CSL_DSS_VP3_CONTROL_MONOCOLOR_SHIFT

#define CSL_DSS_VP3_CONTROL_MONOCOLOR_SHIFT   (0x00000002U)

◆ CSL_DSS_VP3_CONTROL_MONOCOLOR_MAX

#define CSL_DSS_VP3_CONTROL_MONOCOLOR_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_STN_MASK

#define CSL_DSS_VP3_CONTROL_STN_MASK   (0x00000008U)

◆ CSL_DSS_VP3_CONTROL_STN_SHIFT

#define CSL_DSS_VP3_CONTROL_STN_SHIFT   (0x00000003U)

◆ CSL_DSS_VP3_CONTROL_STN_MAX

#define CSL_DSS_VP3_CONTROL_STN_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_M8B_MASK

#define CSL_DSS_VP3_CONTROL_M8B_MASK   (0x00000010U)

◆ CSL_DSS_VP3_CONTROL_M8B_SHIFT

#define CSL_DSS_VP3_CONTROL_M8B_SHIFT   (0x00000004U)

◆ CSL_DSS_VP3_CONTROL_M8B_MAX

#define CSL_DSS_VP3_CONTROL_M8B_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_GOBIT_MASK

#define CSL_DSS_VP3_CONTROL_GOBIT_MASK   (0x00000020U)

◆ CSL_DSS_VP3_CONTROL_GOBIT_SHIFT

#define CSL_DSS_VP3_CONTROL_GOBIT_SHIFT   (0x00000005U)

◆ CSL_DSS_VP3_CONTROL_GOBIT_MAX

#define CSL_DSS_VP3_CONTROL_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_GOBIT_VAL_HFUISR

#define CSL_DSS_VP3_CONTROL_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_VP3_CONTROL_GOBIT_VAL_UFPSR

#define CSL_DSS_VP3_CONTROL_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_VP3_CONTROL_DPIENABLE_MASK

#define CSL_DSS_VP3_CONTROL_DPIENABLE_MASK   (0x00000040U)

◆ CSL_DSS_VP3_CONTROL_DPIENABLE_SHIFT

#define CSL_DSS_VP3_CONTROL_DPIENABLE_SHIFT   (0x00000006U)

◆ CSL_DSS_VP3_CONTROL_DPIENABLE_MAX

#define CSL_DSS_VP3_CONTROL_DPIENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_DPIENABLE_VAL_DPIOPDIS

#define CSL_DSS_VP3_CONTROL_DPIENABLE_VAL_DPIOPDIS   (0x0U)

◆ CSL_DSS_VP3_CONTROL_DPIENABLE_VAL_DPIOPENB

#define CSL_DSS_VP3_CONTROL_DPIENABLE_VAL_DPIOPENB   (0x1U)

◆ CSL_DSS_VP3_CONTROL_STDITHERENABLE_MASK

#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_MASK   (0x00000080U)

◆ CSL_DSS_VP3_CONTROL_STDITHERENABLE_SHIFT

#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_SHIFT   (0x00000007U)

◆ CSL_DSS_VP3_CONTROL_STDITHERENABLE_MAX

#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_STDITHERENABLE_VAL_STDITHDIS

#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_VAL_STDITHDIS   (0x0U)

◆ CSL_DSS_VP3_CONTROL_STDITHERENABLE_VAL_STDITHENB

#define CSL_DSS_VP3_CONTROL_STDITHERENABLE_VAL_STDITHENB   (0x1U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_MASK

#define CSL_DSS_VP3_CONTROL_DATALINES_MASK   (0x00000700U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_SHIFT

#define CSL_DSS_VP3_CONTROL_DATALINES_SHIFT   (0x00000008U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_MAX

#define CSL_DSS_VP3_CONTROL_DATALINES_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB12B

#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB12B   (0x0U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB16B

#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB16B   (0x1U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB18B

#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB18B   (0x2U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB24B

#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB24B   (0x3U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB30B

#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB30B   (0x4U)

◆ CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB36B

#define CSL_DSS_VP3_CONTROL_DATALINES_VAL_OALSB36B   (0x5U)

◆ CSL_DSS_VP3_CONTROL_STALLMODE_MASK

#define CSL_DSS_VP3_CONTROL_STALLMODE_MASK   (0x00000800U)

◆ CSL_DSS_VP3_CONTROL_STALLMODE_SHIFT

#define CSL_DSS_VP3_CONTROL_STALLMODE_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP3_CONTROL_STALLMODE_MAX

#define CSL_DSS_VP3_CONTROL_STALLMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_STALLMODE_VAL_STALLDIS

#define CSL_DSS_VP3_CONTROL_STALLMODE_VAL_STALLDIS   (0x0U)

◆ CSL_DSS_VP3_CONTROL_STALLMODE_VAL_STALLENB

#define CSL_DSS_VP3_CONTROL_STALLMODE_VAL_STALLENB   (0x1U)

◆ CSL_DSS_VP3_CONTROL_STALLMODETYPE_MASK

#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_MASK   (0x00001000U)

◆ CSL_DSS_VP3_CONTROL_STALLMODETYPE_SHIFT

#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP3_CONTROL_STALLMODETYPE_MAX

#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_STALLMODETYPE_VAL_COMMANDMODE

#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_VAL_COMMANDMODE   (0x0U)

◆ CSL_DSS_VP3_CONTROL_STALLMODETYPE_VAL_VIDEOMODE

#define CSL_DSS_VP3_CONTROL_STALLMODETYPE_VAL_VIDEOMODE   (0x1U)

◆ CSL_DSS_VP3_CONTROL_RESERVED3_MASK

#define CSL_DSS_VP3_CONTROL_RESERVED3_MASK   (0x00002000U)

◆ CSL_DSS_VP3_CONTROL_RESERVED3_SHIFT

#define CSL_DSS_VP3_CONTROL_RESERVED3_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP3_CONTROL_RESERVED3_MAX

#define CSL_DSS_VP3_CONTROL_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_HT_MASK

#define CSL_DSS_VP3_CONTROL_HT_MASK   (0x0001C000U)

◆ CSL_DSS_VP3_CONTROL_HT_SHIFT

#define CSL_DSS_VP3_CONTROL_HT_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP3_CONTROL_HT_MAX

#define CSL_DSS_VP3_CONTROL_HT_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CONTROL_RESERVED1_MASK

#define CSL_DSS_VP3_CONTROL_RESERVED1_MASK   (0x000E0000U)

◆ CSL_DSS_VP3_CONTROL_RESERVED1_SHIFT

#define CSL_DSS_VP3_CONTROL_RESERVED1_SHIFT   (0x00000011U)

◆ CSL_DSS_VP3_CONTROL_RESERVED1_MAX

#define CSL_DSS_VP3_CONTROL_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CONTROL_TDMENABLE_MASK

#define CSL_DSS_VP3_CONTROL_TDMENABLE_MASK   (0x00100000U)

◆ CSL_DSS_VP3_CONTROL_TDMENABLE_SHIFT

#define CSL_DSS_VP3_CONTROL_TDMENABLE_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_CONTROL_TDMENABLE_MAX

#define CSL_DSS_VP3_CONTROL_TDMENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_CONTROL_TDMENABLE_VAL_TDMDIS

#define CSL_DSS_VP3_CONTROL_TDMENABLE_VAL_TDMDIS   (0x0U)

◆ CSL_DSS_VP3_CONTROL_TDMENABLE_VAL_TDMENB

#define CSL_DSS_VP3_CONTROL_TDMENABLE_VAL_TDMENB   (0x1U)

◆ CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_MASK

#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_MASK   (0x00600000U)

◆ CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_SHIFT

#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_SHIFT   (0x00000015U)

◆ CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_MAX

#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_MAX   (0x00000003U)

◆ CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT

#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT   (0x0U)

◆ CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT

#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT   (0x1U)

◆ CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT

#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT   (0x2U)

◆ CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT

#define CSL_DSS_VP3_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT   (0x3U)

◆ CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_MASK

#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_MASK   (0x01800000U)

◆ CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_SHIFT

#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_SHIFT   (0x00000017U)

◆ CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_MAX

#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_MAX   (0x00000003U)

◆ CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX

#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX   (0x0U)

◆ CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX

#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX   (0x1U)

◆ CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX

#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX   (0x2U)

◆ CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX

#define CSL_DSS_VP3_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX   (0x3U)

◆ CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_MASK

#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_MASK   (0x06000000U)

◆ CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_SHIFT

#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_SHIFT   (0x00000019U)

◆ CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_MAX

#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_MAX   (0x00000003U)

◆ CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL

#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL   (0x0U)

◆ CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL

#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL   (0x1U)

◆ CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED

#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED   (0x2U)

◆ CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_RES

#define CSL_DSS_VP3_CONTROL_TDMUNUSEDBITS_VAL_RES   (0x3U)

◆ CSL_DSS_VP3_CONTROL_RESERVED_MASK

#define CSL_DSS_VP3_CONTROL_RESERVED_MASK   (0x38000000U)

◆ CSL_DSS_VP3_CONTROL_RESERVED_SHIFT

#define CSL_DSS_VP3_CONTROL_RESERVED_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP3_CONTROL_RESERVED_MAX

#define CSL_DSS_VP3_CONTROL_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK

#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK   (0xC0000000U)

◆ CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT

#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT   (0x0000001EU)

◆ CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX

#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX   (0x00000003U)

◆ CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME

#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME   (0x0U)

◆ CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES

#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES   (0x1U)

◆ CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES

#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES   (0x2U)

◆ CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED

#define CSL_DSS_VP3_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VP3_CSC_COEF0_C00_MASK

#define CSL_DSS_VP3_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF0_C00_SHIFT

#define CSL_DSS_VP3_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CSC_COEF0_C00_MAX

#define CSL_DSS_VP3_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_VP3_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP3_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_VP3_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_CSC_COEF0_C01_MASK

#define CSL_DSS_VP3_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_VP3_CSC_COEF0_C01_SHIFT

#define CSL_DSS_VP3_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_CSC_COEF0_C01_MAX

#define CSL_DSS_VP3_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_VP3_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP3_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_VP3_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_CSC_COEF1_C02_MASK

#define CSL_DSS_VP3_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF1_C02_SHIFT

#define CSL_DSS_VP3_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CSC_COEF1_C02_MAX

#define CSL_DSS_VP3_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_VP3_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP3_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_VP3_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_CSC_COEF1_C10_MASK

#define CSL_DSS_VP3_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_VP3_CSC_COEF1_C10_SHIFT

#define CSL_DSS_VP3_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_CSC_COEF1_C10_MAX

#define CSL_DSS_VP3_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_VP3_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP3_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_VP3_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_CSC_COEF2_C11_MASK

#define CSL_DSS_VP3_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF2_C11_SHIFT

#define CSL_DSS_VP3_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CSC_COEF2_C11_MAX

#define CSL_DSS_VP3_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_VP3_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP3_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_VP3_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_CSC_COEF2_C12_MASK

#define CSL_DSS_VP3_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_VP3_CSC_COEF2_C12_SHIFT

#define CSL_DSS_VP3_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_CSC_COEF2_C12_MAX

#define CSL_DSS_VP3_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_VP3_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP3_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_VP3_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_MASK

#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_MAX

#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_MASK

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_MAX

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_MASK

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_MAX

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_MASK

#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_MAX

#define CSL_DSS_VP3_DATA_CYCLE_0_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_MASK

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_MAX

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP3_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_MASK

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_MAX

#define CSL_DSS_VP3_DATA_CYCLE_0_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_MASK

#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_MAX

#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_MASK

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_MAX

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_MASK

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_MAX

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_MASK

#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_MAX

#define CSL_DSS_VP3_DATA_CYCLE_1_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_MASK

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_MAX

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP3_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_MASK

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_MAX

#define CSL_DSS_VP3_DATA_CYCLE_1_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_MASK

#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_MAX

#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_MASK

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_MAX

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_MASK

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_MAX

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_MASK

#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_MAX

#define CSL_DSS_VP3_DATA_CYCLE_2_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_MASK

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_MAX

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP3_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_MASK

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_SHIFT

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_MAX

#define CSL_DSS_VP3_DATA_CYCLE_2_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_MASK

#define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_MASK   (0x00003FFFU)

◆ CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_SHIFT

#define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_MAX

#define CSL_DSS_VP3_LINE_NUMBER_LINENUMBER_MAX   (0x00003FFFU)

◆ CSL_DSS_VP3_LINE_NUMBER_RESERVED_MASK

#define CSL_DSS_VP3_LINE_NUMBER_RESERVED_MASK   (0xFFFFC000U)

◆ CSL_DSS_VP3_LINE_NUMBER_RESERVED_SHIFT

#define CSL_DSS_VP3_LINE_NUMBER_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP3_LINE_NUMBER_RESERVED_MAX

#define CSL_DSS_VP3_LINE_NUMBER_RESERVED_MAX   (0x0003FFFFU)

◆ CSL_DSS_VP3_POL_FREQ_ACB_MASK

#define CSL_DSS_VP3_POL_FREQ_ACB_MASK   (0x000000FFU)

◆ CSL_DSS_VP3_POL_FREQ_ACB_SHIFT

#define CSL_DSS_VP3_POL_FREQ_ACB_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_POL_FREQ_ACB_MAX

#define CSL_DSS_VP3_POL_FREQ_ACB_MAX   (0x000000FFU)

◆ CSL_DSS_VP3_POL_FREQ_ACBI_MASK

#define CSL_DSS_VP3_POL_FREQ_ACBI_MASK   (0x00000F00U)

◆ CSL_DSS_VP3_POL_FREQ_ACBI_SHIFT

#define CSL_DSS_VP3_POL_FREQ_ACBI_SHIFT   (0x00000008U)

◆ CSL_DSS_VP3_POL_FREQ_ACBI_MAX

#define CSL_DSS_VP3_POL_FREQ_ACBI_MAX   (0x0000000FU)

◆ CSL_DSS_VP3_POL_FREQ_IVS_MASK

#define CSL_DSS_VP3_POL_FREQ_IVS_MASK   (0x00001000U)

◆ CSL_DSS_VP3_POL_FREQ_IVS_SHIFT

#define CSL_DSS_VP3_POL_FREQ_IVS_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP3_POL_FREQ_IVS_MAX

#define CSL_DSS_VP3_POL_FREQ_IVS_MAX   (0x00000001U)

◆ CSL_DSS_VP3_POL_FREQ_IVS_VAL_FCKPINAH

#define CSL_DSS_VP3_POL_FREQ_IVS_VAL_FCKPINAH   (0x0U)

◆ CSL_DSS_VP3_POL_FREQ_IVS_VAL_FCKPINAL

#define CSL_DSS_VP3_POL_FREQ_IVS_VAL_FCKPINAL   (0x1U)

◆ CSL_DSS_VP3_POL_FREQ_IHS_MASK

#define CSL_DSS_VP3_POL_FREQ_IHS_MASK   (0x00002000U)

◆ CSL_DSS_VP3_POL_FREQ_IHS_SHIFT

#define CSL_DSS_VP3_POL_FREQ_IHS_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP3_POL_FREQ_IHS_MAX

#define CSL_DSS_VP3_POL_FREQ_IHS_MAX   (0x00000001U)

◆ CSL_DSS_VP3_POL_FREQ_IHS_VAL_LCKPINAH

#define CSL_DSS_VP3_POL_FREQ_IHS_VAL_LCKPINAH   (0x0U)

◆ CSL_DSS_VP3_POL_FREQ_IHS_VAL_LCKPINAL

#define CSL_DSS_VP3_POL_FREQ_IHS_VAL_LCKPINAL   (0x1U)

◆ CSL_DSS_VP3_POL_FREQ_IPC_MASK

#define CSL_DSS_VP3_POL_FREQ_IPC_MASK   (0x00004000U)

◆ CSL_DSS_VP3_POL_FREQ_IPC_SHIFT

#define CSL_DSS_VP3_POL_FREQ_IPC_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP3_POL_FREQ_IPC_MAX

#define CSL_DSS_VP3_POL_FREQ_IPC_MAX   (0x00000001U)

◆ CSL_DSS_VP3_POL_FREQ_IPC_VAL_DRPCK

#define CSL_DSS_VP3_POL_FREQ_IPC_VAL_DRPCK   (0x0U)

◆ CSL_DSS_VP3_POL_FREQ_IPC_VAL_DFPCK

#define CSL_DSS_VP3_POL_FREQ_IPC_VAL_DFPCK   (0x1U)

◆ CSL_DSS_VP3_POL_FREQ_IEO_MASK

#define CSL_DSS_VP3_POL_FREQ_IEO_MASK   (0x00008000U)

◆ CSL_DSS_VP3_POL_FREQ_IEO_SHIFT

#define CSL_DSS_VP3_POL_FREQ_IEO_SHIFT   (0x0000000FU)

◆ CSL_DSS_VP3_POL_FREQ_IEO_MAX

#define CSL_DSS_VP3_POL_FREQ_IEO_MAX   (0x00000001U)

◆ CSL_DSS_VP3_POL_FREQ_IEO_VAL_ACBAHIGH

#define CSL_DSS_VP3_POL_FREQ_IEO_VAL_ACBAHIGH   (0x0U)

◆ CSL_DSS_VP3_POL_FREQ_IEO_VAL_ACBALOW

#define CSL_DSS_VP3_POL_FREQ_IEO_VAL_ACBALOW   (0x1U)

◆ CSL_DSS_VP3_POL_FREQ_RF_MASK

#define CSL_DSS_VP3_POL_FREQ_RF_MASK   (0x00010000U)

◆ CSL_DSS_VP3_POL_FREQ_RF_SHIFT

#define CSL_DSS_VP3_POL_FREQ_RF_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_POL_FREQ_RF_MAX

#define CSL_DSS_VP3_POL_FREQ_RF_MAX   (0x00000001U)

◆ CSL_DSS_VP3_POL_FREQ_RF_VAL_DFEDPCK

#define CSL_DSS_VP3_POL_FREQ_RF_VAL_DFEDPCK   (0x0U)

◆ CSL_DSS_VP3_POL_FREQ_RF_VAL_DRIEDPCK

#define CSL_DSS_VP3_POL_FREQ_RF_VAL_DRIEDPCK   (0x1U)

◆ CSL_DSS_VP3_POL_FREQ_ONOFF_MASK

#define CSL_DSS_VP3_POL_FREQ_ONOFF_MASK   (0x00020000U)

◆ CSL_DSS_VP3_POL_FREQ_ONOFF_SHIFT

#define CSL_DSS_VP3_POL_FREQ_ONOFF_SHIFT   (0x00000011U)

◆ CSL_DSS_VP3_POL_FREQ_ONOFF_MAX

#define CSL_DSS_VP3_POL_FREQ_ONOFF_MAX   (0x00000001U)

◆ CSL_DSS_VP3_POL_FREQ_ONOFF_VAL_DOPEDPCK

#define CSL_DSS_VP3_POL_FREQ_ONOFF_VAL_DOPEDPCK   (0x0U)

◆ CSL_DSS_VP3_POL_FREQ_ONOFF_VAL_DBIT16

#define CSL_DSS_VP3_POL_FREQ_ONOFF_VAL_DBIT16   (0x1U)

◆ CSL_DSS_VP3_POL_FREQ_ALIGN_MASK

#define CSL_DSS_VP3_POL_FREQ_ALIGN_MASK   (0x00040000U)

◆ CSL_DSS_VP3_POL_FREQ_ALIGN_SHIFT

#define CSL_DSS_VP3_POL_FREQ_ALIGN_SHIFT   (0x00000012U)

◆ CSL_DSS_VP3_POL_FREQ_ALIGN_MAX

#define CSL_DSS_VP3_POL_FREQ_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_VP3_POL_FREQ_ALIGN_VAL_NOTALIGNED

#define CSL_DSS_VP3_POL_FREQ_ALIGN_VAL_NOTALIGNED   (0x0U)

◆ CSL_DSS_VP3_POL_FREQ_ALIGN_VAL_ALIGNED

#define CSL_DSS_VP3_POL_FREQ_ALIGN_VAL_ALIGNED   (0x1U)

◆ CSL_DSS_VP3_POL_FREQ_RESERVED_MASK

#define CSL_DSS_VP3_POL_FREQ_RESERVED_MASK   (0xFFF80000U)

◆ CSL_DSS_VP3_POL_FREQ_RESERVED_SHIFT

#define CSL_DSS_VP3_POL_FREQ_RESERVED_SHIFT   (0x00000013U)

◆ CSL_DSS_VP3_POL_FREQ_RESERVED_MAX

#define CSL_DSS_VP3_POL_FREQ_RESERVED_MAX   (0x00001FFFU)

◆ CSL_DSS_VP3_SIZE_SCREEN_PPL_MASK

#define CSL_DSS_VP3_SIZE_SCREEN_PPL_MASK   (0x00003FFFU)

◆ CSL_DSS_VP3_SIZE_SCREEN_PPL_SHIFT

#define CSL_DSS_VP3_SIZE_SCREEN_PPL_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_SIZE_SCREEN_PPL_MAX

#define CSL_DSS_VP3_SIZE_SCREEN_PPL_MAX   (0x00003FFFU)

◆ CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_MASK

#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_MASK   (0x0000C000U)

◆ CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_SHIFT

#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_MAX

#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_MAX   (0x00000003U)

◆ CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_SAME

#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_SAME   (0x0U)

◆ CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE

#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE   (0x1U)

◆ CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE

#define CSL_DSS_VP3_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE   (0x2U)

◆ CSL_DSS_VP3_SIZE_SCREEN_LPP_MASK

#define CSL_DSS_VP3_SIZE_SCREEN_LPP_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP3_SIZE_SCREEN_LPP_SHIFT

#define CSL_DSS_VP3_SIZE_SCREEN_LPP_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_SIZE_SCREEN_LPP_MAX

#define CSL_DSS_VP3_SIZE_SCREEN_LPP_MAX   (0x00003FFFU)

◆ CSL_DSS_VP3_TIMING_H_HSW_MASK

#define CSL_DSS_VP3_TIMING_H_HSW_MASK   (0x000000FFU)

◆ CSL_DSS_VP3_TIMING_H_HSW_SHIFT

#define CSL_DSS_VP3_TIMING_H_HSW_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_TIMING_H_HSW_MAX

#define CSL_DSS_VP3_TIMING_H_HSW_MAX   (0x000000FFU)

◆ CSL_DSS_VP3_TIMING_H_HFP_MASK

#define CSL_DSS_VP3_TIMING_H_HFP_MASK   (0x000FFF00U)

◆ CSL_DSS_VP3_TIMING_H_HFP_SHIFT

#define CSL_DSS_VP3_TIMING_H_HFP_SHIFT   (0x00000008U)

◆ CSL_DSS_VP3_TIMING_H_HFP_MAX

#define CSL_DSS_VP3_TIMING_H_HFP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP3_TIMING_H_HBP_MASK

#define CSL_DSS_VP3_TIMING_H_HBP_MASK   (0xFFF00000U)

◆ CSL_DSS_VP3_TIMING_H_HBP_SHIFT

#define CSL_DSS_VP3_TIMING_H_HBP_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_TIMING_H_HBP_MAX

#define CSL_DSS_VP3_TIMING_H_HBP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP3_TIMING_V_VSW_MASK

#define CSL_DSS_VP3_TIMING_V_VSW_MASK   (0x000000FFU)

◆ CSL_DSS_VP3_TIMING_V_VSW_SHIFT

#define CSL_DSS_VP3_TIMING_V_VSW_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_TIMING_V_VSW_MAX

#define CSL_DSS_VP3_TIMING_V_VSW_MAX   (0x000000FFU)

◆ CSL_DSS_VP3_TIMING_V_VFP_MASK

#define CSL_DSS_VP3_TIMING_V_VFP_MASK   (0x000FFF00U)

◆ CSL_DSS_VP3_TIMING_V_VFP_SHIFT

#define CSL_DSS_VP3_TIMING_V_VFP_SHIFT   (0x00000008U)

◆ CSL_DSS_VP3_TIMING_V_VFP_MAX

#define CSL_DSS_VP3_TIMING_V_VFP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP3_TIMING_V_VBP_MASK

#define CSL_DSS_VP3_TIMING_V_VBP_MASK   (0xFFF00000U)

◆ CSL_DSS_VP3_TIMING_V_VBP_SHIFT

#define CSL_DSS_VP3_TIMING_V_VBP_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_TIMING_V_VBP_MAX

#define CSL_DSS_VP3_TIMING_V_VBP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP3_CSC_COEF3_C20_MASK

#define CSL_DSS_VP3_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF3_C20_SHIFT

#define CSL_DSS_VP3_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CSC_COEF3_C20_MAX

#define CSL_DSS_VP3_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_VP3_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP3_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_VP3_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_CSC_COEF3_C21_MASK

#define CSL_DSS_VP3_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_VP3_CSC_COEF3_C21_SHIFT

#define CSL_DSS_VP3_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_CSC_COEF3_C21_MAX

#define CSL_DSS_VP3_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_VP3_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP3_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_VP3_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_VP3_CSC_COEF4_C22_MASK

#define CSL_DSS_VP3_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF4_C22_SHIFT

#define CSL_DSS_VP3_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CSC_COEF4_C22_MAX

#define CSL_DSS_VP3_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_VP3_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_VP3_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP3_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_VP3_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_VP3_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_VP3_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_VP3_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_VP3_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VP3_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_VP3_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP3_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_VP3_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_VP3_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_VP3_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VP3_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_VP3_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_VP3_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_VP3_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_VP3_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VP3_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_VP3_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP3_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_VP3_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_VP3_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_VP3_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VP3_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_VP3_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_VP3_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_VP3_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VP3_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_VP3_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP3_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_VP3_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_VP3_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_VP3_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_MASK

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_MAX

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_MASK

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_MAX

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_MASK

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_MAX

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP   (0x0U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_MASK

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_SHIFT

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_MAX

#define CSL_DSS_VP3_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)

◆ CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VP3_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_SAFETY_POSITION_POSX_MASK

#define CSL_DSS_VP3_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_VP3_SAFETY_POSITION_POSX_SHIFT

#define CSL_DSS_VP3_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_SAFETY_POSITION_POSX_MAX

#define CSL_DSS_VP3_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_VP3_SAFETY_POSITION_POSY_MASK

#define CSL_DSS_VP3_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP3_SAFETY_POSITION_POSY_SHIFT

#define CSL_DSS_VP3_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_SAFETY_POSITION_POSY_MAX

#define CSL_DSS_VP3_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VP3_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_SAFETY_SIZE_SIZEX_MASK

#define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VP3_SAFETY_SIZE_SIZEX_SHIFT

#define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_SAFETY_SIZE_SIZEX_MAX

#define CSL_DSS_VP3_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VP3_SAFETY_SIZE_SIZEY_MASK

#define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP3_SAFETY_SIZE_SIZEY_SHIFT

#define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VP3_SAFETY_SIZE_SIZEY_MAX

#define CSL_DSS_VP3_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_MASK

#define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_SHIFT

#define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_MAX

#define CSL_DSS_VP3_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_0_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_0_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_1_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_1_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_2_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_2_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_3_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_3_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_4_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_4_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_5_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_5_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_6_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_6_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_7_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_7_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_8_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_8_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_9_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_9_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_10_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_10_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_11_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_11_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_12_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_12_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_13_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_13_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_14_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_14_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_15_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_MASK

#define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_SHIFT

#define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_MAX

#define CSL_DSS_VP3_GAMMA_TABLE_15_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_MASK

#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_MASK   (0x00003FFFU)

◆ CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_SHIFT

#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_MAX

#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED1_MAX   (0x00003FFFU)

◆ CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_MASK

#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_MASK   (0xFFFFC000U)

◆ CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_SHIFT

#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_MAX

#define CSL_DSS_VP3_DSS_OLDI_CFG_RESERVED_MAX   (0x0003FFFFU)

◆ CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_MASK

#define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_SHIFT

#define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_MAX

#define CSL_DSS_VP3_DSS_OLDI_STATUS_RESERVED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_MASK

#define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_SHIFT

#define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_MAX

#define CSL_DSS_VP3_DSS_OLDI_LB_RESERVED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP3_SECURE_SECURE_MASK

#define CSL_DSS_VP3_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_VP3_SECURE_SECURE_SHIFT

#define CSL_DSS_VP3_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP3_SECURE_SECURE_MAX

#define CSL_DSS_VP3_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_VP3_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_VP3_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_VP3_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_VP3_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_VP3_SECURE_RESERVED_MASK

#define CSL_DSS_VP3_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VP3_SECURE_RESERVED_SHIFT

#define CSL_DSS_VP3_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VP3_SECURE_RESERVED_MAX

#define CSL_DSS_VP3_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_OVR4_CONFIG

#define CSL_DSS_OVR4_CONFIG   (0x00000000U)

◆ CSL_DSS_OVR4_VIRTUALVP

#define CSL_DSS_OVR4_VIRTUALVP   (0x00000004U)

◆ CSL_DSS_OVR4_DEFAULT_COLOR

#define CSL_DSS_OVR4_DEFAULT_COLOR   (0x00000008U)

◆ CSL_DSS_OVR4_DEFAULT_COLOR2

#define CSL_DSS_OVR4_DEFAULT_COLOR2   (0x0000000CU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX

#define CSL_DSS_OVR4_TRANS_COLOR_MAX   (0x00000010U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX2

#define CSL_DSS_OVR4_TRANS_COLOR_MAX2   (0x00000014U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN

#define CSL_DSS_OVR4_TRANS_COLOR_MIN   (0x00000018U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN2

#define CSL_DSS_OVR4_TRANS_COLOR_MIN2   (0x0000001CU)

◆ CSL_DSS_OVR4_ATTRIBUTES

#define CSL_DSS_OVR4_ATTRIBUTES (   index)    (0x00000020U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_OVR4_ATTRIBUTES2

#define CSL_DSS_OVR4_ATTRIBUTES2 (   index)    (0x00000034U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_OVR4_SECURE

#define CSL_DSS_OVR4_SECURE   (0x00000048U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED6_MASK

#define CSL_DSS_OVR4_CONFIG_RESERVED6_MASK   (0x00000001U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED6_SHIFT

#define CSL_DSS_OVR4_CONFIG_RESERVED6_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED6_MAX

#define CSL_DSS_OVR4_CONFIG_RESERVED6_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_CONFIG_COLORBAREN_MASK

#define CSL_DSS_OVR4_CONFIG_COLORBAREN_MASK   (0x00000002U)

◆ CSL_DSS_OVR4_CONFIG_COLORBAREN_SHIFT

#define CSL_DSS_OVR4_CONFIG_COLORBAREN_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR4_CONFIG_COLORBAREN_MAX

#define CSL_DSS_OVR4_CONFIG_COLORBAREN_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_CONFIG_COLORBAREN_VAL_COLORBARDIS

#define CSL_DSS_OVR4_CONFIG_COLORBAREN_VAL_COLORBARDIS   (0x0U)

◆ CSL_DSS_OVR4_CONFIG_COLORBAREN_VAL_COLORBAREN

#define CSL_DSS_OVR4_CONFIG_COLORBAREN_VAL_COLORBAREN   (0x1U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED_MASK

#define CSL_DSS_OVR4_CONFIG_RESERVED_MASK   (0x000003FCU)

◆ CSL_DSS_OVR4_CONFIG_RESERVED_SHIFT

#define CSL_DSS_OVR4_CONFIG_RESERVED_SHIFT   (0x00000002U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED_MAX

#define CSL_DSS_OVR4_CONFIG_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_MASK

#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_MASK   (0x00000400U)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_SHIFT

#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_SHIFT   (0x0000000AU)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_MAX

#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_VAL_DISTCK

#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_VAL_DISTCK   (0x0U)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_VAL_ENBTCK

#define CSL_DSS_OVR4_CONFIG_TCKLCDENABLE_VAL_ENBTCK   (0x1U)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_MASK

#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_MASK   (0x00000800U)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_SHIFT

#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_SHIFT   (0x0000000BU)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_MAX

#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_VAL_GDTK

#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_VAL_GDTK   (0x0U)

◆ CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_VAL_VSTK

#define CSL_DSS_OVR4_CONFIG_TCKLCDSELECTION_VAL_VSTK   (0x1U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED2_MASK

#define CSL_DSS_OVR4_CONFIG_RESERVED2_MASK   (0x00001000U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED2_SHIFT

#define CSL_DSS_OVR4_CONFIG_RESERVED2_SHIFT   (0x0000000CU)

◆ CSL_DSS_OVR4_CONFIG_RESERVED2_MAX

#define CSL_DSS_OVR4_CONFIG_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED3_MASK

#define CSL_DSS_OVR4_CONFIG_RESERVED3_MASK   (0x00002000U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED3_SHIFT

#define CSL_DSS_OVR4_CONFIG_RESERVED3_SHIFT   (0x0000000DU)

◆ CSL_DSS_OVR4_CONFIG_RESERVED3_MAX

#define CSL_DSS_OVR4_CONFIG_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED1_MASK

#define CSL_DSS_OVR4_CONFIG_RESERVED1_MASK   (0xFFFFC000U)

◆ CSL_DSS_OVR4_CONFIG_RESERVED1_SHIFT

#define CSL_DSS_OVR4_CONFIG_RESERVED1_SHIFT   (0x0000000EU)

◆ CSL_DSS_OVR4_CONFIG_RESERVED1_MAX

#define CSL_DSS_OVR4_CONFIG_RESERVED1_MAX   (0x0003FFFFU)

◆ CSL_DSS_OVR4_VIRTUALVP_PPL_MASK

#define CSL_DSS_OVR4_VIRTUALVP_PPL_MASK   (0x00003FFFU)

◆ CSL_DSS_OVR4_VIRTUALVP_PPL_SHIFT

#define CSL_DSS_OVR4_VIRTUALVP_PPL_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_VIRTUALVP_PPL_MAX

#define CSL_DSS_OVR4_VIRTUALVP_PPL_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR4_VIRTUALVP_LPP_MASK

#define CSL_DSS_OVR4_VIRTUALVP_LPP_MASK   (0x3FFF0000U)

◆ CSL_DSS_OVR4_VIRTUALVP_LPP_SHIFT

#define CSL_DSS_OVR4_VIRTUALVP_LPP_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR4_VIRTUALVP_LPP_MAX

#define CSL_DSS_OVR4_VIRTUALVP_LPP_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR4_VIRTUALVP_ENABLE_MASK

#define CSL_DSS_OVR4_VIRTUALVP_ENABLE_MASK   (0x80000000U)

◆ CSL_DSS_OVR4_VIRTUALVP_ENABLE_SHIFT

#define CSL_DSS_OVR4_VIRTUALVP_ENABLE_SHIFT   (0x0000001FU)

◆ CSL_DSS_OVR4_VIRTUALVP_ENABLE_MAX

#define CSL_DSS_OVR4_VIRTUALVP_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_MASK

#define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT

#define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_MAX

#define CSL_DSS_OVR4_DEFAULT_COLOR_DEFAULTCOLOR_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_MASK

#define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_MASK   (0x0000FFFFU)

◆ CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT

#define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_MAX

#define CSL_DSS_OVR4_DEFAULT_COLOR2_DEFAULTCOLOR_MAX   (0x0000FFFFU)

◆ CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_MASK

#define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_SHIFT

#define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_MAX

#define CSL_DSS_OVR4_DEFAULT_COLOR2_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR4_TRANS_COLOR_MAX_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_MASK   (0x0000000FU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_TRANSCOLORKEY_MAX   (0x0000000FU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_MASK

#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_SHIFT

#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_MAX

#define CSL_DSS_OVR4_TRANS_COLOR_MAX2_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR4_TRANS_COLOR_MIN_TRANSCOLORKEY_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK

#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_MASK   (0x0000000FU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT

#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX

#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_TRANSCOLORKEY_MAX   (0x0000000FU)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_MASK

#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_MASK   (0xFFFFFFF0U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_SHIFT

#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_SHIFT   (0x00000004U)

◆ CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_MAX

#define CSL_DSS_OVR4_TRANS_COLOR_MIN2_RESERVED_MAX   (0x0FFFFFFFU)

◆ CSL_DSS_OVR4_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_OVR4_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_OVR4_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_MASK

#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_MASK   (0x0000001EU)

◆ CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_SHIFT

#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_MAX

#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_MAX   (0x0000000FU)

◆ CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VID1

#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VID1   (0x0U)

◆ CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIDL1

#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIDL1   (0x1U)

◆ CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VID2

#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VID2   (0x2U)

◆ CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIDL2

#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIDL2   (0x3U)

◆ CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIRTCH

#define CSL_DSS_OVR4_ATTRIBUTES_CHANNELIN_VAL_VIRTCH   (0x4U)

◆ CSL_DSS_OVR4_ATTRIBUTES2_POSX_MASK

#define CSL_DSS_OVR4_ATTRIBUTES2_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_OVR4_ATTRIBUTES2_POSX_SHIFT

#define CSL_DSS_OVR4_ATTRIBUTES2_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_ATTRIBUTES2_POSX_MAX

#define CSL_DSS_OVR4_ATTRIBUTES2_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR4_ATTRIBUTES2_POSY_MASK

#define CSL_DSS_OVR4_ATTRIBUTES2_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_OVR4_ATTRIBUTES2_POSY_SHIFT

#define CSL_DSS_OVR4_ATTRIBUTES2_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_OVR4_ATTRIBUTES2_POSY_MAX

#define CSL_DSS_OVR4_ATTRIBUTES2_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_OVR4_SECURE_SECURE_MASK

#define CSL_DSS_OVR4_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_OVR4_SECURE_SECURE_SHIFT

#define CSL_DSS_OVR4_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_OVR4_SECURE_SECURE_MAX

#define CSL_DSS_OVR4_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_OVR4_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_OVR4_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_OVR4_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_OVR4_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_OVR4_SECURE_RESERVED_MASK

#define CSL_DSS_OVR4_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_OVR4_SECURE_RESERVED_SHIFT

#define CSL_DSS_OVR4_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_OVR4_SECURE_RESERVED_MAX

#define CSL_DSS_OVR4_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_VP4_CONFIG

#define CSL_DSS_VP4_CONFIG   (0x00000000U)

◆ CSL_DSS_VP4_CONTROL

#define CSL_DSS_VP4_CONTROL   (0x00000004U)

◆ CSL_DSS_VP4_CSC_COEF0

#define CSL_DSS_VP4_CSC_COEF0   (0x00000008U)

◆ CSL_DSS_VP4_CSC_COEF1

#define CSL_DSS_VP4_CSC_COEF1   (0x0000000CU)

◆ CSL_DSS_VP4_CSC_COEF2

#define CSL_DSS_VP4_CSC_COEF2   (0x00000010U)

◆ CSL_DSS_VP4_DATA_CYCLE_0

#define CSL_DSS_VP4_DATA_CYCLE_0   (0x00000014U)

◆ CSL_DSS_VP4_DATA_CYCLE_1

#define CSL_DSS_VP4_DATA_CYCLE_1   (0x00000018U)

◆ CSL_DSS_VP4_DATA_CYCLE_2

#define CSL_DSS_VP4_DATA_CYCLE_2   (0x0000001CU)

◆ CSL_DSS_VP4_LINE_NUMBER

#define CSL_DSS_VP4_LINE_NUMBER   (0x00000044U)

◆ CSL_DSS_VP4_POL_FREQ

#define CSL_DSS_VP4_POL_FREQ   (0x0000004CU)

◆ CSL_DSS_VP4_SIZE_SCREEN

#define CSL_DSS_VP4_SIZE_SCREEN   (0x00000050U)

◆ CSL_DSS_VP4_TIMING_H

#define CSL_DSS_VP4_TIMING_H   (0x00000054U)

◆ CSL_DSS_VP4_TIMING_V

#define CSL_DSS_VP4_TIMING_V   (0x00000058U)

◆ CSL_DSS_VP4_CSC_COEF3

#define CSL_DSS_VP4_CSC_COEF3   (0x0000005CU)

◆ CSL_DSS_VP4_CSC_COEF4

#define CSL_DSS_VP4_CSC_COEF4   (0x00000060U)

◆ CSL_DSS_VP4_CSC_COEF5

#define CSL_DSS_VP4_CSC_COEF5   (0x00000064U)

◆ CSL_DSS_VP4_CSC_COEF6

#define CSL_DSS_VP4_CSC_COEF6   (0x00000068U)

◆ CSL_DSS_VP4_CSC_COEF7

#define CSL_DSS_VP4_CSC_COEF7   (0x0000006CU)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES (   index)    (0x00000070U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE

#define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE (   index)    (0x00000090U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP4_SAFETY_POSITION

#define CSL_DSS_VP4_SAFETY_POSITION (   index)    (0x000000B0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP4_SAFETY_REF_SIGNATURE

#define CSL_DSS_VP4_SAFETY_REF_SIGNATURE (   index)    (0x000000D0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP4_SAFETY_SIZE

#define CSL_DSS_VP4_SAFETY_SIZE (   index)    (0x000000F0U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_VP4_SAFETY_LFSR_SEED

#define CSL_DSS_VP4_SAFETY_LFSR_SEED   (0x00000110U)

◆ CSL_DSS_VP4_GAMMA_TABLE_0

#define CSL_DSS_VP4_GAMMA_TABLE_0   (0x00000120U)

◆ CSL_DSS_VP4_GAMMA_TABLE_1

#define CSL_DSS_VP4_GAMMA_TABLE_1   (0x00000124U)

◆ CSL_DSS_VP4_GAMMA_TABLE_2

#define CSL_DSS_VP4_GAMMA_TABLE_2   (0x00000128U)

◆ CSL_DSS_VP4_GAMMA_TABLE_3

#define CSL_DSS_VP4_GAMMA_TABLE_3   (0x0000012CU)

◆ CSL_DSS_VP4_GAMMA_TABLE_4

#define CSL_DSS_VP4_GAMMA_TABLE_4   (0x00000130U)

◆ CSL_DSS_VP4_GAMMA_TABLE_5

#define CSL_DSS_VP4_GAMMA_TABLE_5   (0x00000134U)

◆ CSL_DSS_VP4_GAMMA_TABLE_6

#define CSL_DSS_VP4_GAMMA_TABLE_6   (0x00000138U)

◆ CSL_DSS_VP4_GAMMA_TABLE_7

#define CSL_DSS_VP4_GAMMA_TABLE_7   (0x0000013CU)

◆ CSL_DSS_VP4_GAMMA_TABLE_8

#define CSL_DSS_VP4_GAMMA_TABLE_8   (0x00000140U)

◆ CSL_DSS_VP4_GAMMA_TABLE_9

#define CSL_DSS_VP4_GAMMA_TABLE_9   (0x00000144U)

◆ CSL_DSS_VP4_GAMMA_TABLE_10

#define CSL_DSS_VP4_GAMMA_TABLE_10   (0x00000148U)

◆ CSL_DSS_VP4_GAMMA_TABLE_11

#define CSL_DSS_VP4_GAMMA_TABLE_11   (0x0000014CU)

◆ CSL_DSS_VP4_GAMMA_TABLE_12

#define CSL_DSS_VP4_GAMMA_TABLE_12   (0x00000150U)

◆ CSL_DSS_VP4_GAMMA_TABLE_13

#define CSL_DSS_VP4_GAMMA_TABLE_13   (0x00000154U)

◆ CSL_DSS_VP4_GAMMA_TABLE_14

#define CSL_DSS_VP4_GAMMA_TABLE_14   (0x00000158U)

◆ CSL_DSS_VP4_GAMMA_TABLE_15

#define CSL_DSS_VP4_GAMMA_TABLE_15   (0x0000015CU)

◆ CSL_DSS_VP4_DSS_OLDI_CFG

#define CSL_DSS_VP4_DSS_OLDI_CFG   (0x00000160U)

◆ CSL_DSS_VP4_DSS_OLDI_STATUS

#define CSL_DSS_VP4_DSS_OLDI_STATUS   (0x00000164U)

◆ CSL_DSS_VP4_DSS_OLDI_LB

#define CSL_DSS_VP4_DSS_OLDI_LB   (0x00000168U)

◆ CSL_DSS_VP4_SECURE

#define CSL_DSS_VP4_SECURE   (0x00000178U)

◆ CSL_DSS_VP4_CONFIG_PIXELGATED_MASK

#define CSL_DSS_VP4_CONFIG_PIXELGATED_MASK   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_PIXELGATED_SHIFT

#define CSL_DSS_VP4_CONFIG_PIXELGATED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CONFIG_PIXELGATED_MAX

#define CSL_DSS_VP4_CONFIG_PIXELGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_PIXELGATED_VAL_PCLKTOGA

#define CSL_DSS_VP4_CONFIG_PIXELGATED_VAL_PCLKTOGA   (0x0U)

◆ CSL_DSS_VP4_CONFIG_PIXELGATED_VAL_PCLKTOGV

#define CSL_DSS_VP4_CONFIG_PIXELGATED_VAL_PCLKTOGV   (0x1U)

◆ CSL_DSS_VP4_CONFIG_DATAENABLEGATED_MASK

#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_MASK   (0x00000002U)

◆ CSL_DSS_VP4_CONFIG_DATAENABLEGATED_SHIFT

#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_SHIFT   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_DATAENABLEGATED_MAX

#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_DATAENABLEGATED_VAL_DEGDIS

#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_VAL_DEGDIS   (0x0U)

◆ CSL_DSS_VP4_CONFIG_DATAENABLEGATED_VAL_DEGENB

#define CSL_DSS_VP4_CONFIG_DATAENABLEGATED_VAL_DEGENB   (0x1U)

◆ CSL_DSS_VP4_CONFIG_GAMMAENABLE_MASK

#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_MASK   (0x00000004U)

◆ CSL_DSS_VP4_CONFIG_GAMMAENABLE_SHIFT

#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_SHIFT   (0x00000002U)

◆ CSL_DSS_VP4_CONFIG_GAMMAENABLE_MAX

#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_GAMMAENABLE_VAL_GAMMADIS

#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_VAL_GAMMADIS   (0x0U)

◆ CSL_DSS_VP4_CONFIG_GAMMAENABLE_VAL_GAMMAENB

#define CSL_DSS_VP4_CONFIG_GAMMAENABLE_VAL_GAMMAENB   (0x1U)

◆ CSL_DSS_VP4_CONFIG_HDMIMODE_MASK

#define CSL_DSS_VP4_CONFIG_HDMIMODE_MASK   (0x00000008U)

◆ CSL_DSS_VP4_CONFIG_HDMIMODE_SHIFT

#define CSL_DSS_VP4_CONFIG_HDMIMODE_SHIFT   (0x00000003U)

◆ CSL_DSS_VP4_CONFIG_HDMIMODE_MAX

#define CSL_DSS_VP4_CONFIG_HDMIMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_PIXELDATAGATED_MASK

#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_MASK   (0x00000010U)

◆ CSL_DSS_VP4_CONFIG_PIXELDATAGATED_SHIFT

#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_SHIFT   (0x00000004U)

◆ CSL_DSS_VP4_CONFIG_PIXELDATAGATED_MAX

#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_PIXELDATAGATED_VAL_PDGDIS

#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_VAL_PDGDIS   (0x0U)

◆ CSL_DSS_VP4_CONFIG_PIXELDATAGATED_VAL_PDGENB

#define CSL_DSS_VP4_CONFIG_PIXELDATAGATED_VAL_PDGENB   (0x1U)

◆ CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_MASK

#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_MASK   (0x00000020U)

◆ CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_SHIFT

#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_SHIFT   (0x00000005U)

◆ CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_MAX

#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS

#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_VAL_PCGDIS   (0x0U)

◆ CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_VAL_PCGENB

#define CSL_DSS_VP4_CONFIG_PIXELCLOCKGATED_VAL_PCGENB   (0x1U)

◆ CSL_DSS_VP4_CONFIG_HSYNCGATED_MASK

#define CSL_DSS_VP4_CONFIG_HSYNCGATED_MASK   (0x00000040U)

◆ CSL_DSS_VP4_CONFIG_HSYNCGATED_SHIFT

#define CSL_DSS_VP4_CONFIG_HSYNCGATED_SHIFT   (0x00000006U)

◆ CSL_DSS_VP4_CONFIG_HSYNCGATED_MAX

#define CSL_DSS_VP4_CONFIG_HSYNCGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_HSYNCGATED_VAL_HGDIS

#define CSL_DSS_VP4_CONFIG_HSYNCGATED_VAL_HGDIS   (0x0U)

◆ CSL_DSS_VP4_CONFIG_HSYNCGATED_VAL_HGENB

#define CSL_DSS_VP4_CONFIG_HSYNCGATED_VAL_HGENB   (0x1U)

◆ CSL_DSS_VP4_CONFIG_VSYNCGATED_MASK

#define CSL_DSS_VP4_CONFIG_VSYNCGATED_MASK   (0x00000080U)

◆ CSL_DSS_VP4_CONFIG_VSYNCGATED_SHIFT

#define CSL_DSS_VP4_CONFIG_VSYNCGATED_SHIFT   (0x00000007U)

◆ CSL_DSS_VP4_CONFIG_VSYNCGATED_MAX

#define CSL_DSS_VP4_CONFIG_VSYNCGATED_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_VSYNCGATED_VAL_VGDIS

#define CSL_DSS_VP4_CONFIG_VSYNCGATED_VAL_VGDIS   (0x0U)

◆ CSL_DSS_VP4_CONFIG_VSYNCGATED_VAL_VGENB

#define CSL_DSS_VP4_CONFIG_VSYNCGATED_VAL_VGENB   (0x1U)

◆ CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_MASK

#define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_MASK   (0x00000100U)

◆ CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_SHIFT

#define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_SHIFT   (0x00000008U)

◆ CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_MAX

#define CSL_DSS_VP4_CONFIG_EXTERNALSYNCEN_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_RESERVED1_MASK

#define CSL_DSS_VP4_CONFIG_RESERVED1_MASK   (0x00007E00U)

◆ CSL_DSS_VP4_CONFIG_RESERVED1_SHIFT

#define CSL_DSS_VP4_CONFIG_RESERVED1_SHIFT   (0x00000009U)

◆ CSL_DSS_VP4_CONFIG_RESERVED1_MAX

#define CSL_DSS_VP4_CONFIG_RESERVED1_MAX   (0x0000003FU)

◆ CSL_DSS_VP4_CONFIG_CPR_MASK

#define CSL_DSS_VP4_CONFIG_CPR_MASK   (0x00008000U)

◆ CSL_DSS_VP4_CONFIG_CPR_SHIFT

#define CSL_DSS_VP4_CONFIG_CPR_SHIFT   (0x0000000FU)

◆ CSL_DSS_VP4_CONFIG_CPR_MAX

#define CSL_DSS_VP4_CONFIG_CPR_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_MASK

#define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_MASK   (0x00010000U)

◆ CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_SHIFT

#define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_MAX

#define CSL_DSS_VP4_CONFIG_BUFFERHANDSHAKE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_RESERVED2_MASK

#define CSL_DSS_VP4_CONFIG_RESERVED2_MASK   (0x000E0000U)

◆ CSL_DSS_VP4_CONFIG_RESERVED2_SHIFT

#define CSL_DSS_VP4_CONFIG_RESERVED2_SHIFT   (0x00000011U)

◆ CSL_DSS_VP4_CONFIG_RESERVED2_MAX

#define CSL_DSS_VP4_CONFIG_RESERVED2_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CONFIG_BT656ENABLE_MASK

#define CSL_DSS_VP4_CONFIG_BT656ENABLE_MASK   (0x00100000U)

◆ CSL_DSS_VP4_CONFIG_BT656ENABLE_SHIFT

#define CSL_DSS_VP4_CONFIG_BT656ENABLE_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_CONFIG_BT656ENABLE_MAX

#define CSL_DSS_VP4_CONFIG_BT656ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_BT656ENABLE_VAL_DISABLE

#define CSL_DSS_VP4_CONFIG_BT656ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP4_CONFIG_BT656ENABLE_VAL_ENABLE

#define CSL_DSS_VP4_CONFIG_BT656ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP4_CONFIG_BT1120ENABLE_MASK

#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_MASK   (0x00200000U)

◆ CSL_DSS_VP4_CONFIG_BT1120ENABLE_SHIFT

#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_SHIFT   (0x00000015U)

◆ CSL_DSS_VP4_CONFIG_BT1120ENABLE_MAX

#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_BT1120ENABLE_VAL_DISABLE

#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP4_CONFIG_BT1120ENABLE_VAL_ENABLE

#define CSL_DSS_VP4_CONFIG_BT1120ENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_MASK

#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_MASK   (0x00400000U)

◆ CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_SHIFT

#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_SHIFT   (0x00000016U)

◆ CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_MAX

#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE

#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE

#define CSL_DSS_VP4_CONFIG_OUTPUTMODEENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP4_CONFIG_FIDFIRST_MASK

#define CSL_DSS_VP4_CONFIG_FIDFIRST_MASK   (0x00800000U)

◆ CSL_DSS_VP4_CONFIG_FIDFIRST_SHIFT

#define CSL_DSS_VP4_CONFIG_FIDFIRST_SHIFT   (0x00000017U)

◆ CSL_DSS_VP4_CONFIG_FIDFIRST_MAX

#define CSL_DSS_VP4_CONFIG_FIDFIRST_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_FIDFIRST_VAL_EVEN

#define CSL_DSS_VP4_CONFIG_FIDFIRST_VAL_EVEN   (0x0U)

◆ CSL_DSS_VP4_CONFIG_FIDFIRST_VAL_ODD

#define CSL_DSS_VP4_CONFIG_FIDFIRST_VAL_ODD   (0x1U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVENABLE_MASK

#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_MASK   (0x01000000U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVENABLE_SHIFT

#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_SHIFT   (0x00000018U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVENABLE_MAX

#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_VP4_CONFIG_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_VP4_CONFIG_FULLRANGE_MASK

#define CSL_DSS_VP4_CONFIG_FULLRANGE_MASK   (0x02000000U)

◆ CSL_DSS_VP4_CONFIG_FULLRANGE_SHIFT

#define CSL_DSS_VP4_CONFIG_FULLRANGE_SHIFT   (0x00000019U)

◆ CSL_DSS_VP4_CONFIG_FULLRANGE_MAX

#define CSL_DSS_VP4_CONFIG_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_VP4_CONFIG_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_VP4_CONFIG_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_VP4_CONFIG_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVPOS_MASK

#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_MASK   (0x04000000U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVPOS_SHIFT

#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_SHIFT   (0x0000001AU)

◆ CSL_DSS_VP4_CONFIG_COLORCONVPOS_MAX

#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA

#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_VAL_AFTERGAMMA   (0x0U)

◆ CSL_DSS_VP4_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA

#define CSL_DSS_VP4_CONFIG_COLORCONVPOS_VAL_BEFOREGAMMA   (0x1U)

◆ CSL_DSS_VP4_CONFIG_RESERVED3_MASK

#define CSL_DSS_VP4_CONFIG_RESERVED3_MASK   (0xF8000000U)

◆ CSL_DSS_VP4_CONFIG_RESERVED3_SHIFT

#define CSL_DSS_VP4_CONFIG_RESERVED3_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP4_CONFIG_RESERVED3_MAX

#define CSL_DSS_VP4_CONFIG_RESERVED3_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_CONTROL_ENABLE_MASK

#define CSL_DSS_VP4_CONTROL_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_ENABLE_SHIFT

#define CSL_DSS_VP4_CONTROL_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CONTROL_ENABLE_MAX

#define CSL_DSS_VP4_CONTROL_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_ENABLE_VAL_LCDOPDIS

#define CSL_DSS_VP4_CONTROL_ENABLE_VAL_LCDOPDIS   (0x0U)

◆ CSL_DSS_VP4_CONTROL_ENABLE_VAL_LCDOPENB

#define CSL_DSS_VP4_CONTROL_ENABLE_VAL_LCDOPENB   (0x1U)

◆ CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_MASK

#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_MASK   (0x00000002U)

◆ CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_SHIFT

#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_SHIFT   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_MAX

#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS

#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODDIS   (0x0U)

◆ CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN

#define CSL_DSS_VP4_CONTROL_VPPROGLINENUMBERMODULO_VAL_MODEN   (0x1U)

◆ CSL_DSS_VP4_CONTROL_MONOCOLOR_MASK

#define CSL_DSS_VP4_CONTROL_MONOCOLOR_MASK   (0x00000004U)

◆ CSL_DSS_VP4_CONTROL_MONOCOLOR_SHIFT

#define CSL_DSS_VP4_CONTROL_MONOCOLOR_SHIFT   (0x00000002U)

◆ CSL_DSS_VP4_CONTROL_MONOCOLOR_MAX

#define CSL_DSS_VP4_CONTROL_MONOCOLOR_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_STN_MASK

#define CSL_DSS_VP4_CONTROL_STN_MASK   (0x00000008U)

◆ CSL_DSS_VP4_CONTROL_STN_SHIFT

#define CSL_DSS_VP4_CONTROL_STN_SHIFT   (0x00000003U)

◆ CSL_DSS_VP4_CONTROL_STN_MAX

#define CSL_DSS_VP4_CONTROL_STN_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_M8B_MASK

#define CSL_DSS_VP4_CONTROL_M8B_MASK   (0x00000010U)

◆ CSL_DSS_VP4_CONTROL_M8B_SHIFT

#define CSL_DSS_VP4_CONTROL_M8B_SHIFT   (0x00000004U)

◆ CSL_DSS_VP4_CONTROL_M8B_MAX

#define CSL_DSS_VP4_CONTROL_M8B_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_GOBIT_MASK

#define CSL_DSS_VP4_CONTROL_GOBIT_MASK   (0x00000020U)

◆ CSL_DSS_VP4_CONTROL_GOBIT_SHIFT

#define CSL_DSS_VP4_CONTROL_GOBIT_SHIFT   (0x00000005U)

◆ CSL_DSS_VP4_CONTROL_GOBIT_MAX

#define CSL_DSS_VP4_CONTROL_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_GOBIT_VAL_HFUISR

#define CSL_DSS_VP4_CONTROL_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_VP4_CONTROL_GOBIT_VAL_UFPSR

#define CSL_DSS_VP4_CONTROL_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_VP4_CONTROL_DPIENABLE_MASK

#define CSL_DSS_VP4_CONTROL_DPIENABLE_MASK   (0x00000040U)

◆ CSL_DSS_VP4_CONTROL_DPIENABLE_SHIFT

#define CSL_DSS_VP4_CONTROL_DPIENABLE_SHIFT   (0x00000006U)

◆ CSL_DSS_VP4_CONTROL_DPIENABLE_MAX

#define CSL_DSS_VP4_CONTROL_DPIENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_DPIENABLE_VAL_DPIOPDIS

#define CSL_DSS_VP4_CONTROL_DPIENABLE_VAL_DPIOPDIS   (0x0U)

◆ CSL_DSS_VP4_CONTROL_DPIENABLE_VAL_DPIOPENB

#define CSL_DSS_VP4_CONTROL_DPIENABLE_VAL_DPIOPENB   (0x1U)

◆ CSL_DSS_VP4_CONTROL_STDITHERENABLE_MASK

#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_MASK   (0x00000080U)

◆ CSL_DSS_VP4_CONTROL_STDITHERENABLE_SHIFT

#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_SHIFT   (0x00000007U)

◆ CSL_DSS_VP4_CONTROL_STDITHERENABLE_MAX

#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_STDITHERENABLE_VAL_STDITHDIS

#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_VAL_STDITHDIS   (0x0U)

◆ CSL_DSS_VP4_CONTROL_STDITHERENABLE_VAL_STDITHENB

#define CSL_DSS_VP4_CONTROL_STDITHERENABLE_VAL_STDITHENB   (0x1U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_MASK

#define CSL_DSS_VP4_CONTROL_DATALINES_MASK   (0x00000700U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_SHIFT

#define CSL_DSS_VP4_CONTROL_DATALINES_SHIFT   (0x00000008U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_MAX

#define CSL_DSS_VP4_CONTROL_DATALINES_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB12B

#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB12B   (0x0U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB16B

#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB16B   (0x1U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB18B

#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB18B   (0x2U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB24B

#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB24B   (0x3U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB30B

#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB30B   (0x4U)

◆ CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB36B

#define CSL_DSS_VP4_CONTROL_DATALINES_VAL_OALSB36B   (0x5U)

◆ CSL_DSS_VP4_CONTROL_STALLMODE_MASK

#define CSL_DSS_VP4_CONTROL_STALLMODE_MASK   (0x00000800U)

◆ CSL_DSS_VP4_CONTROL_STALLMODE_SHIFT

#define CSL_DSS_VP4_CONTROL_STALLMODE_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP4_CONTROL_STALLMODE_MAX

#define CSL_DSS_VP4_CONTROL_STALLMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_STALLMODE_VAL_STALLDIS

#define CSL_DSS_VP4_CONTROL_STALLMODE_VAL_STALLDIS   (0x0U)

◆ CSL_DSS_VP4_CONTROL_STALLMODE_VAL_STALLENB

#define CSL_DSS_VP4_CONTROL_STALLMODE_VAL_STALLENB   (0x1U)

◆ CSL_DSS_VP4_CONTROL_STALLMODETYPE_MASK

#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_MASK   (0x00001000U)

◆ CSL_DSS_VP4_CONTROL_STALLMODETYPE_SHIFT

#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP4_CONTROL_STALLMODETYPE_MAX

#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_STALLMODETYPE_VAL_COMMANDMODE

#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_VAL_COMMANDMODE   (0x0U)

◆ CSL_DSS_VP4_CONTROL_STALLMODETYPE_VAL_VIDEOMODE

#define CSL_DSS_VP4_CONTROL_STALLMODETYPE_VAL_VIDEOMODE   (0x1U)

◆ CSL_DSS_VP4_CONTROL_RESERVED3_MASK

#define CSL_DSS_VP4_CONTROL_RESERVED3_MASK   (0x00002000U)

◆ CSL_DSS_VP4_CONTROL_RESERVED3_SHIFT

#define CSL_DSS_VP4_CONTROL_RESERVED3_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP4_CONTROL_RESERVED3_MAX

#define CSL_DSS_VP4_CONTROL_RESERVED3_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_HT_MASK

#define CSL_DSS_VP4_CONTROL_HT_MASK   (0x0001C000U)

◆ CSL_DSS_VP4_CONTROL_HT_SHIFT

#define CSL_DSS_VP4_CONTROL_HT_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP4_CONTROL_HT_MAX

#define CSL_DSS_VP4_CONTROL_HT_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CONTROL_RESERVED1_MASK

#define CSL_DSS_VP4_CONTROL_RESERVED1_MASK   (0x000E0000U)

◆ CSL_DSS_VP4_CONTROL_RESERVED1_SHIFT

#define CSL_DSS_VP4_CONTROL_RESERVED1_SHIFT   (0x00000011U)

◆ CSL_DSS_VP4_CONTROL_RESERVED1_MAX

#define CSL_DSS_VP4_CONTROL_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CONTROL_TDMENABLE_MASK

#define CSL_DSS_VP4_CONTROL_TDMENABLE_MASK   (0x00100000U)

◆ CSL_DSS_VP4_CONTROL_TDMENABLE_SHIFT

#define CSL_DSS_VP4_CONTROL_TDMENABLE_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_CONTROL_TDMENABLE_MAX

#define CSL_DSS_VP4_CONTROL_TDMENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_CONTROL_TDMENABLE_VAL_TDMDIS

#define CSL_DSS_VP4_CONTROL_TDMENABLE_VAL_TDMDIS   (0x0U)

◆ CSL_DSS_VP4_CONTROL_TDMENABLE_VAL_TDMENB

#define CSL_DSS_VP4_CONTROL_TDMENABLE_VAL_TDMENB   (0x1U)

◆ CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_MASK

#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_MASK   (0x00600000U)

◆ CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_SHIFT

#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_SHIFT   (0x00000015U)

◆ CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_MAX

#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_MAX   (0x00000003U)

◆ CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT

#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_8BPARAINT   (0x0U)

◆ CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT

#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_9BPARAINT   (0x1U)

◆ CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT

#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_12BPARAINT   (0x2U)

◆ CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT

#define CSL_DSS_VP4_CONTROL_TDMPARALLELMODE_VAL_16BPARAINT   (0x3U)

◆ CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_MASK

#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_MASK   (0x01800000U)

◆ CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_SHIFT

#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_SHIFT   (0x00000017U)

◆ CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_MAX

#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_MAX   (0x00000003U)

◆ CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX

#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_1CYCPERPIX   (0x0U)

◆ CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX

#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_2CYCPERPIX   (0x1U)

◆ CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX

#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPERPIX   (0x2U)

◆ CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX

#define CSL_DSS_VP4_CONTROL_TDMCYCLEFORMAT_VAL_3CYCPER2PIX   (0x3U)

◆ CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_MASK

#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_MASK   (0x06000000U)

◆ CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_SHIFT

#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_SHIFT   (0x00000019U)

◆ CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_MAX

#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_MAX   (0x00000003U)

◆ CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL

#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_LOWLEVEL   (0x0U)

◆ CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL

#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_HIGHLEVEL   (0x1U)

◆ CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED

#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_UNCHANGED   (0x2U)

◆ CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_RES

#define CSL_DSS_VP4_CONTROL_TDMUNUSEDBITS_VAL_RES   (0x3U)

◆ CSL_DSS_VP4_CONTROL_RESERVED_MASK

#define CSL_DSS_VP4_CONTROL_RESERVED_MASK   (0x38000000U)

◆ CSL_DSS_VP4_CONTROL_RESERVED_SHIFT

#define CSL_DSS_VP4_CONTROL_RESERVED_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP4_CONTROL_RESERVED_MAX

#define CSL_DSS_VP4_CONTROL_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK

#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MASK   (0xC0000000U)

◆ CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT

#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_SHIFT   (0x0000001EU)

◆ CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX

#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_MAX   (0x00000003U)

◆ CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME

#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_ONEFRAME   (0x0U)

◆ CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES

#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_TWOFRAMES   (0x1U)

◆ CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES

#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_FOURFRAMES   (0x2U)

◆ CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED

#define CSL_DSS_VP4_CONTROL_SPATIALTEMPORALDITHERINGFRAMES_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VP4_CSC_COEF0_C00_MASK

#define CSL_DSS_VP4_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF0_C00_SHIFT

#define CSL_DSS_VP4_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CSC_COEF0_C00_MAX

#define CSL_DSS_VP4_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_VP4_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP4_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_VP4_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_CSC_COEF0_C01_MASK

#define CSL_DSS_VP4_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_VP4_CSC_COEF0_C01_SHIFT

#define CSL_DSS_VP4_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_CSC_COEF0_C01_MAX

#define CSL_DSS_VP4_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_VP4_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP4_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_VP4_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_CSC_COEF1_C02_MASK

#define CSL_DSS_VP4_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF1_C02_SHIFT

#define CSL_DSS_VP4_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CSC_COEF1_C02_MAX

#define CSL_DSS_VP4_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_VP4_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP4_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_VP4_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_CSC_COEF1_C10_MASK

#define CSL_DSS_VP4_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_VP4_CSC_COEF1_C10_SHIFT

#define CSL_DSS_VP4_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_CSC_COEF1_C10_MAX

#define CSL_DSS_VP4_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_VP4_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP4_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_VP4_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_CSC_COEF2_C11_MASK

#define CSL_DSS_VP4_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF2_C11_SHIFT

#define CSL_DSS_VP4_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CSC_COEF2_C11_MAX

#define CSL_DSS_VP4_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_VP4_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP4_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_VP4_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_CSC_COEF2_C12_MASK

#define CSL_DSS_VP4_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_VP4_CSC_COEF2_C12_SHIFT

#define CSL_DSS_VP4_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_CSC_COEF2_C12_MAX

#define CSL_DSS_VP4_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_VP4_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP4_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_VP4_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_MASK

#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_MAX

#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_MASK

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_MAX

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_MASK

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_MAX

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_MASK

#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_MAX

#define CSL_DSS_VP4_DATA_CYCLE_0_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_MASK

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_MAX

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP4_DATA_CYCLE_0_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_MASK

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_MAX

#define CSL_DSS_VP4_DATA_CYCLE_0_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_MASK

#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_MAX

#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_MASK

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_MAX

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_MASK

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_MAX

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_MASK

#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_MAX

#define CSL_DSS_VP4_DATA_CYCLE_1_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_MASK

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_MAX

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP4_DATA_CYCLE_1_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_MASK

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_MAX

#define CSL_DSS_VP4_DATA_CYCLE_1_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_MASK

#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_MASK   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_MAX

#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL1_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_MASK

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_MASK   (0x000000E0U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_SHIFT   (0x00000005U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_MAX

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_4_MAX   (0x00000007U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK

#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MASK   (0x00000F00U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_SHIFT   (0x00000008U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX

#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL1_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_MASK

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_MASK   (0x0000F000U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_MAX

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_3_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_MASK

#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_MASK   (0x001F0000U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_MAX

#define CSL_DSS_VP4_DATA_CYCLE_2_NBBITSPIXEL2_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_MASK

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_MASK   (0x00E00000U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_SHIFT   (0x00000015U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_MAX

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_6_MAX   (0x00000007U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK

#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MASK   (0x0F000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_SHIFT   (0x00000018U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX

#define CSL_DSS_VP4_DATA_CYCLE_2_BITALIGNMENTPIXEL2_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_MASK

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_MASK   (0xF0000000U)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_SHIFT

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_SHIFT   (0x0000001CU)

◆ CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_MAX

#define CSL_DSS_VP4_DATA_CYCLE_2_RESERVED_5_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_MASK

#define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_MASK   (0x00003FFFU)

◆ CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_SHIFT

#define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_MAX

#define CSL_DSS_VP4_LINE_NUMBER_LINENUMBER_MAX   (0x00003FFFU)

◆ CSL_DSS_VP4_LINE_NUMBER_RESERVED_MASK

#define CSL_DSS_VP4_LINE_NUMBER_RESERVED_MASK   (0xFFFFC000U)

◆ CSL_DSS_VP4_LINE_NUMBER_RESERVED_SHIFT

#define CSL_DSS_VP4_LINE_NUMBER_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP4_LINE_NUMBER_RESERVED_MAX

#define CSL_DSS_VP4_LINE_NUMBER_RESERVED_MAX   (0x0003FFFFU)

◆ CSL_DSS_VP4_POL_FREQ_ACB_MASK

#define CSL_DSS_VP4_POL_FREQ_ACB_MASK   (0x000000FFU)

◆ CSL_DSS_VP4_POL_FREQ_ACB_SHIFT

#define CSL_DSS_VP4_POL_FREQ_ACB_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_POL_FREQ_ACB_MAX

#define CSL_DSS_VP4_POL_FREQ_ACB_MAX   (0x000000FFU)

◆ CSL_DSS_VP4_POL_FREQ_ACBI_MASK

#define CSL_DSS_VP4_POL_FREQ_ACBI_MASK   (0x00000F00U)

◆ CSL_DSS_VP4_POL_FREQ_ACBI_SHIFT

#define CSL_DSS_VP4_POL_FREQ_ACBI_SHIFT   (0x00000008U)

◆ CSL_DSS_VP4_POL_FREQ_ACBI_MAX

#define CSL_DSS_VP4_POL_FREQ_ACBI_MAX   (0x0000000FU)

◆ CSL_DSS_VP4_POL_FREQ_IVS_MASK

#define CSL_DSS_VP4_POL_FREQ_IVS_MASK   (0x00001000U)

◆ CSL_DSS_VP4_POL_FREQ_IVS_SHIFT

#define CSL_DSS_VP4_POL_FREQ_IVS_SHIFT   (0x0000000CU)

◆ CSL_DSS_VP4_POL_FREQ_IVS_MAX

#define CSL_DSS_VP4_POL_FREQ_IVS_MAX   (0x00000001U)

◆ CSL_DSS_VP4_POL_FREQ_IVS_VAL_FCKPINAH

#define CSL_DSS_VP4_POL_FREQ_IVS_VAL_FCKPINAH   (0x0U)

◆ CSL_DSS_VP4_POL_FREQ_IVS_VAL_FCKPINAL

#define CSL_DSS_VP4_POL_FREQ_IVS_VAL_FCKPINAL   (0x1U)

◆ CSL_DSS_VP4_POL_FREQ_IHS_MASK

#define CSL_DSS_VP4_POL_FREQ_IHS_MASK   (0x00002000U)

◆ CSL_DSS_VP4_POL_FREQ_IHS_SHIFT

#define CSL_DSS_VP4_POL_FREQ_IHS_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP4_POL_FREQ_IHS_MAX

#define CSL_DSS_VP4_POL_FREQ_IHS_MAX   (0x00000001U)

◆ CSL_DSS_VP4_POL_FREQ_IHS_VAL_LCKPINAH

#define CSL_DSS_VP4_POL_FREQ_IHS_VAL_LCKPINAH   (0x0U)

◆ CSL_DSS_VP4_POL_FREQ_IHS_VAL_LCKPINAL

#define CSL_DSS_VP4_POL_FREQ_IHS_VAL_LCKPINAL   (0x1U)

◆ CSL_DSS_VP4_POL_FREQ_IPC_MASK

#define CSL_DSS_VP4_POL_FREQ_IPC_MASK   (0x00004000U)

◆ CSL_DSS_VP4_POL_FREQ_IPC_SHIFT

#define CSL_DSS_VP4_POL_FREQ_IPC_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP4_POL_FREQ_IPC_MAX

#define CSL_DSS_VP4_POL_FREQ_IPC_MAX   (0x00000001U)

◆ CSL_DSS_VP4_POL_FREQ_IPC_VAL_DRPCK

#define CSL_DSS_VP4_POL_FREQ_IPC_VAL_DRPCK   (0x0U)

◆ CSL_DSS_VP4_POL_FREQ_IPC_VAL_DFPCK

#define CSL_DSS_VP4_POL_FREQ_IPC_VAL_DFPCK   (0x1U)

◆ CSL_DSS_VP4_POL_FREQ_IEO_MASK

#define CSL_DSS_VP4_POL_FREQ_IEO_MASK   (0x00008000U)

◆ CSL_DSS_VP4_POL_FREQ_IEO_SHIFT

#define CSL_DSS_VP4_POL_FREQ_IEO_SHIFT   (0x0000000FU)

◆ CSL_DSS_VP4_POL_FREQ_IEO_MAX

#define CSL_DSS_VP4_POL_FREQ_IEO_MAX   (0x00000001U)

◆ CSL_DSS_VP4_POL_FREQ_IEO_VAL_ACBAHIGH

#define CSL_DSS_VP4_POL_FREQ_IEO_VAL_ACBAHIGH   (0x0U)

◆ CSL_DSS_VP4_POL_FREQ_IEO_VAL_ACBALOW

#define CSL_DSS_VP4_POL_FREQ_IEO_VAL_ACBALOW   (0x1U)

◆ CSL_DSS_VP4_POL_FREQ_RF_MASK

#define CSL_DSS_VP4_POL_FREQ_RF_MASK   (0x00010000U)

◆ CSL_DSS_VP4_POL_FREQ_RF_SHIFT

#define CSL_DSS_VP4_POL_FREQ_RF_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_POL_FREQ_RF_MAX

#define CSL_DSS_VP4_POL_FREQ_RF_MAX   (0x00000001U)

◆ CSL_DSS_VP4_POL_FREQ_RF_VAL_DFEDPCK

#define CSL_DSS_VP4_POL_FREQ_RF_VAL_DFEDPCK   (0x0U)

◆ CSL_DSS_VP4_POL_FREQ_RF_VAL_DRIEDPCK

#define CSL_DSS_VP4_POL_FREQ_RF_VAL_DRIEDPCK   (0x1U)

◆ CSL_DSS_VP4_POL_FREQ_ONOFF_MASK

#define CSL_DSS_VP4_POL_FREQ_ONOFF_MASK   (0x00020000U)

◆ CSL_DSS_VP4_POL_FREQ_ONOFF_SHIFT

#define CSL_DSS_VP4_POL_FREQ_ONOFF_SHIFT   (0x00000011U)

◆ CSL_DSS_VP4_POL_FREQ_ONOFF_MAX

#define CSL_DSS_VP4_POL_FREQ_ONOFF_MAX   (0x00000001U)

◆ CSL_DSS_VP4_POL_FREQ_ONOFF_VAL_DOPEDPCK

#define CSL_DSS_VP4_POL_FREQ_ONOFF_VAL_DOPEDPCK   (0x0U)

◆ CSL_DSS_VP4_POL_FREQ_ONOFF_VAL_DBIT16

#define CSL_DSS_VP4_POL_FREQ_ONOFF_VAL_DBIT16   (0x1U)

◆ CSL_DSS_VP4_POL_FREQ_ALIGN_MASK

#define CSL_DSS_VP4_POL_FREQ_ALIGN_MASK   (0x00040000U)

◆ CSL_DSS_VP4_POL_FREQ_ALIGN_SHIFT

#define CSL_DSS_VP4_POL_FREQ_ALIGN_SHIFT   (0x00000012U)

◆ CSL_DSS_VP4_POL_FREQ_ALIGN_MAX

#define CSL_DSS_VP4_POL_FREQ_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_VP4_POL_FREQ_ALIGN_VAL_NOTALIGNED

#define CSL_DSS_VP4_POL_FREQ_ALIGN_VAL_NOTALIGNED   (0x0U)

◆ CSL_DSS_VP4_POL_FREQ_ALIGN_VAL_ALIGNED

#define CSL_DSS_VP4_POL_FREQ_ALIGN_VAL_ALIGNED   (0x1U)

◆ CSL_DSS_VP4_POL_FREQ_RESERVED_MASK

#define CSL_DSS_VP4_POL_FREQ_RESERVED_MASK   (0xFFF80000U)

◆ CSL_DSS_VP4_POL_FREQ_RESERVED_SHIFT

#define CSL_DSS_VP4_POL_FREQ_RESERVED_SHIFT   (0x00000013U)

◆ CSL_DSS_VP4_POL_FREQ_RESERVED_MAX

#define CSL_DSS_VP4_POL_FREQ_RESERVED_MAX   (0x00001FFFU)

◆ CSL_DSS_VP4_SIZE_SCREEN_PPL_MASK

#define CSL_DSS_VP4_SIZE_SCREEN_PPL_MASK   (0x00003FFFU)

◆ CSL_DSS_VP4_SIZE_SCREEN_PPL_SHIFT

#define CSL_DSS_VP4_SIZE_SCREEN_PPL_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_SIZE_SCREEN_PPL_MAX

#define CSL_DSS_VP4_SIZE_SCREEN_PPL_MAX   (0x00003FFFU)

◆ CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_MASK

#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_MASK   (0x0000C000U)

◆ CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_SHIFT

#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_MAX

#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_MAX   (0x00000003U)

◆ CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_SAME

#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_SAME   (0x0U)

◆ CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE

#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_PLUSONE   (0x1U)

◆ CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE

#define CSL_DSS_VP4_SIZE_SCREEN_DELTA_LPP_VAL_MINUSONE   (0x2U)

◆ CSL_DSS_VP4_SIZE_SCREEN_LPP_MASK

#define CSL_DSS_VP4_SIZE_SCREEN_LPP_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP4_SIZE_SCREEN_LPP_SHIFT

#define CSL_DSS_VP4_SIZE_SCREEN_LPP_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_SIZE_SCREEN_LPP_MAX

#define CSL_DSS_VP4_SIZE_SCREEN_LPP_MAX   (0x00003FFFU)

◆ CSL_DSS_VP4_TIMING_H_HSW_MASK

#define CSL_DSS_VP4_TIMING_H_HSW_MASK   (0x000000FFU)

◆ CSL_DSS_VP4_TIMING_H_HSW_SHIFT

#define CSL_DSS_VP4_TIMING_H_HSW_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_TIMING_H_HSW_MAX

#define CSL_DSS_VP4_TIMING_H_HSW_MAX   (0x000000FFU)

◆ CSL_DSS_VP4_TIMING_H_HFP_MASK

#define CSL_DSS_VP4_TIMING_H_HFP_MASK   (0x000FFF00U)

◆ CSL_DSS_VP4_TIMING_H_HFP_SHIFT

#define CSL_DSS_VP4_TIMING_H_HFP_SHIFT   (0x00000008U)

◆ CSL_DSS_VP4_TIMING_H_HFP_MAX

#define CSL_DSS_VP4_TIMING_H_HFP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP4_TIMING_H_HBP_MASK

#define CSL_DSS_VP4_TIMING_H_HBP_MASK   (0xFFF00000U)

◆ CSL_DSS_VP4_TIMING_H_HBP_SHIFT

#define CSL_DSS_VP4_TIMING_H_HBP_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_TIMING_H_HBP_MAX

#define CSL_DSS_VP4_TIMING_H_HBP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP4_TIMING_V_VSW_MASK

#define CSL_DSS_VP4_TIMING_V_VSW_MASK   (0x000000FFU)

◆ CSL_DSS_VP4_TIMING_V_VSW_SHIFT

#define CSL_DSS_VP4_TIMING_V_VSW_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_TIMING_V_VSW_MAX

#define CSL_DSS_VP4_TIMING_V_VSW_MAX   (0x000000FFU)

◆ CSL_DSS_VP4_TIMING_V_VFP_MASK

#define CSL_DSS_VP4_TIMING_V_VFP_MASK   (0x000FFF00U)

◆ CSL_DSS_VP4_TIMING_V_VFP_SHIFT

#define CSL_DSS_VP4_TIMING_V_VFP_SHIFT   (0x00000008U)

◆ CSL_DSS_VP4_TIMING_V_VFP_MAX

#define CSL_DSS_VP4_TIMING_V_VFP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP4_TIMING_V_VBP_MASK

#define CSL_DSS_VP4_TIMING_V_VBP_MASK   (0xFFF00000U)

◆ CSL_DSS_VP4_TIMING_V_VBP_SHIFT

#define CSL_DSS_VP4_TIMING_V_VBP_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_TIMING_V_VBP_MAX

#define CSL_DSS_VP4_TIMING_V_VBP_MAX   (0x00000FFFU)

◆ CSL_DSS_VP4_CSC_COEF3_C20_MASK

#define CSL_DSS_VP4_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF3_C20_SHIFT

#define CSL_DSS_VP4_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CSC_COEF3_C20_MAX

#define CSL_DSS_VP4_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_VP4_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP4_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_VP4_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_CSC_COEF3_C21_MASK

#define CSL_DSS_VP4_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_VP4_CSC_COEF3_C21_SHIFT

#define CSL_DSS_VP4_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_CSC_COEF3_C21_MAX

#define CSL_DSS_VP4_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_VP4_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_VP4_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_VP4_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_VP4_CSC_COEF4_C22_MASK

#define CSL_DSS_VP4_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF4_C22_SHIFT

#define CSL_DSS_VP4_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CSC_COEF4_C22_MAX

#define CSL_DSS_VP4_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_VP4_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_VP4_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP4_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_VP4_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_VP4_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_VP4_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_VP4_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_VP4_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VP4_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_VP4_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP4_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_VP4_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_VP4_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_VP4_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VP4_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_VP4_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_VP4_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_VP4_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_VP4_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VP4_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_VP4_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP4_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_VP4_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_VP4_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_VP4_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_VP4_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_VP4_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_VP4_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_VP4_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_VP4_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_VP4_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_VP4_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_VP4_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_VP4_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_VP4_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_MASK   (0x00000002U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000001U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_FRAMEFREEZE   (0x0U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_CAPTUREMODE_VAL_DATACHECK   (0x1U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_MASK

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_MASK   (0x00000004U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_SHIFT   (0x00000002U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_MAX

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_MAX   (0x00000001U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_DISABLE   (0x0U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_SEEDSELECT_VAL_ENABLE   (0x1U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_MASK

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_MASK   (0x000007F8U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_SHIFT   (0x00000003U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_MAX

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_THRESHOLD_MAX   (0x000000FFU)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_MASK

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_MASK   (0x00001800U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_SHIFT   (0x0000000BU)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_MAX

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_MAX   (0x00000003U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_NOSKIP   (0x0U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_EVEN   (0x1U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_ODD   (0x2U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_FRAMESKIP_VAL_RESERVED   (0x3U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_MASK

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_MASK   (0xFFFFE000U)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_SHIFT

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_SHIFT   (0x0000000DU)

◆ CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_MAX

#define CSL_DSS_VP4_SAFETY_ATTRIBUTES_RESERVED_MAX   (0x0007FFFFU)

◆ CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VP4_SAFETY_CAPT_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_SAFETY_POSITION_POSX_MASK

#define CSL_DSS_VP4_SAFETY_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_VP4_SAFETY_POSITION_POSX_SHIFT

#define CSL_DSS_VP4_SAFETY_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_SAFETY_POSITION_POSX_MAX

#define CSL_DSS_VP4_SAFETY_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_VP4_SAFETY_POSITION_POSY_MASK

#define CSL_DSS_VP4_SAFETY_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP4_SAFETY_POSITION_POSY_SHIFT

#define CSL_DSS_VP4_SAFETY_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_SAFETY_POSITION_POSY_MAX

#define CSL_DSS_VP4_SAFETY_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_MASK

#define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT

#define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_MAX

#define CSL_DSS_VP4_SAFETY_REF_SIGNATURE_SIGNATURE_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_SAFETY_SIZE_SIZEX_MASK

#define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_VP4_SAFETY_SIZE_SIZEX_SHIFT

#define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_SAFETY_SIZE_SIZEX_MAX

#define CSL_DSS_VP4_SAFETY_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_VP4_SAFETY_SIZE_SIZEY_MASK

#define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_VP4_SAFETY_SIZE_SIZEY_SHIFT

#define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_VP4_SAFETY_SIZE_SIZEY_MAX

#define CSL_DSS_VP4_SAFETY_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_MASK

#define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_SHIFT

#define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_MAX

#define CSL_DSS_VP4_SAFETY_LFSR_SEED_SEED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_0_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_0_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_1_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_1_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_2_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_2_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_3_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_3_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_4_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_4_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_5_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_5_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_6_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_6_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_7_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_7_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_8_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_8_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_9_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_9_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_10_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_10_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_11_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_11_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_12_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_12_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_13_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_13_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_14_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_14_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_MASK   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_B_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_MASK   (0x000FFC00U)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_SHIFT   (0x0000000AU)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_G_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_MASK   (0x3FF00000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_SHIFT   (0x00000014U)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_15_VALUE_R_MAX   (0x000003FFU)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_MASK

#define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_MASK   (0x80000000U)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_SHIFT

#define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_SHIFT   (0x0000001FU)

◆ CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_MAX

#define CSL_DSS_VP4_GAMMA_TABLE_15_INDEX_MAX   (0x00000001U)

◆ CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_MASK

#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_MASK   (0x00003FFFU)

◆ CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_SHIFT

#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_MAX

#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED1_MAX   (0x00003FFFU)

◆ CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_MASK

#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_MASK   (0xFFFFC000U)

◆ CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_SHIFT

#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_MAX

#define CSL_DSS_VP4_DSS_OLDI_CFG_RESERVED_MAX   (0x0003FFFFU)

◆ CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_MASK

#define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_SHIFT

#define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_MAX

#define CSL_DSS_VP4_DSS_OLDI_STATUS_RESERVED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_MASK

#define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_SHIFT

#define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_MAX

#define CSL_DSS_VP4_DSS_OLDI_LB_RESERVED_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_VP4_SECURE_SECURE_MASK

#define CSL_DSS_VP4_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_VP4_SECURE_SECURE_SHIFT

#define CSL_DSS_VP4_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_VP4_SECURE_SECURE_MAX

#define CSL_DSS_VP4_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_VP4_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_VP4_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_VP4_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_VP4_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_VP4_SECURE_RESERVED_MASK

#define CSL_DSS_VP4_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_VP4_SECURE_RESERVED_SHIFT

#define CSL_DSS_VP4_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_VP4_SECURE_RESERVED_MAX

#define CSL_DSS_VP4_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_WB_ACCUH_0

#define CSL_DSS_WB_ACCUH_0   (0x00000000U)

◆ CSL_DSS_WB_ACCUH_1

#define CSL_DSS_WB_ACCUH_1   (0x00000004U)

◆ CSL_DSS_WB_ACCUH2_0

#define CSL_DSS_WB_ACCUH2_0   (0x00000008U)

◆ CSL_DSS_WB_ACCUH2_1

#define CSL_DSS_WB_ACCUH2_1   (0x0000000CU)

◆ CSL_DSS_WB_ACCUV_0

#define CSL_DSS_WB_ACCUV_0   (0x00000010U)

◆ CSL_DSS_WB_ACCUV_1

#define CSL_DSS_WB_ACCUV_1   (0x00000014U)

◆ CSL_DSS_WB_ACCUV2_0

#define CSL_DSS_WB_ACCUV2_0   (0x00000018U)

◆ CSL_DSS_WB_ACCUV2_1

#define CSL_DSS_WB_ACCUV2_1   (0x0000001CU)

◆ CSL_DSS_WB_ATTRIBUTES

#define CSL_DSS_WB_ATTRIBUTES   (0x00000020U)

◆ CSL_DSS_WB_ATTRIBUTES2

#define CSL_DSS_WB_ATTRIBUTES2   (0x00000024U)

◆ CSL_DSS_WB_BA_0

#define CSL_DSS_WB_BA_0   (0x00000028U)

◆ CSL_DSS_WB_BA_1

#define CSL_DSS_WB_BA_1   (0x0000002CU)

◆ CSL_DSS_WB_BA_UV_0

#define CSL_DSS_WB_BA_UV_0   (0x00000030U)

◆ CSL_DSS_WB_BA_UV_1

#define CSL_DSS_WB_BA_UV_1   (0x00000034U)

◆ CSL_DSS_WB_BUF_SIZE_STATUS

#define CSL_DSS_WB_BUF_SIZE_STATUS   (0x00000038U)

◆ CSL_DSS_WB_BUF_THRESHOLD

#define CSL_DSS_WB_BUF_THRESHOLD   (0x0000003CU)

◆ CSL_DSS_WB_CSC_COEF0

#define CSL_DSS_WB_CSC_COEF0   (0x00000040U)

◆ CSL_DSS_WB_CSC_COEF1

#define CSL_DSS_WB_CSC_COEF1   (0x00000044U)

◆ CSL_DSS_WB_CSC_COEF2

#define CSL_DSS_WB_CSC_COEF2   (0x00000048U)

◆ CSL_DSS_WB_CSC_COEF3

#define CSL_DSS_WB_CSC_COEF3   (0x0000004CU)

◆ CSL_DSS_WB_CSC_COEF4

#define CSL_DSS_WB_CSC_COEF4   (0x00000050U)

◆ CSL_DSS_WB_CSC_COEF5

#define CSL_DSS_WB_CSC_COEF5   (0x00000054U)

◆ CSL_DSS_WB_CSC_COEF6

#define CSL_DSS_WB_CSC_COEF6   (0x00000058U)

◆ CSL_DSS_WB_FIRH

#define CSL_DSS_WB_FIRH   (0x0000005CU)

◆ CSL_DSS_WB_FIRH2

#define CSL_DSS_WB_FIRH2   (0x00000060U)

◆ CSL_DSS_WB_FIRV

#define CSL_DSS_WB_FIRV   (0x00000064U)

◆ CSL_DSS_WB_FIRV2

#define CSL_DSS_WB_FIRV2   (0x00000068U)

◆ CSL_DSS_WB_FIR_COEF_H0

#define CSL_DSS_WB_FIR_COEF_H0 (   index)    (0x0000006CU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_WB_FIR_COEF_H0_C

#define CSL_DSS_WB_FIR_COEF_H0_C (   index)    (0x00000090U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_WB_FIR_COEF_H12

#define CSL_DSS_WB_FIR_COEF_H12 (   index)    (0x000000B4U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_WB_FIR_COEF_H12_C

#define CSL_DSS_WB_FIR_COEF_H12_C (   index)    (0x000000F4U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_WB_FIR_COEF_V0

#define CSL_DSS_WB_FIR_COEF_V0 (   index)    (0x00000134U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_WB_FIR_COEF_V0_C

#define CSL_DSS_WB_FIR_COEF_V0_C (   index)    (0x00000158U+((uint32_t)(index)*0x4U))

◆ CSL_DSS_WB_FIR_COEF_V12

#define CSL_DSS_WB_FIR_COEF_V12 (   index)    (0x0000017CU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_WB_FIR_COEF_V12_C

#define CSL_DSS_WB_FIR_COEF_V12_C (   index)    (0x000001BCU+((uint32_t)(index)*0x4U))

◆ CSL_DSS_WB_MFLAG_THRESHOLD

#define CSL_DSS_WB_MFLAG_THRESHOLD   (0x00000204U)

◆ CSL_DSS_WB_PICTURE_SIZE

#define CSL_DSS_WB_PICTURE_SIZE   (0x00000208U)

◆ CSL_DSS_WB_SIZE

#define CSL_DSS_WB_SIZE   (0x00000210U)

◆ CSL_DSS_WB_POSITION

#define CSL_DSS_WB_POSITION   (0x00000214U)

◆ CSL_DSS_WB_CSC_COEF7

#define CSL_DSS_WB_CSC_COEF7   (0x0000021CU)

◆ CSL_DSS_WB_ROW_INC

#define CSL_DSS_WB_ROW_INC   (0x00000224U)

◆ CSL_DSS_WB_ROW_INC_UV

#define CSL_DSS_WB_ROW_INC_UV   (0x00000228U)

◆ CSL_DSS_WB_BA_EXT_0

#define CSL_DSS_WB_BA_EXT_0   (0x0000022CU)

◆ CSL_DSS_WB_BA_EXT_1

#define CSL_DSS_WB_BA_EXT_1   (0x00000230U)

◆ CSL_DSS_WB_BA_UV_EXT_0

#define CSL_DSS_WB_BA_UV_EXT_0   (0x00000234U)

◆ CSL_DSS_WB_BA_UV_EXT_1

#define CSL_DSS_WB_BA_UV_EXT_1   (0x00000238U)

◆ CSL_DSS_WB_SECURE

#define CSL_DSS_WB_SECURE   (0x00000248U)

◆ CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_MASK

#define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_SHIFT

#define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_MAX

#define CSL_DSS_WB_ACCUH_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUH_0_RESERVED_MASK

#define CSL_DSS_WB_ACCUH_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_ACCUH_0_RESERVED_SHIFT

#define CSL_DSS_WB_ACCUH_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ACCUH_0_RESERVED_MAX

#define CSL_DSS_WB_ACCUH_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_MASK

#define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_SHIFT

#define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_MAX

#define CSL_DSS_WB_ACCUH_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUH_1_RESERVED_MASK

#define CSL_DSS_WB_ACCUH_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_ACCUH_1_RESERVED_SHIFT

#define CSL_DSS_WB_ACCUH_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ACCUH_1_RESERVED_MAX

#define CSL_DSS_WB_ACCUH_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_MASK

#define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_SHIFT

#define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_MAX

#define CSL_DSS_WB_ACCUH2_0_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUH2_0_RESERVED_MASK

#define CSL_DSS_WB_ACCUH2_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_ACCUH2_0_RESERVED_SHIFT

#define CSL_DSS_WB_ACCUH2_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ACCUH2_0_RESERVED_MAX

#define CSL_DSS_WB_ACCUH2_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_MASK

#define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_SHIFT

#define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_MAX

#define CSL_DSS_WB_ACCUH2_1_HORIZONTALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUH2_1_RESERVED_MASK

#define CSL_DSS_WB_ACCUH2_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_ACCUH2_1_RESERVED_SHIFT

#define CSL_DSS_WB_ACCUH2_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ACCUH2_1_RESERVED_MAX

#define CSL_DSS_WB_ACCUH2_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_ACCUV_0_VERTICALACCU_MASK

#define CSL_DSS_WB_ACCUV_0_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUV_0_VERTICALACCU_SHIFT

#define CSL_DSS_WB_ACCUV_0_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ACCUV_0_VERTICALACCU_MAX

#define CSL_DSS_WB_ACCUV_0_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUV_0_RESERVED_MASK

#define CSL_DSS_WB_ACCUV_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_ACCUV_0_RESERVED_SHIFT

#define CSL_DSS_WB_ACCUV_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ACCUV_0_RESERVED_MAX

#define CSL_DSS_WB_ACCUV_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_ACCUV_1_VERTICALACCU_MASK

#define CSL_DSS_WB_ACCUV_1_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUV_1_VERTICALACCU_SHIFT

#define CSL_DSS_WB_ACCUV_1_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ACCUV_1_VERTICALACCU_MAX

#define CSL_DSS_WB_ACCUV_1_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUV_1_RESERVED_MASK

#define CSL_DSS_WB_ACCUV_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_ACCUV_1_RESERVED_SHIFT

#define CSL_DSS_WB_ACCUV_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ACCUV_1_RESERVED_MAX

#define CSL_DSS_WB_ACCUV_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_ACCUV2_0_VERTICALACCU_MASK

#define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUV2_0_VERTICALACCU_SHIFT

#define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ACCUV2_0_VERTICALACCU_MAX

#define CSL_DSS_WB_ACCUV2_0_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUV2_0_RESERVED_MASK

#define CSL_DSS_WB_ACCUV2_0_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_ACCUV2_0_RESERVED_SHIFT

#define CSL_DSS_WB_ACCUV2_0_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ACCUV2_0_RESERVED_MAX

#define CSL_DSS_WB_ACCUV2_0_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_ACCUV2_1_VERTICALACCU_MASK

#define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUV2_1_VERTICALACCU_SHIFT

#define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ACCUV2_1_VERTICALACCU_MAX

#define CSL_DSS_WB_ACCUV2_1_VERTICALACCU_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_ACCUV2_1_RESERVED_MASK

#define CSL_DSS_WB_ACCUV2_1_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_ACCUV2_1_RESERVED_SHIFT

#define CSL_DSS_WB_ACCUV2_1_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ACCUV2_1_RESERVED_MAX

#define CSL_DSS_WB_ACCUV2_1_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_ATTRIBUTES_ENABLE_MASK

#define CSL_DSS_WB_ATTRIBUTES_ENABLE_MASK   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_ENABLE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_ENABLE_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ATTRIBUTES_ENABLE_MAX

#define CSL_DSS_WB_ATTRIBUTES_ENABLE_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_ENABLE_VAL_WBDIS

#define CSL_DSS_WB_ATTRIBUTES_ENABLE_VAL_WBDIS   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_ENABLE_VAL_WBENB

#define CSL_DSS_WB_ATTRIBUTES_ENABLE_VAL_WBENB   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_MASK

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_MASK   (0x0000007EU)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_SHIFT   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_MAX

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_MAX   (0x0000003FU)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB16_4444

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB16_4444   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR16_4444

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR16_4444   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA16_4444

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA16_4444   (0x2U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB16_565

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB16_565   (0x3U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGR16_565

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGR16_565   (0x4U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB16_1555

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB16_1555   (0x5U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR16_1555

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR16_1555   (0x6U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB32_8888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB32_8888   (0x7U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR32_8888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ABGR32_8888   (0x8U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA32_8888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA32_8888   (0x9U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGRA32_8888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGRA32_8888   (0xAU)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB24P_888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB24P_888   (0xBU)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_ARGB64_16161616   (0x10U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBA64_16161616   (0x11U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB565A8

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGB565A8   (0x16U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGR565A8

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGR565A8   (0x17U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB16_4444

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB16_4444   (0x20U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR16_4444

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR16_4444   (0x21U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX16_4444

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX16_4444   (0x22U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB16_1555

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB16_1555   (0x25U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR16_1555

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR16_1555   (0x26U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB32_8888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB32_8888   (0x27U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR32_8888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XBGR32_8888   (0x28U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX32_8888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX32_8888   (0x29U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGRX32_8888

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_BGRX32_8888   (0x2AU)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_XRGB64_16161616   (0x30U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_RGBX64_16161616   (0x31U)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_NV12

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_NV12   (0x3CU)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV420_NV12

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV420_NV12   (0x3DU)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_YUV2   (0x3EU)

◆ CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY

#define CSL_DSS_WB_ATTRIBUTES_FORMAT_VAL_YUV422_UYVY   (0x3FU)

◆ CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_MASK

#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_MASK   (0x00000180U)

◆ CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_SHIFT   (0x00000007U)

◆ CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_MAX

#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_MAX   (0x00000003U)

◆ CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC

#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_RESIZEPROC   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE

#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_HRESIZE   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE

#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_VRESIZE   (0x2U)

◆ CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE

#define CSL_DSS_WB_ATTRIBUTES_RESIZEENABLE_VAL_HVRESIZE   (0x3U)

◆ CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_MASK

#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_MASK   (0x00000200U)

◆ CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_SHIFT   (0x00000009U)

◆ CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_MAX

#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_VAL_DISABLE

#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_VAL_DISABLE   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_VAL_ENABLE

#define CSL_DSS_WB_ATTRIBUTES_ALPHAENABLE_VAL_ENABLE   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED1_MASK

#define CSL_DSS_WB_ATTRIBUTES_RESERVED1_MASK   (0x00000400U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED1_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_RESERVED1_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED1_MAX

#define CSL_DSS_WB_ATTRIBUTES_RESERVED1_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_MASK

#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_MASK   (0x00000800U)

◆ CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_SHIFT   (0x0000000BU)

◆ CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_MAX

#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS

#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCDIS   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB

#define CSL_DSS_WB_ATTRIBUTES_COLORCONVENABLE_VAL_COLSPCENB   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_FULLRANGE_MASK

#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_MASK   (0x00001000U)

◆ CSL_DSS_WB_ATTRIBUTES_FULLRANGE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_SHIFT   (0x0000000CU)

◆ CSL_DSS_WB_ATTRIBUTES_FULLRANGE_MAX

#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE

#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_VAL_LIMRANGE   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE

#define CSL_DSS_WB_ATTRIBUTES_FULLRANGE_VAL_FULLRANGE   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED2_MASK

#define CSL_DSS_WB_ATTRIBUTES_RESERVED2_MASK   (0x00002000U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED2_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_RESERVED2_SHIFT   (0x0000000DU)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED2_MAX

#define CSL_DSS_WB_ATTRIBUTES_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED3_MASK

#define CSL_DSS_WB_ATTRIBUTES_RESERVED3_MASK   (0x0007C000U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED3_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_RESERVED3_SHIFT   (0x0000000EU)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED3_MAX

#define CSL_DSS_WB_ATTRIBUTES_RESERVED3_MAX   (0x0000001FU)

◆ CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_MASK

#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_MASK   (0x00080000U)

◆ CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_SHIFT   (0x00000013U)

◆ CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_MAX

#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_VAL_CAPTURE

#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_VAL_CAPTURE   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_VAL_MEM2MEM

#define CSL_DSS_WB_ATTRIBUTES_WRITEBACKMODE_VAL_MEM2MEM   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_GOBIT_MASK

#define CSL_DSS_WB_ATTRIBUTES_GOBIT_MASK   (0x00100000U)

◆ CSL_DSS_WB_ATTRIBUTES_GOBIT_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_GOBIT_SHIFT   (0x00000014U)

◆ CSL_DSS_WB_ATTRIBUTES_GOBIT_SET

#define CSL_DSS_WB_ATTRIBUTES_GOBIT_SET   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_GOBIT_MAX

#define CSL_DSS_WB_ATTRIBUTES_GOBIT_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_GOBIT_VAL_HFUISR

#define CSL_DSS_WB_ATTRIBUTES_GOBIT_VAL_HFUISR   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_GOBIT_VAL_UFPSR

#define CSL_DSS_WB_ATTRIBUTES_GOBIT_VAL_UFPSR   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_MASK

#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_MASK   (0x00200000U)

◆ CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_SHIFT   (0x00000015U)

◆ CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_MAX

#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3

#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_VAL_TAPS3   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5

#define CSL_DSS_WB_ATTRIBUTES_VERTICALTAPS_VAL_TAPS5   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED4_MASK

#define CSL_DSS_WB_ATTRIBUTES_RESERVED4_MASK   (0x00400000U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED4_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_RESERVED4_SHIFT   (0x00000016U)

◆ CSL_DSS_WB_ATTRIBUTES_RESERVED4_MAX

#define CSL_DSS_WB_ATTRIBUTES_RESERVED4_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_ARBITRATION_MASK

#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_MASK   (0x00800000U)

◆ CSL_DSS_WB_ATTRIBUTES_ARBITRATION_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_SHIFT   (0x00000017U)

◆ CSL_DSS_WB_ATTRIBUTES_ARBITRATION_MAX

#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO

#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_VAL_NORMALPRIO   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO

#define CSL_DSS_WB_ATTRIBUTES_ARBITRATION_VAL_HIGHPRIO   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_MASK

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_MASK   (0x07000000U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_MAX

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_MAX   (0x00000007U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ALL

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ALL   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_2

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_2   (0x2U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_3

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_3   (0x3U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_4

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_4   (0x4U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_5

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_5   (0x5U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_6

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_6   (0x6U)

◆ CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_7

#define CSL_DSS_WB_ATTRIBUTES_CAPTUREMODE_VAL_ONLY1_7   (0x7U)

◆ CSL_DSS_WB_ATTRIBUTES_IDLESIZE_MASK

#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_MASK   (0x08000000U)

◆ CSL_DSS_WB_ATTRIBUTES_IDLESIZE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_SHIFT   (0x0000001BU)

◆ CSL_DSS_WB_ATTRIBUTES_IDLESIZE_MAX

#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES_IDLESIZE_VAL_IDLESINGLE

#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_VAL_IDLESINGLE   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES_IDLESIZE_VAL_IDLEBURST

#define CSL_DSS_WB_ATTRIBUTES_IDLESIZE_VAL_IDLEBURST   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_MASK

#define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_MASK   (0xF0000000U)

◆ CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_SHIFT

#define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_SHIFT   (0x0000001CU)

◆ CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_MAX

#define CSL_DSS_WB_ATTRIBUTES_IDLENUMBER_MAX   (0x0000000FU)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED_MASK

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED_MASK   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED_SHIFT

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED_MAX

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED0_MASK

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_MASK   (0x0000007EU)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED0_SHIFT

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_SHIFT   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED0_MAX

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED0_MAX   (0x0000003FU)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_MASK

#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_MASK   (0x00000180U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_SHIFT   (0x00000007U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_MAX

#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_MAX   (0x00000003U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_8B

#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_8B   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_10B

#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_10B   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_12B

#define CSL_DSS_WB_ATTRIBUTES2_YUV_SIZE_VAL_12B   (0x2U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_MASK

#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_MASK   (0x00000200U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_SHIFT

#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_SHIFT   (0x00000009U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_MAX

#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_VAL_PACKED

#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_VAL_PACKED   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED

#define CSL_DSS_WB_ATTRIBUTES2_YUV_MODE_VAL_UNPACKED   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_MASK

#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_MASK   (0x00000400U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_SHIFT

#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_MAX

#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_MAX   (0x00000001U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_VAL_MSB

#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_VAL_MSB   (0x1U)

◆ CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_VAL_LSB

#define CSL_DSS_WB_ATTRIBUTES2_YUV_ALIGN_VAL_LSB   (0x0U)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED1_MASK

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_MASK   (0x03FFF800U)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED1_SHIFT

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_SHIFT   (0x0000000BU)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED1_MAX

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED1_MAX   (0x00007FFFU)

◆ CSL_DSS_WB_ATTRIBUTES2_TAGS_MASK

#define CSL_DSS_WB_ATTRIBUTES2_TAGS_MASK   (0x7C000000U)

◆ CSL_DSS_WB_ATTRIBUTES2_TAGS_SHIFT

#define CSL_DSS_WB_ATTRIBUTES2_TAGS_SHIFT   (0x0000001AU)

◆ CSL_DSS_WB_ATTRIBUTES2_TAGS_MAX

#define CSL_DSS_WB_ATTRIBUTES2_TAGS_MAX   (0x0000001FU)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED2_MASK

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_MASK   (0x80000000U)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED2_SHIFT

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_SHIFT   (0x0000001FU)

◆ CSL_DSS_WB_ATTRIBUTES2_RESERVED2_MAX

#define CSL_DSS_WB_ATTRIBUTES2_RESERVED2_MAX   (0x00000001U)

◆ CSL_DSS_WB_BA_0_BA_MASK

#define CSL_DSS_WB_BA_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BA_0_BA_SHIFT

#define CSL_DSS_WB_BA_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BA_0_BA_MAX

#define CSL_DSS_WB_BA_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BA_1_BA_MASK

#define CSL_DSS_WB_BA_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BA_1_BA_SHIFT

#define CSL_DSS_WB_BA_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BA_1_BA_MAX

#define CSL_DSS_WB_BA_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BA_UV_0_BA_MASK

#define CSL_DSS_WB_BA_UV_0_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BA_UV_0_BA_SHIFT

#define CSL_DSS_WB_BA_UV_0_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BA_UV_0_BA_MAX

#define CSL_DSS_WB_BA_UV_0_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BA_UV_1_BA_MASK

#define CSL_DSS_WB_BA_UV_1_BA_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BA_UV_1_BA_SHIFT

#define CSL_DSS_WB_BA_UV_1_BA_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BA_UV_1_BA_MAX

#define CSL_DSS_WB_BA_UV_1_BA_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_MASK

#define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_MASK   (0x0000FFFFU)

◆ CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_SHIFT

#define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_MAX

#define CSL_DSS_WB_BUF_SIZE_STATUS_BUFSIZE_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_MASK

#define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_SHIFT

#define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_MAX

#define CSL_DSS_WB_BUF_SIZE_STATUS_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK

#define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_MASK   (0x0000FFFFU)

◆ CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT

#define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX

#define CSL_DSS_WB_BUF_THRESHOLD_BUFLOWTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK

#define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MASK   (0xFFFF0000U)

◆ CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT

#define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX

#define CSL_DSS_WB_BUF_THRESHOLD_BUFHIGHTHRESHOLD_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_CSC_COEF0_C00_MASK

#define CSL_DSS_WB_CSC_COEF0_C00_MASK   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF0_C00_SHIFT

#define CSL_DSS_WB_CSC_COEF0_C00_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_CSC_COEF0_C00_MAX

#define CSL_DSS_WB_CSC_COEF0_C00_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF0_RESERVED_53_MASK

#define CSL_DSS_WB_CSC_COEF0_RESERVED_53_MASK   (0x0000F800U)

◆ CSL_DSS_WB_CSC_COEF0_RESERVED_53_SHIFT

#define CSL_DSS_WB_CSC_COEF0_RESERVED_53_SHIFT   (0x0000000BU)

◆ CSL_DSS_WB_CSC_COEF0_RESERVED_53_MAX

#define CSL_DSS_WB_CSC_COEF0_RESERVED_53_MAX   (0x0000001FU)

◆ CSL_DSS_WB_CSC_COEF0_C01_MASK

#define CSL_DSS_WB_CSC_COEF0_C01_MASK   (0x07FF0000U)

◆ CSL_DSS_WB_CSC_COEF0_C01_SHIFT

#define CSL_DSS_WB_CSC_COEF0_C01_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_CSC_COEF0_C01_MAX

#define CSL_DSS_WB_CSC_COEF0_C01_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF0_RESERVED_52_MASK

#define CSL_DSS_WB_CSC_COEF0_RESERVED_52_MASK   (0xF8000000U)

◆ CSL_DSS_WB_CSC_COEF0_RESERVED_52_SHIFT

#define CSL_DSS_WB_CSC_COEF0_RESERVED_52_SHIFT   (0x0000001BU)

◆ CSL_DSS_WB_CSC_COEF0_RESERVED_52_MAX

#define CSL_DSS_WB_CSC_COEF0_RESERVED_52_MAX   (0x0000001FU)

◆ CSL_DSS_WB_CSC_COEF1_C02_MASK

#define CSL_DSS_WB_CSC_COEF1_C02_MASK   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF1_C02_SHIFT

#define CSL_DSS_WB_CSC_COEF1_C02_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_CSC_COEF1_C02_MAX

#define CSL_DSS_WB_CSC_COEF1_C02_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF1_RESERVED_55_MASK

#define CSL_DSS_WB_CSC_COEF1_RESERVED_55_MASK   (0x0000F800U)

◆ CSL_DSS_WB_CSC_COEF1_RESERVED_55_SHIFT

#define CSL_DSS_WB_CSC_COEF1_RESERVED_55_SHIFT   (0x0000000BU)

◆ CSL_DSS_WB_CSC_COEF1_RESERVED_55_MAX

#define CSL_DSS_WB_CSC_COEF1_RESERVED_55_MAX   (0x0000001FU)

◆ CSL_DSS_WB_CSC_COEF1_C10_MASK

#define CSL_DSS_WB_CSC_COEF1_C10_MASK   (0x07FF0000U)

◆ CSL_DSS_WB_CSC_COEF1_C10_SHIFT

#define CSL_DSS_WB_CSC_COEF1_C10_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_CSC_COEF1_C10_MAX

#define CSL_DSS_WB_CSC_COEF1_C10_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF1_RESERVED_54_MASK

#define CSL_DSS_WB_CSC_COEF1_RESERVED_54_MASK   (0xF8000000U)

◆ CSL_DSS_WB_CSC_COEF1_RESERVED_54_SHIFT

#define CSL_DSS_WB_CSC_COEF1_RESERVED_54_SHIFT   (0x0000001BU)

◆ CSL_DSS_WB_CSC_COEF1_RESERVED_54_MAX

#define CSL_DSS_WB_CSC_COEF1_RESERVED_54_MAX   (0x0000001FU)

◆ CSL_DSS_WB_CSC_COEF2_C11_MASK

#define CSL_DSS_WB_CSC_COEF2_C11_MASK   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF2_C11_SHIFT

#define CSL_DSS_WB_CSC_COEF2_C11_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_CSC_COEF2_C11_MAX

#define CSL_DSS_WB_CSC_COEF2_C11_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF2_RESERVED_57_MASK

#define CSL_DSS_WB_CSC_COEF2_RESERVED_57_MASK   (0x0000F800U)

◆ CSL_DSS_WB_CSC_COEF2_RESERVED_57_SHIFT

#define CSL_DSS_WB_CSC_COEF2_RESERVED_57_SHIFT   (0x0000000BU)

◆ CSL_DSS_WB_CSC_COEF2_RESERVED_57_MAX

#define CSL_DSS_WB_CSC_COEF2_RESERVED_57_MAX   (0x0000001FU)

◆ CSL_DSS_WB_CSC_COEF2_C12_MASK

#define CSL_DSS_WB_CSC_COEF2_C12_MASK   (0x07FF0000U)

◆ CSL_DSS_WB_CSC_COEF2_C12_SHIFT

#define CSL_DSS_WB_CSC_COEF2_C12_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_CSC_COEF2_C12_MAX

#define CSL_DSS_WB_CSC_COEF2_C12_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF2_RESERVED_56_MASK

#define CSL_DSS_WB_CSC_COEF2_RESERVED_56_MASK   (0xF8000000U)

◆ CSL_DSS_WB_CSC_COEF2_RESERVED_56_SHIFT

#define CSL_DSS_WB_CSC_COEF2_RESERVED_56_SHIFT   (0x0000001BU)

◆ CSL_DSS_WB_CSC_COEF2_RESERVED_56_MAX

#define CSL_DSS_WB_CSC_COEF2_RESERVED_56_MAX   (0x0000001FU)

◆ CSL_DSS_WB_CSC_COEF3_C20_MASK

#define CSL_DSS_WB_CSC_COEF3_C20_MASK   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF3_C20_SHIFT

#define CSL_DSS_WB_CSC_COEF3_C20_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_CSC_COEF3_C20_MAX

#define CSL_DSS_WB_CSC_COEF3_C20_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF3_RESERVED_59_MASK

#define CSL_DSS_WB_CSC_COEF3_RESERVED_59_MASK   (0x0000F800U)

◆ CSL_DSS_WB_CSC_COEF3_RESERVED_59_SHIFT

#define CSL_DSS_WB_CSC_COEF3_RESERVED_59_SHIFT   (0x0000000BU)

◆ CSL_DSS_WB_CSC_COEF3_RESERVED_59_MAX

#define CSL_DSS_WB_CSC_COEF3_RESERVED_59_MAX   (0x0000001FU)

◆ CSL_DSS_WB_CSC_COEF3_C21_MASK

#define CSL_DSS_WB_CSC_COEF3_C21_MASK   (0x07FF0000U)

◆ CSL_DSS_WB_CSC_COEF3_C21_SHIFT

#define CSL_DSS_WB_CSC_COEF3_C21_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_CSC_COEF3_C21_MAX

#define CSL_DSS_WB_CSC_COEF3_C21_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF3_RESERVED_58_MASK

#define CSL_DSS_WB_CSC_COEF3_RESERVED_58_MASK   (0xF8000000U)

◆ CSL_DSS_WB_CSC_COEF3_RESERVED_58_SHIFT

#define CSL_DSS_WB_CSC_COEF3_RESERVED_58_SHIFT   (0x0000001BU)

◆ CSL_DSS_WB_CSC_COEF3_RESERVED_58_MAX

#define CSL_DSS_WB_CSC_COEF3_RESERVED_58_MAX   (0x0000001FU)

◆ CSL_DSS_WB_CSC_COEF4_C22_MASK

#define CSL_DSS_WB_CSC_COEF4_C22_MASK   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF4_C22_SHIFT

#define CSL_DSS_WB_CSC_COEF4_C22_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_CSC_COEF4_C22_MAX

#define CSL_DSS_WB_CSC_COEF4_C22_MAX   (0x000007FFU)

◆ CSL_DSS_WB_CSC_COEF4_RESERVED_60_MASK

#define CSL_DSS_WB_CSC_COEF4_RESERVED_60_MASK   (0xFFFFF800U)

◆ CSL_DSS_WB_CSC_COEF4_RESERVED_60_SHIFT

#define CSL_DSS_WB_CSC_COEF4_RESERVED_60_SHIFT   (0x0000000BU)

◆ CSL_DSS_WB_CSC_COEF4_RESERVED_60_MAX

#define CSL_DSS_WB_CSC_COEF4_RESERVED_60_MAX   (0x001FFFFFU)

◆ CSL_DSS_WB_CSC_COEF5_RESERVED_MASK

#define CSL_DSS_WB_CSC_COEF5_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF5_RESERVED_SHIFT

#define CSL_DSS_WB_CSC_COEF5_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_CSC_COEF5_RESERVED_MAX

#define CSL_DSS_WB_CSC_COEF5_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF5_PREOFFSET1_MASK

#define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_MASK   (0x0000FFF8U)

◆ CSL_DSS_WB_CSC_COEF5_PREOFFSET1_SHIFT

#define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_SHIFT   (0x00000003U)

◆ CSL_DSS_WB_CSC_COEF5_PREOFFSET1_MAX

#define CSL_DSS_WB_CSC_COEF5_PREOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_WB_CSC_COEF5_RESERVED1_MASK

#define CSL_DSS_WB_CSC_COEF5_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_WB_CSC_COEF5_RESERVED1_SHIFT

#define CSL_DSS_WB_CSC_COEF5_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_CSC_COEF5_RESERVED1_MAX

#define CSL_DSS_WB_CSC_COEF5_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF5_PREOFFSET2_MASK

#define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_MASK   (0xFFF80000U)

◆ CSL_DSS_WB_CSC_COEF5_PREOFFSET2_SHIFT

#define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_SHIFT   (0x00000013U)

◆ CSL_DSS_WB_CSC_COEF5_PREOFFSET2_MAX

#define CSL_DSS_WB_CSC_COEF5_PREOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_WB_CSC_COEF6_RESERVED_MASK

#define CSL_DSS_WB_CSC_COEF6_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF6_RESERVED_SHIFT

#define CSL_DSS_WB_CSC_COEF6_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_CSC_COEF6_RESERVED_MAX

#define CSL_DSS_WB_CSC_COEF6_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF6_PREOFFSET3_MASK

#define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_MASK   (0x0000FFF8U)

◆ CSL_DSS_WB_CSC_COEF6_PREOFFSET3_SHIFT

#define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_SHIFT   (0x00000003U)

◆ CSL_DSS_WB_CSC_COEF6_PREOFFSET3_MAX

#define CSL_DSS_WB_CSC_COEF6_PREOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_WB_CSC_COEF6_RESERVED1_MASK

#define CSL_DSS_WB_CSC_COEF6_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_WB_CSC_COEF6_RESERVED1_SHIFT

#define CSL_DSS_WB_CSC_COEF6_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_CSC_COEF6_RESERVED1_MAX

#define CSL_DSS_WB_CSC_COEF6_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_MASK

#define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_MASK   (0xFFF80000U)

◆ CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_SHIFT

#define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_SHIFT   (0x00000013U)

◆ CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_MAX

#define CSL_DSS_WB_CSC_COEF6_POSTOFFSET1_MAX   (0x00001FFFU)

◆ CSL_DSS_WB_FIRH_FIRHINC_MASK

#define CSL_DSS_WB_FIRH_FIRHINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_FIRH_FIRHINC_SHIFT

#define CSL_DSS_WB_FIRH_FIRHINC_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIRH_FIRHINC_MAX

#define CSL_DSS_WB_FIRH_FIRHINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_FIRH_RESERVED_MASK

#define CSL_DSS_WB_FIRH_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_FIRH_RESERVED_SHIFT

#define CSL_DSS_WB_FIRH_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_FIRH_RESERVED_MAX

#define CSL_DSS_WB_FIRH_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_FIRH2_FIRHINC_MASK

#define CSL_DSS_WB_FIRH2_FIRHINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_FIRH2_FIRHINC_SHIFT

#define CSL_DSS_WB_FIRH2_FIRHINC_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIRH2_FIRHINC_MAX

#define CSL_DSS_WB_FIRH2_FIRHINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_FIRH2_RESERVED_MASK

#define CSL_DSS_WB_FIRH2_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_FIRH2_RESERVED_SHIFT

#define CSL_DSS_WB_FIRH2_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_FIRH2_RESERVED_MAX

#define CSL_DSS_WB_FIRH2_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_FIRV_FIRVINC_MASK

#define CSL_DSS_WB_FIRV_FIRVINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_FIRV_FIRVINC_SHIFT

#define CSL_DSS_WB_FIRV_FIRVINC_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIRV_FIRVINC_MAX

#define CSL_DSS_WB_FIRV_FIRVINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_FIRV_RESERVED_MASK

#define CSL_DSS_WB_FIRV_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_FIRV_RESERVED_SHIFT

#define CSL_DSS_WB_FIRV_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_FIRV_RESERVED_MAX

#define CSL_DSS_WB_FIRV_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_FIRV2_FIRVINC_MASK

#define CSL_DSS_WB_FIRV2_FIRVINC_MASK   (0x00FFFFFFU)

◆ CSL_DSS_WB_FIRV2_FIRVINC_SHIFT

#define CSL_DSS_WB_FIRV2_FIRVINC_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIRV2_FIRVINC_MAX

#define CSL_DSS_WB_FIRV2_FIRVINC_MAX   (0x00FFFFFFU)

◆ CSL_DSS_WB_FIRV2_RESERVED_MASK

#define CSL_DSS_WB_FIRV2_RESERVED_MASK   (0xFF000000U)

◆ CSL_DSS_WB_FIRV2_RESERVED_SHIFT

#define CSL_DSS_WB_FIRV2_RESERVED_SHIFT   (0x00000018U)

◆ CSL_DSS_WB_FIRV2_RESERVED_MAX

#define CSL_DSS_WB_FIRV2_RESERVED_MAX   (0x000000FFU)

◆ CSL_DSS_WB_FIR_COEF_H0_FIRHC0_MASK

#define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_MASK   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H0_FIRHC0_SHIFT

#define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIR_COEF_H0_FIRHC0_MAX

#define CSL_DSS_WB_FIR_COEF_H0_FIRHC0_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H0_RESERVED_MASK

#define CSL_DSS_WB_FIR_COEF_H0_RESERVED_MASK   (0x3FFFFC00U)

◆ CSL_DSS_WB_FIR_COEF_H0_RESERVED_SHIFT

#define CSL_DSS_WB_FIR_COEF_H0_RESERVED_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_FIR_COEF_H0_RESERVED_MAX

#define CSL_DSS_WB_FIR_COEF_H0_RESERVED_MAX   (0x000FFFFFU)

◆ CSL_DSS_WB_FIR_COEF_H0_RESERVED1_MASK

#define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_FIR_COEF_H0_RESERVED1_SHIFT

#define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_FIR_COEF_H0_RESERVED1_MAX

#define CSL_DSS_WB_FIR_COEF_H0_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_MASK

#define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_MASK   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_SHIFT

#define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_MAX

#define CSL_DSS_WB_FIR_COEF_H0_C_FIRHC0_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_MASK

#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_MASK   (0x3FFFFC00U)

◆ CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_SHIFT

#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_MAX

#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED_MAX   (0x000FFFFFU)

◆ CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_MASK

#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_SHIFT

#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_MAX

#define CSL_DSS_WB_FIR_COEF_H0_C_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_FIR_COEF_H12_RESERVED_MASK

#define CSL_DSS_WB_FIR_COEF_H12_RESERVED_MASK   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H12_RESERVED_SHIFT

#define CSL_DSS_WB_FIR_COEF_H12_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIR_COEF_H12_RESERVED_MAX

#define CSL_DSS_WB_FIR_COEF_H12_RESERVED_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H12_FIRHC1_MASK

#define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_MASK   (0x000FFC00U)

◆ CSL_DSS_WB_FIR_COEF_H12_FIRHC1_SHIFT

#define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_FIR_COEF_H12_FIRHC1_MAX

#define CSL_DSS_WB_FIR_COEF_H12_FIRHC1_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H12_FIRHC2_MASK

#define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_MASK   (0x3FF00000U)

◆ CSL_DSS_WB_FIR_COEF_H12_FIRHC2_SHIFT

#define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_SHIFT   (0x00000014U)

◆ CSL_DSS_WB_FIR_COEF_H12_FIRHC2_MAX

#define CSL_DSS_WB_FIR_COEF_H12_FIRHC2_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H12_RESERVED1_MASK

#define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_FIR_COEF_H12_RESERVED1_SHIFT

#define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_FIR_COEF_H12_RESERVED1_MAX

#define CSL_DSS_WB_FIR_COEF_H12_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_MASK

#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_MASK   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_SHIFT

#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_MAX

#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_MASK

#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_MASK   (0x000FFC00U)

◆ CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_SHIFT

#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_MAX

#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC1_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_MASK

#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_MASK   (0x3FF00000U)

◆ CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_SHIFT

#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_SHIFT   (0x00000014U)

◆ CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_MAX

#define CSL_DSS_WB_FIR_COEF_H12_C_FIRHC2_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_MASK

#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_SHIFT

#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_MAX

#define CSL_DSS_WB_FIR_COEF_H12_C_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_FIR_COEF_V0_FIRVC0_MASK

#define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_MASK   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V0_FIRVC0_SHIFT

#define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIR_COEF_V0_FIRVC0_MAX

#define CSL_DSS_WB_FIR_COEF_V0_FIRVC0_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V0_RESERVED_MASK

#define CSL_DSS_WB_FIR_COEF_V0_RESERVED_MASK   (0x3FFFFC00U)

◆ CSL_DSS_WB_FIR_COEF_V0_RESERVED_SHIFT

#define CSL_DSS_WB_FIR_COEF_V0_RESERVED_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_FIR_COEF_V0_RESERVED_MAX

#define CSL_DSS_WB_FIR_COEF_V0_RESERVED_MAX   (0x000FFFFFU)

◆ CSL_DSS_WB_FIR_COEF_V0_RESERVED1_MASK

#define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_FIR_COEF_V0_RESERVED1_SHIFT

#define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_FIR_COEF_V0_RESERVED1_MAX

#define CSL_DSS_WB_FIR_COEF_V0_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_MASK

#define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_MASK   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_SHIFT

#define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_MAX

#define CSL_DSS_WB_FIR_COEF_V0_C_FIRVC0_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_MASK

#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_MASK   (0x3FFFFC00U)

◆ CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_SHIFT

#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_MAX

#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED_MAX   (0x000FFFFFU)

◆ CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_MASK

#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_SHIFT

#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_MAX

#define CSL_DSS_WB_FIR_COEF_V0_C_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_FIR_COEF_V12_RESERVED_MASK

#define CSL_DSS_WB_FIR_COEF_V12_RESERVED_MASK   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V12_RESERVED_SHIFT

#define CSL_DSS_WB_FIR_COEF_V12_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIR_COEF_V12_RESERVED_MAX

#define CSL_DSS_WB_FIR_COEF_V12_RESERVED_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V12_FIRVC1_MASK

#define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_MASK   (0x000FFC00U)

◆ CSL_DSS_WB_FIR_COEF_V12_FIRVC1_SHIFT

#define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_FIR_COEF_V12_FIRVC1_MAX

#define CSL_DSS_WB_FIR_COEF_V12_FIRVC1_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V12_FIRVC2_MASK

#define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_MASK   (0x3FF00000U)

◆ CSL_DSS_WB_FIR_COEF_V12_FIRVC2_SHIFT

#define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_SHIFT   (0x00000014U)

◆ CSL_DSS_WB_FIR_COEF_V12_FIRVC2_MAX

#define CSL_DSS_WB_FIR_COEF_V12_FIRVC2_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V12_RESERVED1_MASK

#define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_FIR_COEF_V12_RESERVED1_SHIFT

#define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_FIR_COEF_V12_RESERVED1_MAX

#define CSL_DSS_WB_FIR_COEF_V12_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_MASK

#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_MASK   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_SHIFT

#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_MAX

#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_MASK

#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_MASK   (0x000FFC00U)

◆ CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_SHIFT

#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_SHIFT   (0x0000000AU)

◆ CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_MAX

#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC1_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_MASK

#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_MASK   (0x3FF00000U)

◆ CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_SHIFT

#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_SHIFT   (0x00000014U)

◆ CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_MAX

#define CSL_DSS_WB_FIR_COEF_V12_C_FIRVC2_MAX   (0x000003FFU)

◆ CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_MASK

#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_SHIFT

#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_MAX

#define CSL_DSS_WB_FIR_COEF_V12_C_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_MASK

#define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_MASK   (0x0000FFFFU)

◆ CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_SHIFT

#define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_MAX

#define CSL_DSS_WB_MFLAG_THRESHOLD_LT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_MASK

#define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_MASK   (0xFFFF0000U)

◆ CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_SHIFT

#define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_MAX

#define CSL_DSS_WB_MFLAG_THRESHOLD_HT_MFLAG_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_MASK

#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_SHIFT

#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_MAX

#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_MASK

#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_SHIFT

#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_MAX

#define CSL_DSS_WB_PICTURE_SIZE_MEMSIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_WB_SIZE_SIZEX_MASK

#define CSL_DSS_WB_SIZE_SIZEX_MASK   (0x00003FFFU)

◆ CSL_DSS_WB_SIZE_SIZEX_SHIFT

#define CSL_DSS_WB_SIZE_SIZEX_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_SIZE_SIZEX_MAX

#define CSL_DSS_WB_SIZE_SIZEX_MAX   (0x00003FFFU)

◆ CSL_DSS_WB_SIZE_SIZEY_MASK

#define CSL_DSS_WB_SIZE_SIZEY_MASK   (0x3FFF0000U)

◆ CSL_DSS_WB_SIZE_SIZEY_SHIFT

#define CSL_DSS_WB_SIZE_SIZEY_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_SIZE_SIZEY_MAX

#define CSL_DSS_WB_SIZE_SIZEY_MAX   (0x00003FFFU)

◆ CSL_DSS_WB_POSITION_POSX_MASK

#define CSL_DSS_WB_POSITION_POSX_MASK   (0x00003FFFU)

◆ CSL_DSS_WB_POSITION_POSX_SHIFT

#define CSL_DSS_WB_POSITION_POSX_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_POSITION_POSX_MAX

#define CSL_DSS_WB_POSITION_POSX_MAX   (0x00003FFFU)

◆ CSL_DSS_WB_POSITION_RESERVED_MASK

#define CSL_DSS_WB_POSITION_RESERVED_MASK   (0x0000C000U)

◆ CSL_DSS_WB_POSITION_RESERVED_SHIFT

#define CSL_DSS_WB_POSITION_RESERVED_SHIFT   (0x0000000EU)

◆ CSL_DSS_WB_POSITION_RESERVED_MAX

#define CSL_DSS_WB_POSITION_RESERVED_MAX   (0x00000003U)

◆ CSL_DSS_WB_POSITION_POSY_MASK

#define CSL_DSS_WB_POSITION_POSY_MASK   (0x3FFF0000U)

◆ CSL_DSS_WB_POSITION_POSY_SHIFT

#define CSL_DSS_WB_POSITION_POSY_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_POSITION_POSY_MAX

#define CSL_DSS_WB_POSITION_POSY_MAX   (0x00003FFFU)

◆ CSL_DSS_WB_POSITION_RESERVED1_MASK

#define CSL_DSS_WB_POSITION_RESERVED1_MASK   (0xC0000000U)

◆ CSL_DSS_WB_POSITION_RESERVED1_SHIFT

#define CSL_DSS_WB_POSITION_RESERVED1_SHIFT   (0x0000001EU)

◆ CSL_DSS_WB_POSITION_RESERVED1_MAX

#define CSL_DSS_WB_POSITION_RESERVED1_MAX   (0x00000003U)

◆ CSL_DSS_WB_CSC_COEF7_RESERVED_MASK

#define CSL_DSS_WB_CSC_COEF7_RESERVED_MASK   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF7_RESERVED_SHIFT

#define CSL_DSS_WB_CSC_COEF7_RESERVED_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_CSC_COEF7_RESERVED_MAX

#define CSL_DSS_WB_CSC_COEF7_RESERVED_MAX   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_MASK

#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_MASK   (0x0000FFF8U)

◆ CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_SHIFT

#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_SHIFT   (0x00000003U)

◆ CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_MAX

#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET2_MAX   (0x00001FFFU)

◆ CSL_DSS_WB_CSC_COEF7_RESERVED1_MASK

#define CSL_DSS_WB_CSC_COEF7_RESERVED1_MASK   (0x00070000U)

◆ CSL_DSS_WB_CSC_COEF7_RESERVED1_SHIFT

#define CSL_DSS_WB_CSC_COEF7_RESERVED1_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_CSC_COEF7_RESERVED1_MAX

#define CSL_DSS_WB_CSC_COEF7_RESERVED1_MAX   (0x00000007U)

◆ CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_MASK

#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_MASK   (0xFFF80000U)

◆ CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_SHIFT

#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_SHIFT   (0x00000013U)

◆ CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_MAX

#define CSL_DSS_WB_CSC_COEF7_POSTOFFSET3_MAX   (0x00001FFFU)

◆ CSL_DSS_WB_ROW_INC_ROWINC_MASK

#define CSL_DSS_WB_ROW_INC_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_WB_ROW_INC_ROWINC_SHIFT

#define CSL_DSS_WB_ROW_INC_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ROW_INC_ROWINC_MAX

#define CSL_DSS_WB_ROW_INC_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_WB_ROW_INC_UV_ROWINC_MASK

#define CSL_DSS_WB_ROW_INC_UV_ROWINC_MASK   (0xFFFFFFFFU)

◆ CSL_DSS_WB_ROW_INC_UV_ROWINC_SHIFT

#define CSL_DSS_WB_ROW_INC_UV_ROWINC_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_ROW_INC_UV_ROWINC_MAX

#define CSL_DSS_WB_ROW_INC_UV_ROWINC_MAX   (0xFFFFFFFFU)

◆ CSL_DSS_WB_BA_EXT_0_BA_EXT_MASK

#define CSL_DSS_WB_BA_EXT_0_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_EXT_0_BA_EXT_SHIFT

#define CSL_DSS_WB_BA_EXT_0_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BA_EXT_0_BA_EXT_MAX

#define CSL_DSS_WB_BA_EXT_0_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_EXT_0_RESERVED_MASK

#define CSL_DSS_WB_BA_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_WB_BA_EXT_0_RESERVED_SHIFT

#define CSL_DSS_WB_BA_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_BA_EXT_0_RESERVED_MAX

#define CSL_DSS_WB_BA_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_EXT_1_BA_EXT_MASK

#define CSL_DSS_WB_BA_EXT_1_BA_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_EXT_1_BA_EXT_SHIFT

#define CSL_DSS_WB_BA_EXT_1_BA_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BA_EXT_1_BA_EXT_MAX

#define CSL_DSS_WB_BA_EXT_1_BA_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_EXT_1_RESERVED_MASK

#define CSL_DSS_WB_BA_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_WB_BA_EXT_1_RESERVED_SHIFT

#define CSL_DSS_WB_BA_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_BA_EXT_1_RESERVED_MAX

#define CSL_DSS_WB_BA_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_MASK

#define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_SHIFT

#define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_MAX

#define CSL_DSS_WB_BA_UV_EXT_0_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_UV_EXT_0_RESERVED_MASK

#define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_WB_BA_UV_EXT_0_RESERVED_SHIFT

#define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_BA_UV_EXT_0_RESERVED_MAX

#define CSL_DSS_WB_BA_UV_EXT_0_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_MASK

#define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_MASK   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_SHIFT

#define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_MAX

#define CSL_DSS_WB_BA_UV_EXT_1_BA_UV_EXT_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_BA_UV_EXT_1_RESERVED_MASK

#define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_MASK   (0xFFFF0000U)

◆ CSL_DSS_WB_BA_UV_EXT_1_RESERVED_SHIFT

#define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_SHIFT   (0x00000010U)

◆ CSL_DSS_WB_BA_UV_EXT_1_RESERVED_MAX

#define CSL_DSS_WB_BA_UV_EXT_1_RESERVED_MAX   (0x0000FFFFU)

◆ CSL_DSS_WB_SECURE_SECURE_MASK

#define CSL_DSS_WB_SECURE_SECURE_MASK   (0x00000001U)

◆ CSL_DSS_WB_SECURE_SECURE_SHIFT

#define CSL_DSS_WB_SECURE_SECURE_SHIFT   (0x00000000U)

◆ CSL_DSS_WB_SECURE_SECURE_MAX

#define CSL_DSS_WB_SECURE_SECURE_MAX   (0x00000001U)

◆ CSL_DSS_WB_SECURE_SECURE_VAL_SECUREDIS

#define CSL_DSS_WB_SECURE_SECURE_VAL_SECUREDIS   (0x0U)

◆ CSL_DSS_WB_SECURE_SECURE_VAL_SECUREEN

#define CSL_DSS_WB_SECURE_SECURE_VAL_SECUREEN   (0x1U)

◆ CSL_DSS_WB_SECURE_RESERVED_MASK

#define CSL_DSS_WB_SECURE_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_WB_SECURE_RESERVED_SHIFT

#define CSL_DSS_WB_SECURE_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_WB_SECURE_RESERVED_MAX

#define CSL_DSS_WB_SECURE_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW   (0x00000028U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS   (0x0000002CU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET   (0x00000030U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR   (0x00000034U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0   (0x00000038U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1   (0x0000003CU)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2   (0x00000040U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3   (0x00000044U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0   (0x00000048U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1   (0x0000004CU)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2   (0x00000050U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3   (0x00000054U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0   (0x00000058U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1   (0x0000005CU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2   (0x00000060U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3   (0x00000064U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0   (0x00000068U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1   (0x0000006CU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2   (0x00000070U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3   (0x00000074U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE

#define CSL_DSS_COMMON_S1_WB_IRQENABLE   (0x00000078U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS   (0x0000007CU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC   (0x00000080U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY   (0x00000084U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY   (0x00000088U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RAW_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQSTATUS_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_SET_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQENABLE_CLR_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_0_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_1_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_2_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VID_IRQENABLE_3_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_0_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_1_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_2_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VID_IRQSTATUS_3_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_0_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_1_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_2_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VP_IRQENABLE_3_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_0_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_1_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_2_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_MASK

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_MAX

#define CSL_DSS_COMMON_S1_VP_IRQSTATUS_3_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_MASK

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_MAX

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_MASK

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_MAX

#define CSL_DSS_COMMON_S1_WB_IRQENABLE_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_S1_WB_IRQSTATUS_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_FUNC_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX

#define CSL_DSS_COMMON_S1_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW   (0x00000028U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS   (0x0000002CU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET   (0x00000030U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR   (0x00000034U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0   (0x00000038U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1   (0x0000003CU)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2   (0x00000040U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3   (0x00000044U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0   (0x00000048U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1   (0x0000004CU)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2   (0x00000050U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3   (0x00000054U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0   (0x00000058U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1   (0x0000005CU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2   (0x00000060U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3   (0x00000064U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0   (0x00000068U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1   (0x0000006CU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2   (0x00000070U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3   (0x00000074U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE

#define CSL_DSS_COMMON_S2_WB_IRQENABLE   (0x00000078U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS   (0x0000007CU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC   (0x00000080U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY   (0x00000084U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY   (0x00000088U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VP_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_VID_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_WB_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY1_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_DUMMY_IRQ_VAL_SET_EVENT   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RAW_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VP_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_VID_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_WB_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY1_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_DUMMY_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQSTATUS_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VP_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_VID_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_WB_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY1_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_SET_DUMMY_IRQ_VAL_ENABLE   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_SET_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MASK   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VP_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MASK   (0x000000F0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_VID_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_MASK   (0x00001F00U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_SHIFT   (0x00000008U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_VID_MAX   (0x0000001FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_MASK   (0x00002000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_CUR_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MASK   (0x00004000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_SHIFT   (0x0000000EU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_WB_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MASK   (0x00008000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_SHIFT   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY1_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MASK   (0x00010000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_SHIFT   (0x00000010U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_CLR_DUMMY_IRQ_VAL_CLEAR   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQENABLE_CLR_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_0_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_1_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_2_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDBUFFERUNDERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_VIDENDWINDOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_CORRUPTTILE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_FBDC_ILLEGALTILEREQ_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VID_IRQENABLE_3_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_0_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_1_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_2_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDBUFFERUNDERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_VIDENDWINDOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_CORRUPTTILE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_FBDC_ILLEGALTILEREQ_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VID_IRQSTATUS_3_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_0_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_1_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_2_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPVSYNC_ODD_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPPROGRAMMEDLINENUMBER_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNCLOST_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_ACBIASCOUNTSTATUS_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_VPSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_DUMMY_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_SAFETYREGION1_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VP_IRQENABLE_3_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_0_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_1_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_2_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPVSYNC_ODD_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPPROGRAMMEDLINENUMBER_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNCLOST_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MASK   (0x00000020U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_ACBIASCOUNTSTATUS_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MASK   (0x000003C0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_SHIFT   (0x00000006U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MASK   (0x00000400U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_SHIFT   (0x0000000AU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_MASK   (0x00000800U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_SHIFT   (0x0000000BU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_VPSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_MASK   (0x00001000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_SHIFT   (0x0000000CU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_DUMMY_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MASK   (0x0001E000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_SHIFT   (0x0000000DU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_MAX   (0x0000000FU)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_SAFETYREGION1_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_MASK

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_MASK   (0xFFFE0000U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_SHIFT   (0x00000011U)

◆ CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_MAX

#define CSL_DSS_COMMON_S2_VP_IRQSTATUS_3_RESERVED_MAX   (0x00007FFFU)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBBUFFEROVERFLOW_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBUNCOMPLETEERROR_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_MASK

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_MAX

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBFRAMEDONE_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_SECURITYVIOLATION_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_MASK

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_MAX

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_VAL_MASKED   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_WBSYNC_EN_VAL_GENINT   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_MASK

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_MAX

#define CSL_DSS_COMMON_S2_WB_IRQENABLE_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBBUFFEROVERFLOW_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MASK   (0x00000002U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBUNCOMPLETEERROR_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MASK   (0x00000004U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_SHIFT   (0x00000002U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBFRAMEDONE_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MASK   (0x00000008U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_SHIFT   (0x00000003U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_SECURITYVIOLATION_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_MASK

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_MASK   (0x00000010U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_SHIFT   (0x00000004U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_MAX

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_VAL_NOPEND   (0x0U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_WBSYNC_IRQ_VAL_PEND   (0x1U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_MASK

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_MASK   (0xFFFFFFE0U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_SHIFT   (0x00000005U)

◆ CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_MAX

#define CSL_DSS_COMMON_S2_WB_IRQSTATUS_RESERVED_MAX   (0x07FFFFFFU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_FUNC_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SAFETY_RESERVED_MAX   (0x7FFFFFFFU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_MASK   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_SHIFT   (0x00000000U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_MAX   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_VAL_NOACTION   (0x0U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_EOI_VAL_EOI   (0x1U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_MASK   (0xFFFFFFFEU)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_SHIFT   (0x00000001U)

◆ CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX

#define CSL_DSS_COMMON_S2_DISPC_IRQ_EOI_SECURITY_RESERVED_MAX   (0x7FFFFFFFU)