i2c.h

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/*
 *  Copyright (C) 2013 Texas Instruments Incorporated - www.ti.com/
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
#ifndef I2C_H_
#define I2C_H_

#ifdef __cplusplus
extern "C" {
#endif

/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
#include <ti/csl/src/ip/i2c/V2/cslr_i2c.h>

/* ========================================================================== */
/*                                 Macros                                     */
/* ========================================================================== */
/*
 * \name Values that can be passed to  I2CMasterControl API as command to
 * configure mode of operation of I2C in Master mode.
 *  @{
 */
#define     I2C_CFG_MST_TX              (((uint32_t) I2C_CON_TRX_MASK) | \
                                         (uint32_t) (I2C_CON_MST_MASK))

#define     I2C_CFG_MST_RX              ((uint32_t) I2C_CON_MST_MASK)

#define     I2C_CFG_STOP                ((uint32_t) I2C_CON_STP_MASK)

#define     I2C_CFG_N0RMAL_MODE         ((uint32_t) 0 << I2C_CON_STB_SHIFT)

#define     I2C_CFG_SRT_BYTE_MODE       ((uint32_t) I2C_CON_STB_MASK)

#define     I2C_CFG_7BIT_SLAVE_ADDR     ((uint32_t) 0 << I2C_CON_XSA_SHIFT)

#define     I2C_CFG_10BIT_SLAVE_ADDR    ((uint32_t) I2C_CON_XSA_MASK)

#define     I2C_CFG_10BIT_OWN_ADDR_0    ((uint32_t) I2C_CON_XOA0_MASK)

#define     I2C_CFG_10BIT_OWN_ADDR_1    ((uint32_t) I2C_CON_XOA1_MASK)

#define     I2C_CFG_10BIT_OWN_ADDR_2    ((uint32_t) I2C_CON_XOA2_MASK)

#define     I2C_CFG_10BIT_OWN_ADDR_3    ((uint32_t) I2C_CON_XOA3_MASK)

#define     I2C_CFG_7BIT_OWN_ADDR_0     ((uint32_t) 0 << I2C_CON_XOA0_SHIFT)

#define     I2C_CFG_7BIT_OWN_ADDR_1     ((uint32_t) 0 << I2C_CON_XOA1_SHIFT)

#define     I2C_CFG_7BIT_OWN_ADDR_2     ((uint32_t) 0 << I2C_CON_XOA2_SHIFT)

#define     I2C_CFG_7BIT_OWN_ADDR_3     ((uint32_t) 0 << I2C_CON_XOA3_SHIFT)

#define     I2C_CFG_MST_ENABLE          ((uint32_t) I2C_CON_I2C_EN_MASK)

#define     I2C_CFG_START               ((uint32_t) I2C_CON_STT_MASK)

#define     I2C_CFG_MST                 ((uint32_t) I2C_CON_MST_MASK)

#define     I2C_CFG_HS_MOD              ((uint32_t) CSL_I2C_CON_OPMODE_HSI2C << CSL_I2C_CON_OPMODE_SHIFT)

/* @} */

/*
 * \name Values that can be passed to  I2CMasterIntEnableEx API as intFlag to Enable
 * interrupts.
 * @{
*/
#define     I2C_INT_ARBITRATION_LOST     ((uint32_t) I2C_IRQSTATUS_AL_MASK)

#define     I2C_INT_NO_ACK               ((uint32_t) I2C_IRQSTATUS_NACK_MASK)

#define     I2C_INT_ADRR_READY_ACESS     ((uint32_t) I2C_IRQSTATUS_ARDY_MASK)

#define     I2C_INT_RECV_READY           ((uint32_t) I2C_IRQSTATUS_RRDY_MASK)

#define     I2C_INT_TRANSMIT_READY       ((uint32_t) I2C_IRQSTATUS_XRDY_MASK)

#define     I2C_INT_GENERAL_CALL         ((uint32_t) I2C_IRQSTATUS_GC_MASK)

#define     I2C_INT_START                ((uint32_t) I2C_IRQSTATUS_STC_MASK)

#define     I2C_INT_ACCESS_ERROR         ((uint32_t) I2C_IRQSTATUS_AERR_MASK)

#define     I2C_INT_STOP_CONDITION       ((uint32_t) I2C_IRQSTATUS_BF_MASK)

#define     I2C_INT_ADRR_SLAVE           ((uint32_t) I2C_IRQSTATUS_AAS_MASK)

#define     I2C_INT_TRANSMIT_UNDER_FLOW  ((uint32_t) I2C_IRQSTATUS_XUDF_MASK)

#define     I2C_INT_RECV_OVER_RUN        ((uint32_t) I2C_IRQSTATUS_ROVR_MASK)

#define     I2C_INT_RECV_DRAIN           ((uint32_t) I2C_IRQSTATUS_RDR_MASK)

#define     I2C_INT_TRANSMIT_DRAIN       ((uint32_t) I2C_IRQSTATUS_XDR_MASK)

#define     I2C_INT_BUS_BUSY             ((uint32_t) I2C_IRQSTATUS_RAW_BB_MASK)

#define     I2C_INT_BUS_FREE             ((uint32_t) I2C_IRQSTATUS_RAW_BF_MASK)

#define     I2C_INT_ALL                  ((uint32_t) 0x7FFFU)
/* @} */

/*
 * \name Values that can be passed to I2CFIFOThersholdConfig/I2CFIFOClear API as
 * flag to select receive or transmit mode.
 * @{
 */
#define     I2C_TX_MODE                  ((uint32_t) 1U)

#define     I2C_RX_MODE                  ((uint32_t) 0U)
/* @} */

/*
 * \name Values that can be passed to I2CBufferStatus API as flag to get status
 * of the internal buffer.
 * @{
 */
#define     I2C_TX_BUFFER_STATUS         ((uint32_t) 0U)

#define     I2C_RX_BUFFER_STATUS         ((uint32_t) 1U)

#define     I2C_FIFO_DEPTH               ((uint32_t) 2U)
/* @} */

/*
 * \name Values that can be passed to I2CWakeUpEnable  API as eventFlag to select
 * the type of wakeup signal to be Enabled.
 * @{
 */
#define     I2C_WAKE_UP_ARBITRATION_LOST  (I2C_WE_AL_MASK)

#define     I2C_WAKE_UP_NO_ACK            (I2C_WE_NACK_MASK)

#define     I2C_WAKE_UP_ADRR_RDY_ACCESS   (I2C_WE_ARDY_MASK)

#define     I2C_WAKE_UP_GENERAL_CALL      (I2C_WE_GC_MASK)

#define     I2C_WAKE_UP_START             (I2C_WE_STC_MASK)

#define     I2C_WAKE_UP_STOP_CONDITION    (I2C_WE_BF_MASK)

#define     I2C_WAKE_UP_ADRR_SLAVE        (I2C_WE_AAS_MASK)

#define     I2C_WAKE_UP_TX_UNDER_FLOW     (I2C_WE_XUDF_MASK)

#define     I2C_WAKE_UP_RECV_OVER_RUN     (I2C_WE_ROVR_MASK)

#define     I2C_WAKE_UP_RECV_DRAIN        (I2C_WE_RDR_MASK)

#define     I2C_WAKE_UP_TRANSMIT_DRAIN    (I2C_WE_XDR_MASK)

#define     I2C_WAKE_UP_DATA_RECV_TX_RDY  (I2C_WE_DRDY_MASK)
/* @} */

/*
 * \name Values that can be passed to I2CWakeUpEnable  API as flag to select
 * the request source to generate asynchronous signal.
 * @{
 */
#define     I2C_WAKE_UP_IRQ               ((uint32_t) 1U)

#define     I2C_WAKE_UP_DMA_RECV          ((uint32_t) 2U)

#define     I2C_WAKE_UP_DMA_TRANSMIT      ((uint32_t) 3U)
/* @} */

/*
 * \name Values that can be passed to I2CMasterIntStatus/I2CSlaveIntStatus
 * /I2CMasterIntStatusEx/I2CSlaveIntStatusEx API as flag to select
 * RAWIRQSTATUS or IRQSTATUS.
 * @{
 */
#define     I2C_STATUS_RAW            ((uint32_t) 0U)

#define     I2C_STATUS                ((uint32_t) 1U)

#define HAL_HSI2C_SUCCESS             ((uint32_t) 0U)

#define HAL_HSI2C_FAIL                ((uint32_t) 1U)
/* @} */

/*
 * \name Values that can be passed to ownAddressSet API as flag to select
 * any one of the I2C own address field .
 * @{
 */
#define     I2C_OWN_ADDR_0               ((uint32_t) 0U)

#define     I2C_OWN_ADDR_1               ((uint32_t) 1U)

#define     I2C_OWN_ADDR_2               ((uint32_t) 2U)

#define     I2C_OWN_ADDR_3               ((uint32_t) 3U)
/* @} */

/*
 * \name MACROS used to enable or disable auto idle mechanism.
 * @{
 */
#define   I2C_AUTOIDLE_DISABLE    (I2C_SYSC_AUTOIDLE_DISABLE)

#define   I2C_AUTOIDLE_ENABLE     ((uint32_t) I2C_SYSC_AUTOIDLE_ENABLE << \
                                   I2C_SYSC_AUTOIDLE_SHIFT)
/* @} */

/*
 * \name MACRO used to select the type of clock activity.
 * @{
 */
#define    I2C_CUT_OFF_BOTH_CLK       (I2C_SYSC_CLKACTIVITY_BOOTHOFF)

#define    I2C_CUT_OFF_SYS_CLK        ((uint32_t) I2C_SYSC_CLKACTIVITY_OCPON << \
                                       I2C_SYSC_CLKACTIVITY_SHIFT)

#define    I2C_CUT_OFF_OCP_CLK        ((uint32_t) I2C_SYSC_CLKACTIVITY_SYSON << \
                                       I2C_SYSC_CLKACTIVITY_SHIFT)

#define    I2C_KEEP_ALIVE_BOTH_CLK    ((uint32_t) I2C_SYSC_CLKACTIVITY_BOOTHON << \
                                      I2C_SYSC_CLKACTIVITY_SHIFT)
/* @} */

/*
 * \name MACROS used to enable or disable wake up mechanism.
 * @{
 */
#define    I2C_ENAWAKEUP_DISABLE    (I2C_SYSC_ENAWAKEUP_DISABLE)

#define    I2C_ENAWAKEUP_ENABLE     ((uint32_t) I2C_SYSC_ENAWAKEUP_ENABLE << \
                                     I2C_SYSC_ENAWAKEUP_SHIFT)
/* @} */

/*
 * \name MACROS used to select the type of idle mode operation.
 * @{
 */
#define    I2C_FORCE_IDLE_MODE          (I2C_SYSC_IDLEMODE_FORCEIDLE)

#define    I2C_NO_IDLE_MODE             ((uint32_t) I2C_SYSC_IDLEMODE_NOIDLE << \
                                         I2C_SYSC_IDLEMODE_SHIFT)

#define    I2C_SMART_IDLE_MODE          ((uint32_t) I2C_SYSC_IDLEMODE_SMARTIDLE << \
                                         I2C_SYSC_IDLEMODE_SHIFT)

#define    I2C_SMART_IDLE_WAKEUP_MODE   ((uint32_t) I2C_SYSC_IDLEMODE_SMARTIDLE_WAKEUP << \
                                         I2C_SYSC_IDLEMODE_SHIFT)
/* @} */

/*
 * \name MACROS used to select F/S mode or HS mode of I2C.
 * @{
 */
#define    I2C_OPMODE_FAST_STAND_MODE    (I2C_CON_OPMODE_FSI2C)

#define    I2C_OPMODE_HIGH_SPEED_MODE    ((uint32_t) I2C_CON_OPMODE_HSI2C << \
                                          I2C_CON_OPMODE_SHIFT)
/* @} */

/*
 * \name MACROS used to select Start byte or normal mode of I2C.
 * @{
 */
#define    I2C_NORMAL_MODE   (I2C_CON_STB_NORMAL)

#define    I2C_STB_MODE      ((uint32_t) I2C_CON_STB_STB << I2C_CON_STB_SHIFT)
/* @} */

/*
 * \name MACROS used to slave address 7 or 10 bit mode of I2C.
 * @{
 */
#define    I2C_XSA_7BIT     (I2C_CON_XSA_B07)

#define    I2C_XSA_10BIT    ((uint32_t) I2C_CON_XSA_B10 << I2C_CON_XSA_SHIFT)
/* @} */

/* ========================================================================== */
/*                         Global Variables Declarations                      */
/* ========================================================================== */


/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */

void I2CMasterInitExpClk(uintptr_t baseAddr,
                         uint32_t sysClk,
                         uint32_t internalClk,
                         uint32_t outputClk);

void I2CMasterEnable(uintptr_t baseAddr);

void I2CMasterEnableFreeRun(uintptr_t baseAddr);

void I2CMasterSetSysTest(uintptr_t baseAddr, uint32_t sysTest);

uint32_t I2CMasterGetSysTest(uintptr_t baseAddr);

void I2CMasterDisable(uintptr_t baseAddr);

int32_t I2CMasterBusBusy(uintptr_t baseAddr);

uint32_t I2CMasterBusy(uintptr_t baseAddr);

uint32_t I2CMasterErr(uintptr_t baseAddr);

void I2CMasterControl(uintptr_t baseAddr, uint32_t cmd);

void I2CMasterStart(uintptr_t baseAddr);

void I2CMasterStop(uintptr_t baseAddr);

void I2CMasterIntEnableEx(uintptr_t baseAddr, uint32_t intFlag);

void I2CSlaveIntEnableEx(uintptr_t baseAddr, uint32_t intFlag);

void I2CMasterIntDisableEx(uintptr_t baseAddr, uint32_t intFlag);

void I2CSlaveIntDisableEx(uintptr_t baseAddr, uint32_t intFlag);

uint32_t I2CMasterIntStatus(uintptr_t baseAddr);

uint32_t I2CSlaveIntStatus(uintptr_t baseAddr);

uint32_t I2CMasterIntStatusEx(uintptr_t baseAddr, uint32_t intFlag);

uint32_t I2CSlaveIntStatusEx(uintptr_t baseAddr, uint32_t intFlag);

uint32_t I2CMasterIntRawStatus(uintptr_t baseAddr);

uint32_t I2CSlaveIntRawStatus(uintptr_t baseAddr);

uint32_t I2CMasterIntRawStatusEx(uintptr_t baseAddr, uint32_t intFlag);

uint32_t I2CSlaveIntRawStatusEx(uintptr_t baseAddr, uint32_t intFlag);

void I2CMasterIntClearEx(uintptr_t baseAddr, uint32_t intFlag);

void I2CSlaveIntClearEx(uintptr_t baseAddr, uint32_t intFlag);

void I2CMasterIntRawStatusClearEx(uintptr_t baseAddr, uint32_t intFlag);

void I2CSlaveIntRawStatusClearEx(uintptr_t baseAddr, uint32_t intFlag);

void I2CMasterSlaveAddrSet(uintptr_t baseAddr, uint32_t slaveAdd);

uint32_t I2CMasterSlaveAddrGet(uintptr_t baseAddr);

void I2CSetDataCount(uintptr_t baseAddr, uint32_t count);

uint32_t I2CDataCountGet(uintptr_t baseAddr);

void I2CFIFOThresholdConfig(uintptr_t baseAddr,
                            uint32_t thresholdVal,
                            uint32_t flag);

void I2CFIFOClear(uintptr_t baseAddr, uint32_t flag);

void I2CDMATxEventEnable(uintptr_t baseAddr);

void I2CDMARxEventEnable(uintptr_t baseAddr);

void I2CDMATxEventDisable(uintptr_t baseAddr);

void I2CDMARxEventDisable(uintptr_t baseAddr);

uint32_t I2CBufferStatus(uintptr_t baseAddr, uint32_t flag);

uint32_t I2CActiveOwnAddressGet(uintptr_t baseAddr);

void I2CClockBlockingControl(uintptr_t baseAddr,
                             uint32_t ownAdd0,
                             uint32_t ownAdd1,
                             uint32_t ownAdd2,
                             uint32_t ownAdd3);

void I2COwnAddressSet(uintptr_t baseAddr,
                      uint32_t ownAdd,
                      uint32_t flag);

void I2CSoftReset(uintptr_t baseAddr);

void I2CAutoIdleEnable(uintptr_t baseAddr);

void I2CAutoIdleDisable(uintptr_t baseAddr);

void I2CGlobalWakeUpEnable(uintptr_t baseAddr);

void I2CGlobalWakeUpDisable(uintptr_t baseAddr);

void I2CIdleModeSelect(uintptr_t baseAddr, uint32_t flag);

void I2CClockActivitySelect(uintptr_t baseAddr, uint32_t flag);

void I2CWakeUpEnable(uintptr_t baseAddr,
                     uint32_t eventFlag,
                     uint32_t flag);

void I2CWakeUpDisable(uintptr_t baseAddr,
                      uint32_t eventFlag,
                      uint32_t flag);

uint32_t I2CSystemStatusGet(uintptr_t baseAddr);

void I2CMasterDataPut(uintptr_t baseAddr, uint8_t data);

uint8_t I2CMasterDataGet(uintptr_t baseAddr);

void I2CSlaveDataPut(uintptr_t baseAddr, uint32_t data);

uint8_t I2CSlaveDataGet(uintptr_t baseAddr);

void I2CSyscInit(uintptr_t baseAddr, uint32_t syscFlag);

void I2CConfig(uintptr_t baseAddr, uint32_t conParams);

void I2CFlushFifo(uintptr_t baseAddr);

uint32_t I2CGetEnabledIntStatus(uintptr_t baseAddr, uint32_t intFlag);

#ifdef __cplusplus
}
#endif

#endif

/********************************* End of file ******************************/