Introduction

This file contains the function prototypes for the device abstraction layer for high speed I2C. It also contains some related macro definitions and some files to be included.

Please find the below detailed description of i2c DAL.

I2C controller will basically operates in the following modes
1. Master Transmitter or Master Receiver.
2. Slave.
Programming sequence for initializing the i2c controller in master mode.
1. Perform Clock and pinmux configuration.
2. Disable the module through API I2CMasterDisable.
3. Disable the auto idle mode through API I2CAutoIdleDisable
4. Configure the internal clock dividers of i2c controller through API I2CMasterInitExpClk
5. Configure the slave address through the API I2CMasterSlaveAddrSet
6. Enable the i2c module through API I2CMasterEnable
Programming sequence for setting up i2c write
1. Set the transfer length (number of bytes) through the API I2CSetDataCount
2. Configure the i2c controller in master transmitter mode using the API I2CMasterControl
3. Enable necessary interrupts using the API in master mode I2CMasterIntEnableEx
4. Generate start condition using the API I2CMasterStart
5. Check for data completion either through interrupts or through status checking.
Programming sequence for setting up i2c read is same as write except configuring the i2c controller in master receiver mode

Go to the source code of this file.

Macros
#define	I2C_CFG_MST_TX
	I2C_CFG_MST_TX - Master transmit mode. More...

#define	I2C_CFG_MST_RX ((uint32_t) I2C_CON_MST_MASK)
	I2C_CFG_MST_RX - Matter receive mode. More...

#define	I2C_CFG_STOP ((uint32_t) I2C_CON_STP_MASK)
	I2C_CFG_STOP - Stop condition. More...

#define	I2C_CFG_N0RMAL_MODE ((uint32_t) 0 << I2C_CON_STB_SHIFT)
	I2C_CFG_N0RMAL_MODE - Normal mode. More...

#define	I2C_CFG_SRT_BYTE_MODE ((uint32_t) I2C_CON_STB_MASK)
	I2C_CFG_SRT_BYTE_MODE - Start byte mode. More...

#define	I2C_CFG_7BIT_SLAVE_ADDR ((uint32_t) 0 << I2C_CON_XSA_SHIFT)
	I2C_CFG_7BIT_SLAVE_ADDR - 7 bit slave address. More...

#define	I2C_CFG_10BIT_SLAVE_ADDR ((uint32_t) I2C_CON_XSA_MASK)
	I2C_CFG_10BIT_SLAVE_ADDR - 10 bit slave address. More...

#define	I2C_CFG_10BIT_OWN_ADDR_0 ((uint32_t) I2C_CON_XOA0_MASK)
	I2C_CFG_10BIT_OWN_ADDR_0 - Master mode 10 bit own address 0. More...

#define	I2C_CFG_10BIT_OWN_ADDR_1 ((uint32_t) I2C_CON_XOA1_MASK)
	I2C_CFG_10BIT_OWN_ADDR_1 - Master mode 10 bit own address 1. More...

#define	I2C_CFG_10BIT_OWN_ADDR_2 ((uint32_t) I2C_CON_XOA2_MASK)
	I2C_CFG_10BIT_OWN_ADDR_2 - Master mode 10 bit own address 2. More...

#define	I2C_CFG_10BIT_OWN_ADDR_3 ((uint32_t) I2C_CON_XOA3_MASK)
	I2C_CFG_10BIT_OWN_ADDR_3 - Master mode 10 bit own address 3. More...

#define	I2C_CFG_7BIT_OWN_ADDR_0 ((uint32_t) 0 << I2C_CON_XOA0_SHIFT)
	I2C_CFG_7BIT_OWN_ADDR_0 - Master mode 7 bit own address 0. More...

#define	I2C_CFG_7BIT_OWN_ADDR_1 ((uint32_t) 0 << I2C_CON_XOA1_SHIFT)
	I2C_CFG_7BIT_OWN_ADDR_1 - Master mode 7 bit own address 1. More...

#define	I2C_CFG_7BIT_OWN_ADDR_2 ((uint32_t) 0 << I2C_CON_XOA2_SHIFT)
	I2C_CFG_7BIT_OWN_ADDR_2 - Master mode 7 bit own address 2. More...

#define	I2C_CFG_7BIT_OWN_ADDR_3 ((uint32_t) 0 << I2C_CON_XOA3_SHIFT)
	I2C_CFG_7BIT_OWN_ADDR_3 - Master mode 7 bit own address 3. More...

#define	I2C_CFG_MST_ENABLE ((uint32_t) I2C_CON_I2C_EN_MASK)
	I2C_CFG_MST_ENABLE - I2C module enable. More...

#define	I2C_CFG_START ((uint32_t) I2C_CON_STT_MASK)
	I2C_CFG_START - Start condition, initiate I2C transfer. More...

#define	I2C_CFG_MST ((uint32_t) I2C_CON_MST_MASK)
	I2C_CFG_MST - I2C configure master mode. More...

#define	I2C_CFG_HS_MOD ((uint32_t) CSL_I2C_CON_OPMODE_HSI2C << CSL_I2C_CON_OPMODE_SHIFT)
	I2C_CFG_HS_MODE - High speed operation mode. More...

#define	I2C_INT_ARBITRATION_LOST ((uint32_t) I2C_IRQSTATUS_AL_MASK)
	I2C_INT_ARBITRATION_LOST - Arbitration lost interrupt. More...

#define	I2C_INT_NO_ACK ((uint32_t) I2C_IRQSTATUS_NACK_MASK)
	I2C_INT_NO_ACK - No acknowledgement interrupt. More...

#define	I2C_INT_ADRR_READY_ACESS ((uint32_t) I2C_IRQSTATUS_ARDY_MASK)
	I2C_INT_ADRR_READY_ACESS - Register access ready interrupt. More...

#define	I2C_INT_RECV_READY ((uint32_t) I2C_IRQSTATUS_RRDY_MASK)
	I2C_INT_RECV_READY - Receive data ready interrupt. More...

#define	I2C_INT_TRANSMIT_READY ((uint32_t) I2C_IRQSTATUS_XRDY_MASK)
	I2C_INT_TRANSMIT_READY - Transmit data ready interrupt. More...

#define	I2C_INT_GENERAL_CALL ((uint32_t) I2C_IRQSTATUS_GC_MASK)
	I2C_INT_GENERAL_CALL - General call Interrupt. More...

#define	I2C_INT_START ((uint32_t) I2C_IRQSTATUS_STC_MASK)
	I2C_INT_START - Start Condition interrupt. More...

#define	I2C_INT_ACCESS_ERROR ((uint32_t) I2C_IRQSTATUS_AERR_MASK)
	I2C_INT_ACCESS_ERROR - Access Error interrupt. More...

#define	I2C_INT_STOP_CONDITION ((uint32_t) I2C_IRQSTATUS_BF_MASK)
	I2C_INT_STOP_CONDITION - Bus Free interrupt. More...

#define	I2C_INT_ADRR_SLAVE ((uint32_t) I2C_IRQSTATUS_AAS_MASK)
	I2C_INT_ADRR_SLAVE - Addressed as Slave interrupt. More...

#define	I2C_INT_TRANSMIT_UNDER_FLOW ((uint32_t) I2C_IRQSTATUS_XUDF_MASK)
	I2C_INT_TRANSMIT_UNDER_FLOW - Transmit underflow interrupt. More...

#define	I2C_INT_RECV_OVER_RUN ((uint32_t) I2C_IRQSTATUS_ROVR_MASK)
	I2C_INT_RECV_OVER_RUN - Receive overrun interrupt. More...

#define	I2C_INT_RECV_DRAIN ((uint32_t) I2C_IRQSTATUS_RDR_MASK)
	I2C_INT_RECV_DRAIN - Receive Draining interrupt. More...

#define	I2C_INT_TRANSMIT_DRAIN ((uint32_t) I2C_IRQSTATUS_XDR_MASK)
	I2C_INT_TRANSMIT_DRAIN - Transmit Draining interrupt. More...

#define	I2C_INT_BUS_BUSY ((uint32_t) I2C_IRQSTATUS_RAW_BB_MASK)
	I2C_INT_BUS_BUSY - Bus busy interrupt raw status. More...

#define	I2C_INT_BUS_FREE ((uint32_t) I2C_IRQSTATUS_RAW_BF_MASK)
	I2C_INT_BUS_FREE - Bus free interrupt raw status. More...

#define	I2C_INT_ALL ((uint32_t) 0x7FFFU)
	I2C_INT_ALL - Enable all interrupt. More...

#define	I2C_TX_MODE ((uint32_t) 1U)
	I2C_TX_MODE - Transmit mode. More...

#define	I2C_RX_MODE ((uint32_t) 0U)
	I2C_RX_MODE - Receive mode. More...

#define	I2C_TX_BUFFER_STATUS ((uint32_t) 0U)
	I2C_TX_BUFFER_STATUS - TX buffer status flag. More...

#define	I2C_RX_BUFFER_STATUS ((uint32_t) 1U)
	I2C_RX_BUFFER_STATUS - RX buffer status flag. More...

#define	I2C_FIFO_DEPTH ((uint32_t) 2U)
	I2C_FIFO_DEPTH - Internal FIFO depth flag. More...

#define	I2C_WAKE_UP_ARBITRATION_LOST (I2C_WE_AL_MASK)
	I2C_WAKE_UP_ARBITRATION_LOST - Arbitration lost IRQ wakeup set. More...

#define	I2C_WAKE_UP_NO_ACK (I2C_WE_NACK_MASK)
	I2C_WAKE_UP_NO_ACK - No acknowledgment IRQ wakeup set. More...

#define	I2C_WAKE_UP_ADRR_RDY_ACCESS (I2C_WE_ARDY_MASK)
	I2C_WAKE_UP_ADRR_RDY_ACCESS - Register access ready IRQ wakeup set. More...

#define	I2C_WAKE_UP_GENERAL_CALL (I2C_WE_GC_MASK)
	I2C_WAKE_UP_GENERAL_CALL - General call IRQ wakeup set. More...

#define	I2C_WAKE_UP_START (I2C_WE_STC_MASK)
	I2C_WAKE_UP_START - Start Condition IRQ wakeup set. More...

#define	I2C_WAKE_UP_STOP_CONDITION (I2C_WE_BF_MASK)
	I2C_WAKE_UP_STOP_CONDITION - Bus Free IRQ wakeup set. More...

#define	I2C_WAKE_UP_ADRR_SLAVE (I2C_WE_AAS_MASK)
	I2C_WAKE_UP_ADRR_SLAVE - Address as slave IRQ wakeup set. More...

#define	I2C_WAKE_UP_TX_UNDER_FLOW (I2C_WE_XUDF_MASK)
	I2C_WAKE_UP_TX_UNDER_FLOW - Transmit underflow wakeup set. More...

#define	I2C_WAKE_UP_RECV_OVER_RUN (I2C_WE_ROVR_MASK)
	I2C_WAKE_UP_RECV_OVER_RUN - Receive overrun wakeup set. More...

#define	I2C_WAKE_UP_RECV_DRAIN (I2C_WE_RDR_MASK)
	I2C_WAKE_UP_RECV_DRAIN - Receive Draining wakeup set. More...

#define	I2C_WAKE_UP_TRANSMIT_DRAIN (I2C_WE_XDR_MASK)
	I2C_WAKE_UP_TRANSMIT_DRAIN - Transmit Draining wakeup set. More...

#define	I2C_WAKE_UP_DATA_RECV_TX_RDY (I2C_WE_DRDY_MASK)
	I2C_WAKE_UP_DATA_RECV_TX_RDY - Receive/Transmit data ready IRQ wakeup set. More...

#define	I2C_WAKE_UP_IRQ ((uint32_t) 1U)
	I2C_WAKE_UP_IRQ - IRQ request source. More...

#define	I2C_WAKE_UP_DMA_RECV ((uint32_t) 2U)
	I2C_WAKE_UP_DMA_RECV - DMA receive request source. More...

#define	I2C_WAKE_UP_DMA_TRANSMIT ((uint32_t) 3U)
	I2C_WAKE_UP_DMA_TRANSMIT - DMA transmit request source. More...

#define	I2C_STATUS_RAW ((uint32_t) 0U)
	I2C_STATUS_RAW - RAW IRQ status. More...

#define	I2C_STATUS ((uint32_t) 1U)
	I2C_STATUS - IRQ status. More...

#define	HAL_HSI2C_SUCCESS ((uint32_t) 0U)
	HAL_HSI2C_SUCCESS - I2C success. More...

#define	HAL_HSI2C_FAIL ((uint32_t) 1U)
	HAL_HSI2C_FAIL - I2C fail. More...

#define	I2C_OWN_ADDR_0 ((uint32_t) 0U)
	I2C_OWN_ADDR_0 - set own address 0. More...

#define	I2C_OWN_ADDR_1 ((uint32_t) 1U)
	I2C_OWN_ADDR_1 - set own address 1. More...

#define	I2C_OWN_ADDR_2 ((uint32_t) 2U)
	I2C_OWN_ADDR_2 - set own address 2. More...

#define	I2C_OWN_ADDR_3 ((uint32_t) 3U)
	I2C_OWN_ADDR_3 - set own address 3. More...

#define	I2C_AUTOIDLE_DISABLE (I2C_SYSC_AUTOIDLE_DISABLE)
	I2C_AUTOIDLE_DISABLE Disable auto idle mechanism. More...

#define	I2C_AUTOIDLE_ENABLE
	I2C_AUTOIDLE_ENABLE Enable autoidle mechanism. More...

#define	I2C_CUT_OFF_BOTH_CLK (I2C_SYSC_CLKACTIVITY_BOOTHOFF)
	I2C_CUT_OFF_BOTH_CLK Both OCP and SYS Clk are cut off. More...

#define	I2C_CUT_OFF_SYS_CLK
	I2C_CUT_OFF_SYS_CLK system clock is cut off;OCP clock is kept alive. More...

#define	I2C_CUT_OFF_OCP_CLK
	I2C_CUT_OFF_OCP_CLK OCP clock is cut off;system clock is is kept alive. More...

#define	I2C_KEEP_ALIVE_BOTH_CLK
	I2C_KEEP_ALIVE_BOTH_CLK BOTH OCP and SYS Clk are kept alive. More...

#define	I2C_ENAWAKEUP_DISABLE (I2C_SYSC_ENAWAKEUP_DISABLE)
	I2C_ENAWAKEUP__DISABLE Disable wakeup mechanism. More...

#define	I2C_ENAWAKEUP_ENABLE
	I2C_ENAWAKEUP__ENABLE Enable wakeup mechanism. More...

#define	I2C_FORCE_IDLE_MODE (I2C_SYSC_IDLEMODE_FORCEIDLE)
	I2C_FORCE_IDLE_MODE selects forced idle mode operation. More...

#define	I2C_NO_IDLE_MODE
	I2C_NO_IDLE_MODE selects no idle mode operation. More...

#define	I2C_SMART_IDLE_MODE
	I2C_SMART_IDLE_MODE selects smart idle mode operation. More...

#define	I2C_SMART_IDLE_WAKEUP_MODE
	I2C_SMART_IDLE_WAKEUP_MODE selects smart idle wakeup mode of operation. More...

#define	I2C_OPMODE_FAST_STAND_MODE (I2C_CON_OPMODE_FSI2C)
	I2C_OPMODE_FAST_STAND_MODE Select Fast/Standard mode. More...

#define	I2C_OPMODE_HIGH_SPEED_MODE
	I2C_OPMODE_HIGH_SPEED_MODE Select high speed mode. More...

#define	I2C_NORMAL_MODE (I2C_CON_STB_NORMAL)
	I2C_NORMAL_MODE Select Normal mode. More...

#define	I2C_STB_MODE ((uint32_t) I2C_CON_STB_STB << I2C_CON_STB_SHIFT)
	I2C_STB_MODE Select start byte mode. More...

#define	I2C_XSA_7BIT (I2C_CON_XSA_B07)
	I2C_XSA_7BIT Slave address 7 bit mode. More...

#define	I2C_XSA_10BIT ((uint32_t) I2C_CON_XSA_B10 << I2C_CON_XSA_SHIFT)
	I2C_XSA_10BIT Slave address 10 bit mode. More...

Functions
void	I2CMasterInitExpClk (uintptr_t baseAddr, uint32_t sysClk, uint32_t internalClk, uint32_t outputClk)
	This API will divide the system clock fed to I2C module between 12 and 100Mhz.It will also configure the I2C bus clock frequency. More...

void	I2CMasterEnable (uintptr_t baseAddr)
	This API Enables the I2C module.This will bring the I2C module out of reset. More...

void	I2CMasterEnableFreeRun (uintptr_t baseAddr)
	Enables the I2C free run module. More...

void	I2CMasterSetSysTest (uintptr_t baseAddr, uint32_t sysTest)
	Set the I2C systest register. More...

uint32_t	I2CMasterGetSysTest (uintptr_t baseAddr)
	Get the I2C systest register. More...

void	I2CMasterDisable (uintptr_t baseAddr)
	Disables the I2C Module.This will put the I2C module in reset. Only Tx and Rx are cleared,status bits are set their default values and all configuration registers are not reset, they keep their initial values. More...

int32_t	I2CMasterBusBusy (uintptr_t baseAddr)
	This API determines whether bus is busy or not. More...

uint32_t	I2CMasterBusy (uintptr_t baseAddr)
	This API determines whether Master is busy or not. More...

uint32_t	I2CMasterErr (uintptr_t baseAddr)
	This API determines whether error occurred or not during I2C operation. More...

void	I2CMasterControl (uintptr_t baseAddr, uint32_t cmd)
	This API configure I2C in different modes of operation. More...

void	I2CMasterStart (uintptr_t baseAddr)
	This API starts a I2C transaction on the bus. This API must be called after all the configuration for the i2c module is done and after bringing I2C out of local reset. More...

void	I2CMasterStop (uintptr_t baseAddr)
	This API stops a I2C transaction on the bus. This API must be used in case a deliberate STOP needs to be sent on the bus. More...

void	I2CMasterIntEnableEx (uintptr_t baseAddr, uint32_t intFlag)
	This API enables only specified I2C interrupts in master mode. More...

void	I2CSlaveIntEnableEx (uintptr_t baseAddr, uint32_t intFlag)
	This API enables only specified I2C interrupts in Slave mode. More...

void	I2CMasterIntDisableEx (uintptr_t baseAddr, uint32_t intFlag)
	This API disables only specified I2C interrupts in master mode. More...

void	I2CSlaveIntDisableEx (uintptr_t baseAddr, uint32_t intFlag)
	This API disables only specified I2C interrupts in Slave mode. More...

uint32_t	I2CMasterIntStatus (uintptr_t baseAddr)
	This API returns the status of interrupts in master mode. More...

uint32_t	I2CSlaveIntStatus (uintptr_t baseAddr)
	This API returns the status of interrupts in slave mode. More...

uint32_t	I2CMasterIntStatusEx (uintptr_t baseAddr, uint32_t intFlag)
	This API returns the status of specified interrupts in master mode. More...

uint32_t	I2CSlaveIntStatusEx (uintptr_t baseAddr, uint32_t intFlag)
	This API returns the status of specified interrupts in slave mode. More...

uint32_t	I2CMasterIntRawStatus (uintptr_t baseAddr)
	This API returns the raw status of interrupts in master mode. More...

uint32_t	I2CSlaveIntRawStatus (uintptr_t baseAddr)
	This API returns the raw status of interrupts in slave mode. More...

uint32_t	I2CMasterIntRawStatusEx (uintptr_t baseAddr, uint32_t intFlag)
	This API returns the raw status of specified interrupts in master mode. More...

uint32_t	I2CSlaveIntRawStatusEx (uintptr_t baseAddr, uint32_t intFlag)
	This API returns the raw status of specified interrupts in slave mode. More...

void	I2CMasterIntClearEx (uintptr_t baseAddr, uint32_t intFlag)
	This API Clears the status of specified interrupts in master mode. More...

void	I2CSlaveIntClearEx (uintptr_t baseAddr, uint32_t intFlag)
	This API Clears the status of specified interrupts in Slave mode. More...

void	I2CMasterIntRawStatusClearEx (uintptr_t baseAddr, uint32_t intFlag)
	This API Clears the raw status of specified interrupts in master mode. More...

void	I2CSlaveIntRawStatusClearEx (uintptr_t baseAddr, uint32_t intFlag)
	This API Clears the raw status of specified interrupts in Slave mode. More...

void	I2CMasterSlaveAddrSet (uintptr_t baseAddr, uint32_t slaveAdd)
	This API sets the address of the slave device with which I2C wants to communicate. More...

uint32_t	I2CMasterSlaveAddrGet (uintptr_t baseAddr)
	This API returns the address of the slave device with which I2C wants to communicate. More...

void	I2CSetDataCount (uintptr_t baseAddr, uint32_t count)
	This API configure I2C data count register with a value. The value in the I2C data count register indicate how many data words to transfer when the I2C is configured as a master-transmitter and repeat mode is off. More...

uint32_t	I2CDataCountGet (uintptr_t baseAddr)
	This API gets the number of bytes transferred over the I2C bus. The value in the I2C data count register indicate how many data words to transfer when the I2C is configured as a master-transmitter and repeat mode is off. More...

void	I2CFIFOThresholdConfig (uintptr_t baseAddr, uint32_t thresholdVal, uint32_t flag)
	This API configures the threshold value for FIFO buffer. More...

void	I2CFIFOClear (uintptr_t baseAddr, uint32_t flag)
	This API clears Transmit and Receive FIFO. More...

void	I2CDMATxEventEnable (uintptr_t baseAddr)
	This API Enables generation of Transmit Event,when I2C_DATA register is empty. More...

void	I2CDMARxEventEnable (uintptr_t baseAddr)
	This API Enables generation of Receive DMA Event, when I2C_DATA register is full. More...

void	I2CDMATxEventDisable (uintptr_t baseAddr)
	This API Disables Transmit event. More...

void	I2CDMARxEventDisable (uintptr_t baseAddr)
	This API Disables Receive event. More...

uint32_t	I2CBufferStatus (uintptr_t baseAddr, uint32_t flag)
	This API returns the status of the internal buffers. More...

uint32_t	I2CActiveOwnAddressGet (uintptr_t baseAddr)
	This API returns one of the module's four own addresses,which external master used when addressing the module. More...

void	I2CClockBlockingControl (uintptr_t baseAddr, uint32_t ownAdd0, uint32_t ownAdd1, uint32_t ownAdd2, uint32_t ownAdd3)
	This API blocks or unblocks the clock for any of the module's four own addresses. More...

void	I2COwnAddressSet (uintptr_t baseAddr, uint32_t ownAdd, uint32_t flag)
	This API configures any one of the own address field out of four present in I2C controller. More...

void	I2CSoftReset (uintptr_t baseAddr)
	This API reset the entire I2C module.On reset,are set to power up reset values. More...

void	I2CAutoIdleEnable (uintptr_t baseAddr)
	This API enables auto idle mechanism. More...

void	I2CAutoIdleDisable (uintptr_t baseAddr)
	This API disables auto idle mechanism. More...

void	I2CGlobalWakeUpEnable (uintptr_t baseAddr)
	This API enables wakeup mechanism. More...

void	I2CGlobalWakeUpDisable (uintptr_t baseAddr)
	This API disables wakeup mechanism. More...

void	I2CIdleModeSelect (uintptr_t baseAddr, uint32_t flag)
	This API selects one of the idle mode operation mechanism. More...

void	I2CClockActivitySelect (uintptr_t baseAddr, uint32_t flag)
	This API disable external clock gating mechanism by selecting appropriate type of clock activity. More...

void	I2CWakeUpEnable (uintptr_t baseAddr, uint32_t eventFlag, uint32_t flag)
	This API Enables a specific IRQ/DMA request source to generate an asynchronous wakeup signal.A wakeup is signalled to the local host if the corresponding event is captured by the core of the I2C controller. More...

void	I2CWakeUpDisable (uintptr_t baseAddr, uint32_t eventFlag, uint32_t flag)
	This API Disables a specific IRQ/DMA request source to generate an asynchronous wakeup signal.A wakeup is signalled to the local host if the corresponding event is captured by the core of the I2C controller. More...

uint32_t	I2CSystemStatusGet (uintptr_t baseAddr)
	This API indicates the state of the reset in case of hardware reset,global reset or partial reset. More...

void	I2CMasterDataPut (uintptr_t baseAddr, uint8_t data)
	This API transmits a byte from the I2C in Master mode. More...

uint8_t	I2CMasterDataGet (uintptr_t baseAddr)
	This API Receives a byte that has been sent to the I2C in Master mode. More...

void	I2CSlaveDataPut (uintptr_t baseAddr, uint32_t data)
	This API transmits a byte from the I2C in Slave mode. More...

uint8_t	I2CSlaveDataGet (uintptr_t baseAddr)
	This API Receives a byte that has been sent to the I2C in Slave mode. More...

void	I2CSyscInit (uintptr_t baseAddr, uint32_t syscFlag)
	This function configures SYSC register. More...

void	I2CConfig (uintptr_t baseAddr, uint32_t conParams)
	This API configures the I2C operation mode(F/S or HS), slave address 7bit or 10bit, own address 7bit or 10bit and start byte mode or normal mode of operation. More...

void	I2CFlushFifo (uintptr_t baseAddr)
	This clears the I2C TX and RX FIFO. More...

uint32_t	I2CGetEnabledIntStatus (uintptr_t baseAddr, uint32_t intFlag)
	This API gets the status of enabled interrupt for the interrupt flag passed. More...

Macro Definition Documentation

◆ I2C_INT_ARBITRATION_LOST

#define I2C_INT_ARBITRATION_LOST ((uint32_t) I2C_IRQSTATUS_AL_MASK)

I2C_INT_ARBITRATION_LOST - Arbitration lost interrupt.

◆ I2C_INT_NO_ACK

#define I2C_INT_NO_ACK ((uint32_t) I2C_IRQSTATUS_NACK_MASK)

I2C_INT_NO_ACK - No acknowledgement interrupt.

◆ I2C_INT_ADRR_READY_ACESS

#define I2C_INT_ADRR_READY_ACESS ((uint32_t) I2C_IRQSTATUS_ARDY_MASK)

I2C_INT_ADRR_READY_ACESS - Register access ready interrupt.

◆ I2C_INT_RECV_READY

#define I2C_INT_RECV_READY ((uint32_t) I2C_IRQSTATUS_RRDY_MASK)

I2C_INT_RECV_READY - Receive data ready interrupt.

◆ I2C_INT_TRANSMIT_READY

#define I2C_INT_TRANSMIT_READY ((uint32_t) I2C_IRQSTATUS_XRDY_MASK)

I2C_INT_TRANSMIT_READY - Transmit data ready interrupt.

◆ I2C_INT_GENERAL_CALL

#define I2C_INT_GENERAL_CALL ((uint32_t) I2C_IRQSTATUS_GC_MASK)

I2C_INT_GENERAL_CALL - General call Interrupt.

◆ I2C_INT_START

#define I2C_INT_START ((uint32_t) I2C_IRQSTATUS_STC_MASK)

I2C_INT_START - Start Condition interrupt.

◆ I2C_INT_ACCESS_ERROR

#define I2C_INT_ACCESS_ERROR ((uint32_t) I2C_IRQSTATUS_AERR_MASK)

I2C_INT_ACCESS_ERROR - Access Error interrupt.

◆ I2C_INT_STOP_CONDITION

#define I2C_INT_STOP_CONDITION ((uint32_t) I2C_IRQSTATUS_BF_MASK)

I2C_INT_STOP_CONDITION - Bus Free interrupt.

◆ I2C_INT_ADRR_SLAVE

#define I2C_INT_ADRR_SLAVE ((uint32_t) I2C_IRQSTATUS_AAS_MASK)

I2C_INT_ADRR_SLAVE - Addressed as Slave interrupt.

◆ I2C_INT_TRANSMIT_UNDER_FLOW

#define I2C_INT_TRANSMIT_UNDER_FLOW ((uint32_t) I2C_IRQSTATUS_XUDF_MASK)

I2C_INT_TRANSMIT_UNDER_FLOW - Transmit underflow interrupt.

◆ I2C_INT_RECV_OVER_RUN

#define I2C_INT_RECV_OVER_RUN ((uint32_t) I2C_IRQSTATUS_ROVR_MASK)

I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.

◆ I2C_INT_RECV_DRAIN

#define I2C_INT_RECV_DRAIN ((uint32_t) I2C_IRQSTATUS_RDR_MASK)

I2C_INT_RECV_DRAIN - Receive Draining interrupt.

◆ I2C_INT_TRANSMIT_DRAIN

#define I2C_INT_TRANSMIT_DRAIN ((uint32_t) I2C_IRQSTATUS_XDR_MASK)

I2C_INT_TRANSMIT_DRAIN - Transmit Draining interrupt.

◆ I2C_INT_BUS_BUSY

#define I2C_INT_BUS_BUSY ((uint32_t) I2C_IRQSTATUS_RAW_BB_MASK)

I2C_INT_BUS_BUSY - Bus busy interrupt raw status.

◆ I2C_INT_BUS_FREE

#define I2C_INT_BUS_FREE ((uint32_t) I2C_IRQSTATUS_RAW_BF_MASK)

I2C_INT_BUS_FREE - Bus free interrupt raw status.

◆ I2C_INT_ALL

#define I2C_INT_ALL ((uint32_t) 0x7FFFU)

I2C_INT_ALL - Enable all interrupt.

◆ I2C_TX_MODE

#define I2C_TX_MODE ((uint32_t) 1U)

I2C_TX_MODE - Transmit mode.

◆ I2C_RX_MODE

#define I2C_RX_MODE ((uint32_t) 0U)

I2C_RX_MODE - Receive mode.

◆ I2C_TX_BUFFER_STATUS

#define I2C_TX_BUFFER_STATUS ((uint32_t) 0U)

I2C_TX_BUFFER_STATUS - TX buffer status flag.

◆ I2C_RX_BUFFER_STATUS

#define I2C_RX_BUFFER_STATUS ((uint32_t) 1U)

I2C_RX_BUFFER_STATUS - RX buffer status flag.

◆ I2C_FIFO_DEPTH

#define I2C_FIFO_DEPTH ((uint32_t) 2U)

I2C_FIFO_DEPTH - Internal FIFO depth flag.

◆ I2C_WAKE_UP_ARBITRATION_LOST

#define I2C_WAKE_UP_ARBITRATION_LOST (I2C_WE_AL_MASK)

I2C_WAKE_UP_ARBITRATION_LOST - Arbitration lost IRQ wakeup set.

◆ I2C_WAKE_UP_NO_ACK

#define I2C_WAKE_UP_NO_ACK (I2C_WE_NACK_MASK)

I2C_WAKE_UP_NO_ACK - No acknowledgment IRQ wakeup set.

◆ I2C_WAKE_UP_ADRR_RDY_ACCESS

#define I2C_WAKE_UP_ADRR_RDY_ACCESS (I2C_WE_ARDY_MASK)

I2C_WAKE_UP_ADRR_RDY_ACCESS - Register access ready IRQ wakeup set.

◆ I2C_WAKE_UP_GENERAL_CALL

#define I2C_WAKE_UP_GENERAL_CALL (I2C_WE_GC_MASK)

I2C_WAKE_UP_GENERAL_CALL - General call IRQ wakeup set.

◆ I2C_WAKE_UP_START

#define I2C_WAKE_UP_START (I2C_WE_STC_MASK)

I2C_WAKE_UP_START - Start Condition IRQ wakeup set.

◆ I2C_WAKE_UP_STOP_CONDITION

#define I2C_WAKE_UP_STOP_CONDITION (I2C_WE_BF_MASK)

I2C_WAKE_UP_STOP_CONDITION - Bus Free IRQ wakeup set.

◆ I2C_WAKE_UP_ADRR_SLAVE

#define I2C_WAKE_UP_ADRR_SLAVE (I2C_WE_AAS_MASK)

I2C_WAKE_UP_ADRR_SLAVE - Address as slave IRQ wakeup set.

◆ I2C_WAKE_UP_TX_UNDER_FLOW

#define I2C_WAKE_UP_TX_UNDER_FLOW (I2C_WE_XUDF_MASK)

I2C_WAKE_UP_TX_UNDER_FLOW - Transmit underflow wakeup set.

◆ I2C_WAKE_UP_RECV_OVER_RUN

#define I2C_WAKE_UP_RECV_OVER_RUN (I2C_WE_ROVR_MASK)

I2C_WAKE_UP_RECV_OVER_RUN - Receive overrun wakeup set.

◆ I2C_WAKE_UP_RECV_DRAIN

#define I2C_WAKE_UP_RECV_DRAIN (I2C_WE_RDR_MASK)

I2C_WAKE_UP_RECV_DRAIN - Receive Draining wakeup set.

◆ I2C_WAKE_UP_TRANSMIT_DRAIN

#define I2C_WAKE_UP_TRANSMIT_DRAIN (I2C_WE_XDR_MASK)

I2C_WAKE_UP_TRANSMIT_DRAIN - Transmit Draining wakeup set.

◆ I2C_WAKE_UP_DATA_RECV_TX_RDY

#define I2C_WAKE_UP_DATA_RECV_TX_RDY (I2C_WE_DRDY_MASK)

I2C_WAKE_UP_DATA_RECV_TX_RDY - Receive/Transmit data ready IRQ wakeup set.

◆ I2C_WAKE_UP_IRQ

#define I2C_WAKE_UP_IRQ ((uint32_t) 1U)

I2C_WAKE_UP_IRQ - IRQ request source.

◆ I2C_WAKE_UP_DMA_RECV

#define I2C_WAKE_UP_DMA_RECV ((uint32_t) 2U)

I2C_WAKE_UP_DMA_RECV - DMA receive request source.

◆ I2C_WAKE_UP_DMA_TRANSMIT

#define I2C_WAKE_UP_DMA_TRANSMIT ((uint32_t) 3U)

I2C_WAKE_UP_DMA_TRANSMIT - DMA transmit request source.

◆ I2C_STATUS_RAW

#define I2C_STATUS_RAW ((uint32_t) 0U)

I2C_STATUS_RAW - RAW IRQ status.

◆ I2C_STATUS

#define I2C_STATUS ((uint32_t) 1U)

I2C_STATUS - IRQ status.

◆ HAL_HSI2C_SUCCESS

#define HAL_HSI2C_SUCCESS ((uint32_t) 0U)

HAL_HSI2C_SUCCESS - I2C success.

◆ HAL_HSI2C_FAIL

#define HAL_HSI2C_FAIL ((uint32_t) 1U)

HAL_HSI2C_FAIL - I2C fail.

◆ I2C_OWN_ADDR_0

#define I2C_OWN_ADDR_0 ((uint32_t) 0U)

I2C_OWN_ADDR_0 - set own address 0.

◆ I2C_OWN_ADDR_1

#define I2C_OWN_ADDR_1 ((uint32_t) 1U)

I2C_OWN_ADDR_1 - set own address 1.

◆ I2C_OWN_ADDR_2

#define I2C_OWN_ADDR_2 ((uint32_t) 2U)

I2C_OWN_ADDR_2 - set own address 2.

◆ I2C_OWN_ADDR_3

#define I2C_OWN_ADDR_3 ((uint32_t) 3U)

I2C_OWN_ADDR_3 - set own address 3.

◆ I2C_AUTOIDLE_DISABLE

#define I2C_AUTOIDLE_DISABLE (I2C_SYSC_AUTOIDLE_DISABLE)

I2C_AUTOIDLE_DISABLE Disable auto idle mechanism.

◆ I2C_AUTOIDLE_ENABLE

#define I2C_AUTOIDLE_ENABLE

Value:

((uint32_t) I2C_SYSC_AUTOIDLE_ENABLE << \

I2C_SYSC_AUTOIDLE_SHIFT)

I2C_AUTOIDLE_ENABLE Enable autoidle mechanism.

◆ I2C_CUT_OFF_BOTH_CLK

#define I2C_CUT_OFF_BOTH_CLK (I2C_SYSC_CLKACTIVITY_BOOTHOFF)

I2C_CUT_OFF_BOTH_CLK Both OCP and SYS Clk are cut off.

◆ I2C_CUT_OFF_SYS_CLK

#define I2C_CUT_OFF_SYS_CLK

Value:

((uint32_t) I2C_SYSC_CLKACTIVITY_OCPON << \

I2C_SYSC_CLKACTIVITY_SHIFT)

I2C_CUT_OFF_SYS_CLK system clock is cut off;OCP clock is kept alive.

◆ I2C_CUT_OFF_OCP_CLK

#define I2C_CUT_OFF_OCP_CLK

Value:

((uint32_t) I2C_SYSC_CLKACTIVITY_SYSON << \

I2C_SYSC_CLKACTIVITY_SHIFT)

I2C_CUT_OFF_OCP_CLK OCP clock is cut off;system clock is is kept alive.

◆ I2C_KEEP_ALIVE_BOTH_CLK

#define I2C_KEEP_ALIVE_BOTH_CLK

Value:

((uint32_t) I2C_SYSC_CLKACTIVITY_BOOTHON << \

I2C_SYSC_CLKACTIVITY_SHIFT)

I2C_KEEP_ALIVE_BOTH_CLK BOTH OCP and SYS Clk are kept alive.

◆ I2C_ENAWAKEUP_DISABLE

#define I2C_ENAWAKEUP_DISABLE (I2C_SYSC_ENAWAKEUP_DISABLE)

I2C_ENAWAKEUP__DISABLE Disable wakeup mechanism.

◆ I2C_ENAWAKEUP_ENABLE

#define I2C_ENAWAKEUP_ENABLE

Value:

((uint32_t) I2C_SYSC_ENAWAKEUP_ENABLE << \

I2C_SYSC_ENAWAKEUP_SHIFT)

I2C_ENAWAKEUP__ENABLE Enable wakeup mechanism.

◆ I2C_FORCE_IDLE_MODE

#define I2C_FORCE_IDLE_MODE (I2C_SYSC_IDLEMODE_FORCEIDLE)

I2C_FORCE_IDLE_MODE selects forced idle mode operation.

◆ I2C_NO_IDLE_MODE

#define I2C_NO_IDLE_MODE

Value:

((uint32_t) I2C_SYSC_IDLEMODE_NOIDLE << \

I2C_SYSC_IDLEMODE_SHIFT)

I2C_NO_IDLE_MODE selects no idle mode operation.

◆ I2C_SMART_IDLE_MODE

#define I2C_SMART_IDLE_MODE

Value:

((uint32_t) I2C_SYSC_IDLEMODE_SMARTIDLE << \

I2C_SYSC_IDLEMODE_SHIFT)

I2C_SMART_IDLE_MODE selects smart idle mode operation.

◆ I2C_SMART_IDLE_WAKEUP_MODE

#define I2C_SMART_IDLE_WAKEUP_MODE

Value:

((uint32_t) I2C_SYSC_IDLEMODE_SMARTIDLE_WAKEUP << \

I2C_SYSC_IDLEMODE_SHIFT)

I2C_SMART_IDLE_WAKEUP_MODE selects smart idle wakeup mode of operation.

◆ I2C_OPMODE_FAST_STAND_MODE

#define I2C_OPMODE_FAST_STAND_MODE (I2C_CON_OPMODE_FSI2C)

I2C_OPMODE_FAST_STAND_MODE Select Fast/Standard mode.

◆ I2C_OPMODE_HIGH_SPEED_MODE

#define I2C_OPMODE_HIGH_SPEED_MODE

Value:

((uint32_t) I2C_CON_OPMODE_HSI2C << \

I2C_CON_OPMODE_SHIFT)

I2C_OPMODE_HIGH_SPEED_MODE Select high speed mode.

◆ I2C_NORMAL_MODE

#define I2C_NORMAL_MODE (I2C_CON_STB_NORMAL)

I2C_NORMAL_MODE Select Normal mode.

◆ I2C_STB_MODE

#define I2C_STB_MODE ((uint32_t) I2C_CON_STB_STB << I2C_CON_STB_SHIFT)

I2C_STB_MODE Select start byte mode.

◆ I2C_XSA_7BIT

#define I2C_XSA_7BIT (I2C_CON_XSA_B07)

I2C_XSA_7BIT Slave address 7 bit mode.

◆ I2C_XSA_10BIT

#define I2C_XSA_10BIT ((uint32_t) I2C_CON_XSA_B10 << I2C_CON_XSA_SHIFT)

I2C_XSA_10BIT Slave address 10 bit mode.

Function Documentation

◆ I2CMasterInitExpClk()

void I2CMasterInitExpClk	(	uintptr_t	baseAddr,
		uint32_t	sysClk,
		uint32_t	internalClk,
		uint32_t	outputClk
	)

This API will divide the system clock fed to I2C module between 12 and 100Mhz.It will also configure the I2C bus clock frequency.

Parameters

baseAddr	I2C base address.
sysClk	It is the System clock fed to I2C module.
internalClk	It is the internal clock used by I2C module.Which is obtained by scaling System clock fed to I2C module.
outputClk	It is the required I2C bus speed or frequency.

Returns: None.

◆ I2CMasterEnable()

void I2CMasterEnable ( uintptr_t baseAddr )

This API Enables the I2C module.This will bring the I2C module out of reset.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CMasterEnableFreeRun()

void I2CMasterEnableFreeRun ( uintptr_t baseAddr )

Enables the I2C free run module.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CMasterSetSysTest()

void I2CMasterSetSysTest	(	uintptr_t	baseAddr,
		uint32_t	sysTest
	)

Set the I2C systest register.

Parameters

baseAddr	It is the Memory address of the I2C instance used.
sysTest	The system test register value to be set.

Returns: None.

◆ I2CMasterGetSysTest()

uint32_t I2CMasterGetSysTest ( uintptr_t baseAddr )

Get the I2C systest register.

Parameters

baseAddr It is the Memory address of the I2C instance used.

Returns: sysTest The system test register value to be set.

◆ I2CMasterDisable()

void I2CMasterDisable ( uintptr_t baseAddr )

Disables the I2C Module.This will put the I2C module in reset. Only Tx and Rx are cleared,status bits are set their default values and all configuration registers are not reset, they keep their initial values.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CMasterBusBusy()

int32_t I2CMasterBusBusy ( uintptr_t baseAddr )

This API determines whether bus is busy or not.

Parameters

baseAddr I2C base address.

Returns: returns 1 if bus is busy. returns 0 if bus is free.

◆ I2CMasterBusy()

uint32_t I2CMasterBusy ( uintptr_t baseAddr )

This API determines whether Master is busy or not.

Parameters

baseAddr I2C base address.

Returns: returns 1 if bus is busy. returns 0 if bus is free.

◆ I2CMasterErr()

uint32_t I2CMasterErr ( uintptr_t baseAddr )

This API determines whether error occurred or not during I2C operation.

Parameters

baseAddr I2C base address.

Returns: error status.If error has occurred it returns a non zero value. If no error has occurred then return status will be zero.

◆ I2CMasterControl()

void I2CMasterControl	(	uintptr_t	baseAddr,
		uint32_t	cmd
	)

This API configure I2C in different modes of operation.

Parameters

baseAddr I2C base address.

cmd It is the value which configures I2C in different modes of operation.
cmd can take following macros.
I2C_CFG_MST_TX - Configure'sI2C as Master-Transmitter.
I2C_CFG_MST_RX - Configurers I2C as Master-Receiver.
I2C_CFG_STOP - Configurers I2C to generate stop condition when DCOUNT counts down to zero.
I2C_CFG_N0RMAL_MODE - Configurers I2C in normal mode.
I2C_CFG_SRT_BYTE_MODE - Configurers I2C in start byte mode.
I2C_CFG_7BIT_SLAVE_ADDR - Configurers I2C to address seven bit addressed slave.
I2C_CFG_10BIT_SLAVE_ADDR - Configurers I2C to address ten bit addressed slave.
I2C_CFG_10BIT_OWN_ADDR_0 - Enable 10bit addressing mode for own address 0.
I2C_CFG_10BIT_OWN_ADDR_1 - Enable 10bit addressing mode for own address 1.
I2C_CFG_10BIT_OWN_ADDR_2 - Enable 10bit addressing mode for own address 2.
I2C_CFG_10BIT_OWN_ADDR_3 - Enable 10bit addressing mode for own address 3.
I2C_CFG_7BIT_OWN_ADDR_0 - Enable 7bit addressing mode for own address 0.
I2C_CFG_7BIT_OWN_ADDR_1 - Enable 7bit addressing mode for own address 1 .
I2C_CFG_7BIT_OWN_ADDR_2 - Enable 7bit addressing mode for own address 2.
I2C_CFG_7BIT_OWN_ADDR_3 - Enable 7bit addressing mode for own address 3.

Returns: None.

◆ I2CMasterStart()

void I2CMasterStart ( uintptr_t baseAddr )

This API starts a I2C transaction on the bus. This API must be called after all the configuration for the i2c module is done and after bringing I2C out of local reset.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CMasterStop()

void I2CMasterStop ( uintptr_t baseAddr )

This API stops a I2C transaction on the bus. This API must be used in case a deliberate STOP needs to be sent on the bus.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CMasterIntEnableEx()

void I2CMasterIntEnableEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API enables only specified I2C interrupts in master mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts that are required to be enabled.
intFlag can take following values.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: None.

◆ I2CSlaveIntEnableEx()

void I2CSlaveIntEnableEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API enables only specified I2C interrupts in Slave mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts that are required to be enabled.
intFlag can take following values.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: None.

◆ I2CMasterIntDisableEx()

void I2CMasterIntDisableEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API disables only specified I2C interrupts in master mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts that are required to be disabled
intFlag can take following values.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: None.

◆ I2CSlaveIntDisableEx()

void I2CSlaveIntDisableEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API disables only specified I2C interrupts in Slave mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts that are required to be disabled
intFlag can take following values.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: None.

◆ I2CMasterIntStatus()

uint32_t I2CMasterIntStatus ( uintptr_t baseAddr )

This API returns the status of interrupts in master mode.

Parameters

baseAddr I2C base address.

Returns: status of interrupts.

◆ I2CSlaveIntStatus()

uint32_t I2CSlaveIntStatus ( uintptr_t baseAddr )

This API returns the status of interrupts in slave mode.

Parameters

baseAddr I2C base address.

Returns: status of interrupts.

◆ I2CMasterIntStatusEx()

uint32_t I2CMasterIntStatusEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API returns the status of specified interrupts in master mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts whose status needs to be returned.
intFlag can take following macros.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C register ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_BUS_BUSY - Bus busy.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: status of specified interrupts.

◆ I2CSlaveIntStatusEx()

uint32_t I2CSlaveIntStatusEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API returns the status of specified interrupts in slave mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts whose status needs to be returned.
intFlag can take following macros.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_BUS_BUSY - Bus busy.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: status of specified interrupts.

◆ I2CMasterIntRawStatus()

uint32_t I2CMasterIntRawStatus ( uintptr_t baseAddr )

This API returns the raw status of interrupts in master mode.

Parameters

baseAddr I2C base address.

Returns: Raw status of interrupts.

◆ I2CSlaveIntRawStatus()

uint32_t I2CSlaveIntRawStatus ( uintptr_t baseAddr )

This API returns the raw status of interrupts in slave mode.

Parameters

baseAddr I2C base address.

Returns: Raw status of interrupts.

◆ I2CMasterIntRawStatusEx()

uint32_t I2CMasterIntRawStatusEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API returns the raw status of specified interrupts in master mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts whose raw status needs to be returned.
intFlag can take following macros.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_BUS_BUSY - Bus busy.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: status of specified interrupts.

◆ I2CSlaveIntRawStatusEx()

uint32_t I2CSlaveIntRawStatusEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API returns the raw status of specified interrupts in slave mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts whose raw status needs to be returned.
intFlag can take following macros.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_BUS_BUSY - Bus busy.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: status of specified interrupts.

◆ I2CMasterIntClearEx()

void I2CMasterIntClearEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API Clears the status of specified interrupts in master mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts whose status needs to be cleared
intFlag can take following macros.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: None

◆ I2CSlaveIntClearEx()

void I2CSlaveIntClearEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API Clears the status of specified interrupts in Slave mode.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts whose status needs to be cleared
intFlag can take following macros.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: None

◆ I2CMasterIntRawStatusClearEx()

void I2CMasterIntRawStatusClearEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API Clears the raw status of specified interrupts in master mode.

Parameters

baseAddr	I2C base address.
intFlag	It specifies the interrupts whose status needs to be cleared intFlag can take following macros. I2C_INT_NO_ACK - No-acknowledgement interrupt. I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access. I2C_INT_RECV_READY - Receive-data-ready interrupt. I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt. I2C_INT_GENERAL_CALL - General call interrupt.

Returns: None

◆ I2CSlaveIntRawStatusClearEx()

void I2CSlaveIntRawStatusClearEx	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API Clears the raw status of specified interrupts in Slave mode.

Parameters

baseAddr	I2C base address.
intFlag	It specifies the interrupts whose status needs to be cleared intFlag can take following macros. I2C_INT_NO_ACK - No-acknowledgement interrupt. I2C_INT_ADRR_READY_ACESS - I2C register are ready to access. I2C_INT_RECV_READY - Receive-data-ready interrupt. I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt. I2C_INT_GENERAL_CALL - General call interrupt.

Returns: None

◆ I2CMasterSlaveAddrSet()

void I2CMasterSlaveAddrSet	(	uintptr_t	baseAddr,
		uint32_t	slaveAdd
	)

This API sets the address of the slave device with which I2C wants to communicate.

Parameters

baseAddr	I2C base address.
slaveAdd	slave address.

Returns: None.

◆ I2CMasterSlaveAddrGet()

uint32_t I2CMasterSlaveAddrGet ( uintptr_t baseAddr )

This API returns the address of the slave device with which I2C wants to communicate.

Parameters

baseAddr I2C base address.

Returns: slave address.

◆ I2CSetDataCount()

void I2CSetDataCount	(	uintptr_t	baseAddr,
		uint32_t	count
	)

This API configure I2C data count register with a value. The value in the I2C data count register indicate how many data words to transfer when the I2C is configured as a master-transmitter and repeat mode is off.

Parameters

baseAddr	I2C base address.
count	It is value which is set to I2C data count register.

Returns: None.

◆ I2CDataCountGet()

uint32_t I2CDataCountGet ( uintptr_t baseAddr )

This API gets the number of bytes transferred over the I2C bus. The value in the I2C data count register indicate how many data words to transfer when the I2C is configured as a master-transmitter and repeat mode is off.

Parameters

baseAddr I2C base address.

Returns: number of bytes transferred over the I2C bus.

◆ I2CFIFOThresholdConfig()

void I2CFIFOThresholdConfig	(	uintptr_t	baseAddr,
		uint32_t	thresholdVal,
		uint32_t	flag
	)

This API configures the threshold value for FIFO buffer.

Parameters

baseAddr	I2C base address.
thresholdVal	It is the threshold value for FIFO buffer.Which is used to specify the trigger level for data transfer or data receive transfers.
flag	It specifies FIFO buffer in TX mode or RX mode. flag can take following macros.\n I2C_TX_MODE.\n I2C_RX_MODE.\n

Returns: None.

◆ I2CFIFOClear()

void I2CFIFOClear	(	uintptr_t	baseAddr,
		uint32_t	flag
	)

This API clears Transmit and Receive FIFO.

Parameters

baseAddr	I2C base address.
flag	It specifies Transmit FIFO or Receive FIFO. flag can take following macros.\n I2C_TX_MODE - .\n I2C_RX_MODE - .\n

Returns: None.

◆ I2CDMATxEventEnable()

void I2CDMATxEventEnable ( uintptr_t baseAddr )

This API Enables generation of Transmit Event,when I2C_DATA register is empty.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CDMARxEventEnable()

void I2CDMARxEventEnable ( uintptr_t baseAddr )

This API Enables generation of Receive DMA Event, when I2C_DATA register is full.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CDMATxEventDisable()

void I2CDMATxEventDisable ( uintptr_t baseAddr )

This API Disables Transmit event.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CDMARxEventDisable()

void I2CDMARxEventDisable ( uintptr_t baseAddr )

This API Disables Receive event.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CBufferStatus()

uint32_t I2CBufferStatus	(	uintptr_t	baseAddr,
		uint32_t	flag
	)

This API returns the status of the internal buffers.

Parameters

baseAddr I2C base address.

flag

It specifies required status field.

    BufStatOp can take following macros.\n

    I2C_TX_BUFFER_STATUS - Indicates the number of data bytes still.
                             left to be written in TXFIFO\n
    I2C_RX_BUFFER_STATUS - Indicates the number of bytes to be
                             transferred from the FIFO at the end
                             of the I2C transfer.\n
    I2C_FIFO_DEPTH       - Internal FIFO buffer depth.\n

Returns: required status of internal buffer.

◆ I2CActiveOwnAddressGet()

uint32_t I2CActiveOwnAddressGet ( uintptr_t baseAddr )

This API returns one of the module's four own addresses,which external master used when addressing the module.

Parameters

baseAddr I2C base address.

Returns: one of the module's four own address the external master used when addressing the module. returns HSI2C_FAIL if failed to get own address

◆ I2CClockBlockingControl()

void I2CClockBlockingControl	(	uintptr_t	baseAddr,
		uint32_t	ownAdd0,
		uint32_t	ownAdd1,
		uint32_t	ownAdd2,
		uint32_t	ownAdd3
	)

This API blocks or unblocks the clock for any of the module's four own addresses.

Parameters

baseAddr	I2C base address.
ownAdd0	It is value which blocks or unblocks clock to i2c if an external master using own address 0.
ownAdd1	It is value which blocks or unblocks clock to i2c if an external master using own address 1.
ownAdd2	It is value which blocks or unblocks clock to i2c if an external master using own address 2.
ownAdd3	It is value which blocks or unblocks clock to i2c if an external master using own address 0.

0 - Unblocks clock to i2c 1 - Blocks clock to i2c

Returns: None.

◆ I2COwnAddressSet()

void I2COwnAddressSet	(	uintptr_t	baseAddr,
		uint32_t	ownAdd,
		uint32_t	flag
	)

This API configures any one of the own address field out of four present in I2C controller.

Parameters

baseAddr	I2C base address.
ownAdd	Own address to be set.
flag	It specifies the any one of the own address field out of four. flag can take following values. I2C_OWN_ADDR_0. I2C_OWN_ADDR_1. I2C_OWN_ADDR_2. I2C_OWN_ADDR_3.

Returns: None.

◆ I2CSoftReset()

void I2CSoftReset ( uintptr_t baseAddr )

This API reset the entire I2C module.On reset,are set to power up reset values.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CAutoIdleEnable()

void I2CAutoIdleEnable ( uintptr_t baseAddr )

This API enables auto idle mechanism.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CAutoIdleDisable()

void I2CAutoIdleDisable ( uintptr_t baseAddr )

This API disables auto idle mechanism.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CGlobalWakeUpEnable()

void I2CGlobalWakeUpEnable ( uintptr_t baseAddr )

This API enables wakeup mechanism.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CGlobalWakeUpDisable()

void I2CGlobalWakeUpDisable ( uintptr_t baseAddr )

This API disables wakeup mechanism.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CIdleModeSelect()

void I2CIdleModeSelect	(	uintptr_t	baseAddr,
		uint32_t	flag
	)

This API selects one of the idle mode operation mechanism.

Parameters

baseAddr	I2C base address.
flag	It is the value which determines the type of idle mode operation. idleMode can take following values. I2C_FORCE_IDLE_MODE - selects forced idle mode operation. I2C_NO_IDLE_MODE - selects no idle mode operation. I2C_SMART_IDLE_MODE - selects smart idle mode operation. I2C_SMART_IDLE_WAKEUP_MODE - selects smart idle wakeup mode of operation.

Returns: None.

◆ I2CClockActivitySelect()

void I2CClockActivitySelect	(	uintptr_t	baseAddr,
		uint32_t	flag
	)

This API disable external clock gating mechanism by selecting appropriate type of clock activity.

Parameters

baseAddr	I2C base address.
flag	It is the value which determines the type of clock activity. clkAct can take following values. I2C_CUT_OFF_BOTH_CLK - Both OCP and SYS CLK are cut off. I2C_CUT_OFF_SYS_CLK - system clock is cut off;OCP clock is kept alive. I2C_CUT_OFF_OCP_CLK - OCP clock is cut off;system clock is is kept alive I2C_KEEP_ALIVE_BOTH_CLK - BOTH OCP and SYS CLK are kept alive.

Returns: None.

◆ I2CWakeUpEnable()

void I2CWakeUpEnable	(	uintptr_t	baseAddr,
		uint32_t	eventFlag,
		uint32_t	flag
	)

This API Enables a specific IRQ/DMA request source to generate an asynchronous wakeup signal.A wakeup is signalled to the local host if the corresponding event is captured by the core of the I2C controller.

Parameters

baseAddr	I2C base address.
eventFlag	It specifies for which event wakeup signal has to Enable. eventFlag can take following values. I2C_WAKE_UP_ARBITRATION_LOST - Arbitration-lost wakeup signal. I2C_WAKE_UP_NO_ACK - No-acknowledgement wakeup signal. I2C_WAKE_UP_ADRR_READY_ACCESS - No-acknowledgement wakeup signal. I2C_WAKE_UP_GENERAL_CALL - General call wakeup signal. I2C_WAKE_UP_START - Start condition wakeup signal. I2C_WAKE_UP_STOP_CONDITION - Stop condition wakeup signal. I2C_WAKE_UP_ADRR_SLAVE - Address-as-slave wakeup signal. I2C_WAKE_UP_TX_UNDER_FLOW - Transmit under flow wakeup signal. I2C_WAKE_UP_RECV_OVER_RUN - Receive overrun wakeup signal. I2C_WAKE_UP_RECV_DRAIN - Receive drain wakeup signal. I2C_WAKE_UP_TRANSMIT_DRAIN - Transmit drain wakeup signal. I2C_WAKE_UP_DATA_RECV_TX_RDY - Receive-data-ready wakeup signal.
flag	It specifies IRQ or DMA Transmit or DMA receive request source to generate asynchronous wake up signal. flag can take following values. I2C_WAKE_UP_IRQ. I2C_WAKE_UP_DMA_RECV. I2C_WAKE_UP_DMA_TRANMIT.

Returns: None.

◆ I2CWakeUpDisable()

void I2CWakeUpDisable	(	uintptr_t	baseAddr,
		uint32_t	eventFlag,
		uint32_t	flag
	)

This API Disables a specific IRQ/DMA request source to generate an asynchronous wakeup signal.A wakeup is signalled to the local host if the corresponding event is captured by the core of the I2C controller.

Parameters

baseAddr	I2C base address.
eventFlag	It specifies for which event wakeup signal has to disabled. intFlag can take following macros. I2C_WAKE_UP_ARBITRATION_LOST - Arbitration-lost wakeup signal. I2C_WAKE_UP_NO_ACK - No-acknowledgement wakeup signal. I2C_WAKE_UP_ADRR_RDY_ACCESS - No-acknowledgement wakeup signal. I2C_WAKE_UP_GENERAL_CALL - General call wakeup signal. I2C_WAKE_UP_START - Start condition wakeup signal. I2C_WAKE_UP_STOP_CONDITION - Stop condition wakeup signal. I2C_WAKE_UP_ADRR_SLAVE - Address-as-slave wakeup signal. I2C_WAKE_UP_TX_UNDER_FLOW - Transmit under flow wakeup signal. I2C_WAKE_UP_RECV_OVER_RUN - Receive overrun wakeup signal. I2C_WAKE_UP_RECV_DRAIN - Receive drain wakeup signal. I2C_WAKE_UP_TRANSMIT_DRAIN - Transmit drain wakeup signal. I2C_WAKE_UP_DATA_RECV_TX_RDY - Receive-data-ready wakeup signal.
flag	It specifies IRQ or DMA Transmit or DMA receive request source to generate asynchronous wake up signal. flag can take following values. I2C_WAKE_UP_IRQ. I2C_WAKE_UP_DMA_RECV. I2C_WAKE_UP_DMA_TRANMIT.

Returns: None.

◆ I2CSystemStatusGet()

uint32_t I2CSystemStatusGet ( uintptr_t baseAddr )

This API indicates the state of the reset in case of hardware reset,global reset or partial reset.

Parameters

baseAddr I2C base address.

Returns: returns "1" if reset is completed. returns "0" if internal module reset is ongoing.

◆ I2CMasterDataPut()

void I2CMasterDataPut	(	uintptr_t	baseAddr,
		uint8_t	data
	)

This API transmits a byte from the I2C in Master mode.

Parameters

baseAddr	I2C base address.
data	data to be transmitted from the I2C Master.

Returns: None.

◆ I2CMasterDataGet()

uint8_t I2CMasterDataGet ( uintptr_t baseAddr )

This API Receives a byte that has been sent to the I2C in Master mode.

Parameters

baseAddr I2C base address.

Returns: Returns the byte received from by the I2C in Master mode.

◆ I2CSlaveDataPut()

void I2CSlaveDataPut	(	uintptr_t	baseAddr,
		uint32_t	data
	)

This API transmits a byte from the I2C in Slave mode.

Parameters

baseAddr	I2C base address.
data	data to be transmitted from the I2C in Slave mode.

Returns: None.

◆ I2CSlaveDataGet()

uint8_t I2CSlaveDataGet ( uintptr_t baseAddr )

This API Receives a byte that has been sent to the I2C in Slave mode.

Parameters

baseAddr I2C base address.

Returns: Returns the byte received from by the I2C in Slave mode.

◆ I2CSyscInit()

void I2CSyscInit	(	uintptr_t	baseAddr,
		uint32_t	syscFlag
	)

This function configures SYSC register.

Parameters

baseAddr	I2C base address.
syscFlag	value of sysc register.

◆ I2CConfig()

void I2CConfig	(	uintptr_t	baseAddr,
		uint32_t	conParams
	)

This API configures the I2C operation mode(F/S or HS), slave address 7bit or 10bit, own address 7bit or 10bit and start byte mode or normal mode of operation.

Parameters

baseAddr	I2C base address.
conParams	Is the structure defining the configure parameters.

See also: struct I2CconParams_s

◆ I2CFlushFifo()

void I2CFlushFifo ( uintptr_t baseAddr )

This clears the I2C TX and RX FIFO.

Parameters

baseAddr I2C base address.

Returns: None.

◆ I2CGetEnabledIntStatus()

uint32_t I2CGetEnabledIntStatus	(	uintptr_t	baseAddr,
		uint32_t	intFlag
	)

This API gets the status of enabled interrupt for the interrupt flag passed.

Parameters

baseAddr I2C base address.

intFlag It specifies the interrupts that are required to be enabled.
intFlag can take following values.
I2C_INT_ARBITRATION_LOST - Arbitration-lost interrupt.
I2C_INT_NO_ACK - No-acknowledgement interrupt.
I2C_INT_ADRR_READY_ACESS - I2C registers are ready to access.
I2C_INT_RECV_READY - Receive-data-ready interrupt.
I2C_INT_TRANSMIT_READY - Transmit-data-ready interrupt.
I2C_INT_GENERAL_CALL - General call interrupt.
I2C_INT_START - Start condition interrupt.
I2C_INT_ACCESS_ERROR - Access error interrupt.
I2C_INT_STOP_CONDITION - Stop condition interrupt.
I2C_INT_ADRR_SLAVE - Address-as-slave interrupt.
I2C_INT_TRANSMIT_UNDER_FLOW - Transmit under flow interrupt.
I2C_INT_RECV_OVER_RUN - Receive overrun interrupt.
I2C_INT_RECV_DRAIN - Receive drain interrupt.
I2C_INT_TRANSMIT_DRAIN - Transmit drain interrupt.

Returns: status of specified interrupts

Introduction

Macros

Functions

Macro Definition Documentation

◆ I2C_INT_ARBITRATION_LOST

◆ I2C_INT_NO_ACK

◆ I2C_INT_ADRR_READY_ACESS

◆ I2C_INT_RECV_READY

◆ I2C_INT_TRANSMIT_READY

◆ I2C_INT_GENERAL_CALL

◆ I2C_INT_START

◆ I2C_INT_ACCESS_ERROR

◆ I2C_INT_STOP_CONDITION

◆ I2C_INT_ADRR_SLAVE

◆ I2C_INT_TRANSMIT_UNDER_FLOW

◆ I2C_INT_RECV_OVER_RUN

◆ I2C_INT_RECV_DRAIN

◆ I2C_INT_TRANSMIT_DRAIN

◆ I2C_INT_BUS_BUSY

◆ I2C_INT_BUS_FREE

◆ I2C_INT_ALL

◆ I2C_TX_MODE

◆ I2C_RX_MODE

◆ I2C_TX_BUFFER_STATUS

◆ I2C_RX_BUFFER_STATUS

◆ I2C_FIFO_DEPTH

◆ I2C_WAKE_UP_ARBITRATION_LOST

◆ I2C_WAKE_UP_NO_ACK

◆ I2C_WAKE_UP_ADRR_RDY_ACCESS

◆ I2C_WAKE_UP_GENERAL_CALL

◆ I2C_WAKE_UP_START

◆ I2C_WAKE_UP_STOP_CONDITION

◆ I2C_WAKE_UP_ADRR_SLAVE

◆ I2C_WAKE_UP_TX_UNDER_FLOW

◆ I2C_WAKE_UP_RECV_OVER_RUN

◆ I2C_WAKE_UP_RECV_DRAIN

◆ I2C_WAKE_UP_TRANSMIT_DRAIN

◆ I2C_WAKE_UP_DATA_RECV_TX_RDY

◆ I2C_WAKE_UP_IRQ

◆ I2C_WAKE_UP_DMA_RECV

◆ I2C_WAKE_UP_DMA_TRANSMIT

◆ I2C_STATUS_RAW

◆ I2C_STATUS

◆ HAL_HSI2C_SUCCESS

◆ HAL_HSI2C_FAIL

◆ I2C_OWN_ADDR_0

◆ I2C_OWN_ADDR_1

◆ I2C_OWN_ADDR_2

◆ I2C_OWN_ADDR_3

◆ I2C_AUTOIDLE_DISABLE

◆ I2C_AUTOIDLE_ENABLE

◆ I2C_CUT_OFF_BOTH_CLK

◆ I2C_CUT_OFF_SYS_CLK

◆ I2C_CUT_OFF_OCP_CLK

◆ I2C_KEEP_ALIVE_BOTH_CLK

◆ I2C_ENAWAKEUP_DISABLE

◆ I2C_ENAWAKEUP_ENABLE

◆ I2C_FORCE_IDLE_MODE

◆ I2C_NO_IDLE_MODE

◆ I2C_SMART_IDLE_MODE

◆ I2C_SMART_IDLE_WAKEUP_MODE

◆ I2C_OPMODE_FAST_STAND_MODE

◆ I2C_OPMODE_HIGH_SPEED_MODE

◆ I2C_NORMAL_MODE

◆ I2C_STB_MODE

◆ I2C_XSA_7BIT

◆ I2C_XSA_10BIT

Function Documentation

◆ I2CMasterInitExpClk()

◆ I2CMasterEnable()

◆ I2CMasterEnableFreeRun()

◆ I2CMasterSetSysTest()

◆ I2CMasterGetSysTest()

◆ I2CMasterDisable()

◆ I2CMasterBusBusy()

◆ I2CMasterBusy()

◆ I2CMasterErr()

◆ I2CMasterControl()

◆ I2CMasterStart()

◆ I2CMasterStop()