pmic.h

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/******************************************************************************
 * Copyright (c) 2020 Texas Instruments Incorporated - http://www.ti.com
 *
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 *  are met:
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 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
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 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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 *****************************************************************************/

/* @} */

#ifndef PMIC_H_
#define PMIC_H_

/* ========================================================================= */
/*                             Include Files                                 */
/* ========================================================================= */
#include <pmic_types.h>
#include <pmic_core.h>
#include <pmic_gpio.h>
#include <pmic_rtc.h>
#include <pmic_irq.h>
#include <pmic_power.h>
#include <pmic_wdg.h>
#include <pmic_esm.h>
#include <pmic_fsm.h>

#ifdef __cplusplus
extern "C" {
#endif
/* ========================================================================= */
/*                             Macros & Typedefs                             */
/* ========================================================================= */

#define PMIC_ST_SUCCESS                                 (0)

#define PMIC_ST_ERR_INV_HANDLE                          (-((int32_t)1))

#define PMIC_ST_ERR_NULL_PARAM                          (-((int32_t)2))

#define PMIC_ST_ERR_INV_PARAM                           (-((int32_t)3))

#define PMIC_ST_ERR_INV_DEVICE                          (-((int32_t)4))

#define PMIC_ST_ERR_NULL_FPTR                           (-((int32_t)5))

#define PMIC_ST_ERR_INV_SUBSYSTEM                       (-((int32_t)6))

#define PMIC_ST_ERR_INSUFFICIENT_CFG                    (-((int32_t)7))

#define PMIC_ST_ERR_I2C_COMM_FAIL                       (-((int32_t)8))

#define PMIC_ST_ERR_SPI_COMM_FAIL                       (-((int32_t)9))

#define PMIC_ST_ERR_DATA_IO_CRC                         (-((int32_t)10))

#define PMIC_ST_ERR_INTF_SETUP_FAILED                   (-((int32_t)11))

#define PMIC_ST_ERR_COMM_INTF_INIT_FAIL                 (-((int32_t)12))

#define PMIC_ST_ERR_UNINIT                              (-((int32_t)13))

#define PMIC_ST_ERR_INV_VOLTAGE                         (-((int32_t)14))

#define PMIC_ST_ERR_INV_REGULATOR                       (-((int32_t)15))

#define PMIC_ST_ERR_INV_PGOOD_LEVEL                     (-((int32_t)16))

#define PMIC_ST_ERR_INV_TEMP_THRESHOLD                  (-((int32_t)17))

#define PMIC_ST_ERR_INV_GPIO                            (-((int32_t)18))

#define PMIC_ST_ERR_INV_GPIO_FUNC                       (-((int32_t)19))

#define PMIC_ST_ERR_INV_GPIO_LINE_PARAMS                (-((int32_t)20))

#define PMIC_ST_ERR_PIN_NOT_GPIO                        (-((int32_t)21))

#define PMIC_ST_ERR_INV_WDG_WINDOW                      (-((int32_t)22))

#define PMIC_ST_ERR_INV_WDG_ANSWER                      (-((int32_t)23))

#define PMIC_ST_ERR_WDG_EARLY_ANSWER                    (-((int32_t)24))

#define PMIC_ST_ERR_INV_ESM_TARGET                      (-((int32_t)25))

#define PMIC_ST_ERR_INV_ESM_MODE                        (-((int32_t)26))

#define PMIC_ST_ERR_INV_INT                             (-((int32_t)27))

#define PMIC_ST_ERR_CLEAR_INT_FAILED                    (-((int32_t)28))

#define PMIC_ST_ERR_INV_TIME                            (-((int32_t)29))

#define PMIC_ST_ERR_INV_DATE                            (-((int32_t)30))

#define PMIC_ST_ERR_RTC_STOP_FAIL                       (-((int32_t)31))

#define PMIC_ST_ERR_FAIL                                (-((int32_t)32))

#define PMIC_ST_ERR_ESM_STARTED                         (-((int32_t)33))

#define PMIC_ST_ERR_INV_ESM_VAL                         (-((int32_t)34))

#define PMIC_ST_WARN_INV_DEVICE_ID                      (-((int32_t)35))

#define PMIC_ST_ERR_INV_EN_DRV_PIN_CFG                  (-((int32_t)36))

#define PMIC_ST_ERR_INV_COMM_MODE                       (-((int32_t)37))

#define PMIC_ST_ERR_CRC_STATUS_FAIL                     (-((int32_t)38))

#define PMIC_ST_ERR_REG_LOCKED_WR_FAIL                  (-((int32_t)39))

#define PMIC_ST_ERR_NOT_SUPPORTED                       (-((int32_t)40))

#define PMIC_ST_ERR_INV_SILICON_REVISION                (-((int32_t)41))
/* @} */

#define PMIC_DEV_LEO_TPS6594X  (0U)
#define PMIC_DEV_HERA_LP8764X  (1U)
/* @} */

#define PMIC_INTF_SINGLE_I2C   (0U)
#define PMIC_INTF_DUAL_I2C     (1U)
#define PMIC_INTF_SPI          (2U)
/* @} */

#define PMIC_I2C_STANDARD_MODE   (0U)

#define PMIC_I2C_FORCED_HS_MODE  (1U)
/* @} */

#define PMIC_MAIN_INST   (1U << 0U)
#define PMIC_QA_INST     (1U << 1U)

#define PMIC_NVM_INST    (1U << 2U)
/* @} */

#define PMIC_CFG_DEVICE_TYPE_VALID      (0U)

#define PMIC_CFG_COMM_MODE_VALID        (1U)

#define PMIC_CFG_SLAVEADDR_VALID        (2U)

#define PMIC_CFG_QASLAVEADDR_VALID      (3U)

#define PMIC_CFG_NVMSLAVEADDR_VALID     (4U)

#define PMIC_CFG_COMM_HANDLE_VALID      (5U)

#define PMIC_CFG_QACOMM_HANDLE_VALID    (6U)

#define PMIC_CFG_COMM_IO_RD_VALID       (7U)

#define PMIC_CFG_COMM_IO_WR_VALID       (8U)

#define PMIC_CFG_CRITSEC_START_VALID    (9U)

#define PMIC_CFG_CRITSEC_STOP_VALID     (10U)

#define PMIC_CFG_I2C1_SPEED_VALID       (11U)

#define PMIC_CFG_I2C2_SPEED_VALID       (12U)
/* @} */

#define PMIC_CFG_DEVICE_TYPE_VALID_SHIFT   (1U << PMIC_CFG_DEVICE_TYPE_VALID)
#define PMIC_CFG_COMM_MODE_VALID_SHIFT     (1U << PMIC_CFG_COMM_MODE_VALID)
#define PMIC_CFG_SLAVEADDR_VALID_SHIFT     (1U << PMIC_CFG_SLAVEADDR_VALID)
#define PMIC_CFG_QASLAVEADDR_VALID_SHIFT   (1U << PMIC_CFG_QASLAVEADDR_VALID)
#define PMIC_CFG_NVMSLAVEADDR_VALID_SHIFT  (1U << PMIC_CFG_NVMSLAVEADDR_VALID)
#define PMIC_CFG_COMM_HANDLE_VALID_SHIFT   (1U << PMIC_CFG_COMM_HANDLE_VALID)
#define PMIC_CFG_QACOMM_HANDLE_VALID_SHIFT (1U << PMIC_CFG_QACOMM_HANDLE_VALID)
#define PMIC_CFG_COMM_IO_RD_VALID_SHIFT    (1U << PMIC_CFG_COMM_IO_RD_VALID)
#define PMIC_CFG_COMM_IO_WR_VALID_SHIFT    (1U << PMIC_CFG_COMM_IO_WR_VALID)
#define PMIC_CFG_CRITSEC_START_VALID_SHIFT (1U << PMIC_CFG_CRITSEC_START_VALID)
#define PMIC_CFG_CRITSEC_STOP_VALID_SHIFT  (1U << PMIC_CFG_CRITSEC_STOP_VALID)
#define PMIC_CFG_I2C1_SPEED_VALID_SHIFT    (1U << PMIC_CFG_I2C1_SPEED_VALID)
#define PMIC_CFG_I2C2_SPEED_VALID_SHIFT    (1U << PMIC_CFG_I2C2_SPEED_VALID)
/* @} */

/*==========================================================================*/
/*                         Structures and Enums                             */
/*==========================================================================*/
typedef struct Pmic_CoreCfg_s {
    uint32_t     validParams;
    uint32_t     instType;
    uint8_t      pmicDeviceType;
    uint8_t      commMode;
    uint8_t      slaveAddr;
    uint8_t      qaSlaveAddr;
    uint8_t      nvmSlaveAddr;
    uint8_t      i2c1Speed;
    uint8_t      i2c2Speed;
    void        *pCommHandle;
    void        *pQACommHandle;
    int32_t (*pFnPmicCommIoRead)(struct Pmic_CoreHandle_s  *pmicCorehandle,
                                 uint8_t                    instType,
                                 uint16_t                   regAddr,
                                 uint8_t                   *pRxBuf,
                                 uint8_t                    bufLen);
    int32_t (*pFnPmicCommIoWrite)(struct Pmic_CoreHandle_s *pmicCorehandle,
                                  uint8_t                   instType,
                                  uint16_t                  regAddr,
                                  uint8_t                  *pTxBuf,
                                  uint8_t                   bufLen);
    void (*pFnPmicCritSecStart)(void);
    void (*pFnPmicCritSecStop)(void);
} Pmic_CoreCfg_t;

/*==========================================================================*/
/*                         Function Declarations                            */
/*==========================================================================*/
int32_t Pmic_init(const Pmic_CoreCfg_t *pPmicConfigData,
                  Pmic_CoreHandle_t    *pPmicCoreHandle);

int32_t Pmic_deinit(Pmic_CoreHandle_t  *pPmicCoreHandle);

#ifdef __cplusplus
}

#endif /* __cplusplus */

#endif /* PMIC_H_ */

/* @} */