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PDK API Guide for J721E
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PDK API Guide for J721E
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PMIC Low Level Driver API/interface file for WatchDog APIs.
Go to the source code of this file.
Data Structures | |
| struct | Pmic_WdgCfg_t |
| PMIC Watchdog configuration structure Note: validParams is input param for all Set and Get APIs. other params except validParams is input param for Set APIs and output param for Get APIs. More... | |
| struct | Pmic_WdgErrStatus_t |
| PMIC Watchdog error status structure Note: validParams is input param for all Get APIs. other params except validParams is output param for Get APIs. More... | |
| struct | Pmic_WdgFailCntStat_t |
| PMIC Watchdog Fail Count status structure Note: validParams is input param for all Get APIs. other params except validParams is output param for Get APIs. More... | |
Macros | |
| #define | PMIC_WDG_WAIT_CNT_MIN_VAL (30U) |
| Minimum number of iterations to wait for a Good/Bad event. More... | |
| #define | PMIC_WD_QA_INFINITE_SEQ (0xFFFFFFFFU) |
| Macro for PMIC Watchdog QA infinite sequence. More... | |
PMIC watchdog timer En/Disable Modes | |
| #define | PMIC_WDG_DISABLE (bool)false |
| #define | PMIC_WDG_ENABLE (bool)true |
PMIC watchdog timer warm reset En/Disable | |
| #define | PMIC_WDG_RESET_DISABLE (0x0U) |
| #define | PMIC_WDG_RESET_ENABLE (0x1U) |
PMIC watchdog timer Return Long Window En/Disable | |
| #define | PMIC_WDG_RETLONGWIN_DISABLE (bool)false |
| #define | PMIC_WDG_RETLONGWIN_ENABLE (bool)true |
PMIC watchdog timer Power Hold En/Disable | |
| #define | PMIC_WDG_PWRHOLD_DISABLE (0x0U) |
| #define | PMIC_WDG_PWRHOLD_ENABLE (0x1U) |
PMIC watchdog timer Trigger/QA Mode | |
| #define | PMIC_WDG_TRIGGER_MODE (0x0U) |
| #define | PMIC_WDG_QA_MODE (0x1U) |
PMIC watchdog timer Reset Threshold Configurations | |
| #define | PMIC_WDG_RESET_THRESHOLD_COUNT_0 (0x0U) |
| #define | PMIC_WDG_RESET_THRESHOLD_COUNT_1 (0x1U) |
| #define | PMIC_WDG_RESET_THRESHOLD_COUNT_2 (0x2U) |
| #define | PMIC_WDG_RESET_THRESHOLD_COUNT_3 (0x3U) |
| #define | PMIC_WDG_RESET_THRESHOLD_COUNT_4 (0x4U) |
| #define | PMIC_WDG_RESET_THRESHOLD_COUNT_5 (0x5U) |
| #define | PMIC_WDG_RESET_THRESHOLD_COUNT_6 (0x6U) |
| #define | PMIC_WDG_RESET_THRESHOLD_COUNT_7 (0x7U) |
PMIC watchdog timer Fail Threshold Configurations | |
| #define | PMIC_WDG_FAIL_THRESHOLD_COUNT_0 (0x0U) |
| #define | PMIC_WDG_FAIL_THRESHOLD_COUNT_1 (0x1U) |
| #define | PMIC_WDG_FAIL_THRESHOLD_COUNT_2 (0x2U) |
| #define | PMIC_WDG_FAIL_THRESHOLD_COUNT_3 (0x3U) |
| #define | PMIC_WDG_FAIL_THRESHOLD_COUNT_4 (0x4U) |
| #define | PMIC_WDG_FAIL_THRESHOLD_COUNT_5 (0x5U) |
| #define | PMIC_WDG_FAIL_THRESHOLD_COUNT_6 (0x6U) |
| #define | PMIC_WDG_FAIL_THRESHOLD_COUNT_7 (0x7U) |
PMIC watchdog timer QA Feedback Values | |
| #define | PMIC_WDG_QA_FEEDBACK_VALUE_0 (0x0U) |
| #define | PMIC_WDG_QA_FEEDBACK_VALUE_1 (0x1U) |
| #define | PMIC_WDG_QA_FEEDBACK_VALUE_2 (0x2U) |
| #define | PMIC_WDG_QA_FEEDBACK_VALUE_3 (0x3U) |
PMIC watchdog timer QA LFSR Values | |
| #define | PMIC_WDG_QA_LFSR_VALUE_0 (0x0U) |
| #define | PMIC_WDG_QA_LFSR_VALUE_1 (0x1U) |
| #define | PMIC_WDG_QA_LFSR_VALUE_2 (0x2U) |
| #define | PMIC_WDG_QA_LFSR_VALUE_3 (0x3U) |
PMIC watchdog timer QA Question Seed Values | |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_0 (0x0U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_1 (0x1U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_2 (0x2U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_3 (0x3U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_4 (0x4U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_5 (0x5U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_6 (0x6U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_7 (0x7U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_8 (0x8U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_9 (0x9U) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_10 (0xAU) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_11 (0xBU) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_12 (0xCU) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_13 (0xDU) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_14 (0xEU) |
| #define | PMIC_WDG_QA_QUES_SEED_VALUE_15 (0xFU) |
PMIC watchdog timer Config Structure Param Bit positions | |
| #define | PMIC_CFG_WDG_LONGWINDURATION_VALID (0U) |
| validParams value used to set/get Long Window duration More... | |
| #define | PMIC_CFG_WDG_WIN1DURATION_VALID (1U) |
| validParams value used to set/get Window-1 duration More... | |
| #define | PMIC_CFG_WDG_WIN2DURATION_VALID (2U) |
| validParams value used to set/get Window-2 duration More... | |
| #define | PMIC_CFG_WDG_FAILTHRESHOLD_VALID (3U) |
| validParams value used to set/get Fail threshold value More... | |
| #define | PMIC_CFG_WDG_RSTTHRESHOLD_VALID (4U) |
| validParams value used to set/get Reset threshold Value More... | |
| #define | PMIC_CFG_WDG_RSTENABLE_VALID (5U) |
| validParams value used to set/get to enable or diable warm reset on fail More... | |
| #define | PMIC_CFG_WDG_WDGMODE_VALID (6U) |
| validParams value used to set/get watchdog mode More... | |
| #define | PMIC_CFG_WDG_PWRHOLD_VALID (7U) |
| validParams value used to set/get to Enable or disable watchdog pwrHold More... | |
| #define | PMIC_CFG_WDG_RETLONGWIN_VALID (8U) |
| validParams value used to set/get to enable or disable return to long window More... | |
| #define | PMIC_CFG_WDG_QA_FDBK_VALID (9U) |
| validParams value used to set/get QA feed back value More... | |
| #define | PMIC_CFG_WDG_QA_LFSR_VALID (10U) |
| validParams value used to set/get QA LFSR value More... | |
| #define | PMIC_CFG_WDG_QA_QUES_SEED_VALID (11U) |
| validParams value used to set/get QA question seed value More... | |
PMIC WatchDog Config Structure Params Bit shift values | |
Application can use below shifted values to set the validParam structure member defined in Pmic_WdgCfg_t structure | |
| #define | PMIC_CFG_WDG_LONGWINDURATION_VALID_SHIFT (1U << PMIC_CFG_WDG_LONGWINDURATION_VALID) |
| #define | PMIC_CFG_WDG_WIN1DURATION_VALID_SHIFT (1U << PMIC_CFG_WDG_WIN1DURATION_VALID) |
| #define | PMIC_CFG_WDG_WIN2DURATION_VALID_SHIFT (1U << PMIC_CFG_WDG_WIN2DURATION_VALID) |
| #define | PMIC_CFG_WDG_FAILTHRESHOLD_VALID_SHIFT (1U << PMIC_CFG_WDG_FAILTHRESHOLD_VALID) |
| #define | PMIC_CFG_WDG_RSTTHRESHOLD_VALID_SHIFT (1U << PMIC_CFG_WDG_RSTTHRESHOLD_VALID) |
| #define | PMIC_CFG_WDG_RSTENABLE_VALID_SHIFT (1U << PMIC_CFG_WDG_RSTENABLE_VALID) |
| #define | PMIC_CFG_WDG_WDGMODE_VALID_SHIFT (1U << PMIC_CFG_WDG_WDGMODE_VALID) |
| #define | PMIC_CFG_WDG_PWRHOLD_VALID_SHIFT (1U << PMIC_CFG_WDG_PWRHOLD_VALID) |
| #define | PMIC_CFG_WDG_RETLONGWIN_VALID_SHIFT (1U << PMIC_CFG_WDG_RETLONGWIN_VALID) |
| #define | PMIC_CFG_WDG_QA_FDBK_VALID_SHIFT (1U << PMIC_CFG_WDG_QA_FDBK_VALID) |
| #define | PMIC_CFG_WDG_QA_LFSR_VALID_SHIFT (1U << PMIC_CFG_WDG_QA_LFSR_VALID) |
| #define | PMIC_CFG_WDG_QA_QUES_SEED_VALID_SHIFT (1U << PMIC_CFG_WDG_QA_QUES_SEED_VALID) |
PMIC watchdog timer error status Structure Param Bit positions. | |
| #define | PMIC_CFG_WD_LONGWIN_TIMEOUT_ERRSTAT_VALID (0U) |
| validParams value used to get Long Window timeout error status More... | |
| #define | PMIC_CFG_WD_TIMEOUT_ERRSTAT_VALID (1U) |
| validParams value used to get Window1 and window2 timeout error status More... | |
| #define | PMIC_CFG_WD_TRIG_EARLY_ERRSTAT_VALID (2U) |
| validParams value used to get Watchdog trigger mode error status More... | |
| #define | PMIC_CFG_WD_ANSW_EARLY_ERRSTAT_VALID (3U) |
| validParams value used to get Watchdog early answer error status More... | |
| #define | PMIC_CFG_WD_SEQ_ERR_ERRSTAT_VALID (4U) |
| validParams value used to get Watchdog QA sequence error status More... | |
| #define | PMIC_CFG_WD_ANSW_ERR_ERRSTAT_VALID (5U) |
| validParams value used to get Watchdog QA wrong Answer error status More... | |
| #define | PMIC_CFG_WD_FAIL_INT_ERRSTAT_VALID (6U) |
| validParams value used to get Watchdog fail error status More... | |
| #define | PMIC_CFG_WD_RST_INT_ERRSTAT_VALID (7U) |
| validParams value used to get Watchdog reset error status More... | |
PMIC watchdog Fail count status Structure Param Bit positions. | |
| #define | PMIC_CFG_WD_BAD_EVENT_STAT_VALID (0U) |
| validParams value used to get status of Bad Event is detected or not More... | |
| #define | PMIC_CFG_WD_GOOD_EVENT_STAT_VALID (1U) |
| validParams value used to get status of Good Event is detected or not More... | |
| #define | PMIC_CFG_WD_FAIL_CNT_VAL_VALID (2U) |
| validParams value used to get To get Watchdog Fail Count value More... | |
PMIC WatchDog Error status Structure Params Bit shift values | |
Application can use below shifted values to set the validParams structure member defined in Pmic_WdgErrStatus_t structure | |
| #define | PMIC_CFG_WD_LONGWIN_TIMEOUT_ERRSTAT_VALID_SHIFT (1U << PMIC_CFG_WD_LONGWIN_TIMEOUT_ERRSTAT_VALID) |
| #define | PMIC_CFG_WD_TIMEOUT_ERRSTAT_VALID_SHIFT (1U << PMIC_CFG_WD_TIMEOUT_ERRSTAT_VALID) |
| #define | PMIC_CFG_WD_TRIG_EARLY_ERRSTAT_VALID_SHIFT (1U << PMIC_CFG_WD_TRIG_EARLY_ERRSTAT_VALID) |
| #define | PMIC_CFG_WD_ANSW_EARLY_ERRSTAT_VALID_SHIFT (1U << PMIC_CFG_WD_ANSW_EARLY_ERRSTAT_VALID) |
| #define | PMIC_CFG_WD_SEQ_ERR_ERRSTAT_VALID_SHIFT (1U << PMIC_CFG_WD_SEQ_ERR_ERRSTAT_VALID) |
| #define | PMIC_CFG_WD_ANSW_ERR_ERRSTAT_VALID_SHIFT (1U << PMIC_CFG_WD_ANSW_ERR_ERRSTAT_VALID) |
| #define | PMIC_CFG_WD_FAIL_INT_ERRSTAT_VALID_SHIFT (1U << PMIC_CFG_WD_FAIL_INT_ERRSTAT_VALID) |
| #define | PMIC_CFG_WD_RST_INT_ERRSTAT_VALID_SHIFT (1U << PMIC_CFG_WD_RST_INT_ERRSTAT_VALID) |
PMIC WatchDog Fail count status Structure Params Bit shift values | |
Application can use below shifted values to set the validParams structure member defined in Pmic_WdgErrStatus_t structure | |
| #define | PMIC_CFG_WD_BAD_EVENT_STAT_VALID_SHIFT (1U << PMIC_CFG_WD_BAD_EVENT_STAT_VALID) |
| #define | PMIC_CFG_WD_GOOD_EVENT_STAT_VALID_SHIFT (1U << PMIC_CFG_WD_GOOD_EVENT_STAT_VALID) |
| #define | PMIC_CFG_WD_FAIL_CNT_VAL_VALID_SHIFT (1U << PMIC_CFG_WD_FAIL_CNT_VAL_VALID) |
PMIC WDG Error TYPE | |
| #define | PMIC_WDG_ERR_LONG_WIN_TIMEOUT (0x0U) |
| #define | PMIC_WDG_ERR_TIMEOUT (0x1U) |
| #define | PMIC_WDG_ERR_TRIGGER_EARLY (0x2U) |
| #define | PMIC_WDG_ERR_ANSWER_EARLY (0x3U) |
| #define | PMIC_WDG_ERR_SEQ_ERR (0x4U) |
| #define | PMIC_WDG_ERR_ANS_ERR (0x5U) |
| #define | PMIC_WDG_ERR_FAIL_INT (0x6U) |
| #define | PMIC_WDG_ERR_RST_INT (0x7U) |
| #define | PMIC_WDG_ERR_ALL (0x8U) |
Functions | |
| int32_t | Pmic_wdgEnable (Pmic_CoreHandle_t *pPmicCoreHandle) |
| API to Enable Watchdog timer. More... | |
| int32_t | Pmic_wdgDisable (Pmic_CoreHandle_t *pPmicCoreHandle) |
| API to Disable Watchdog timer. More... | |
| int32_t | Pmic_wdgSetCfg (Pmic_CoreHandle_t *pPmicCoreHandle, const Pmic_WdgCfg_t wdgCfg) |
| API to set PMIC watchdog configurations. More... | |
| int32_t | Pmic_wdgGetCfg (Pmic_CoreHandle_t *pPmicCoreHandle, Pmic_WdgCfg_t *pWdgCfg) |
| API to get PMIC watchdog configurations. More... | |
| int32_t | Pmic_wdgStartQaSequence (Pmic_CoreHandle_t *pPmicCoreHandle, uint32_t num_of_sequences, uint32_t maxCnt) |
| API to Start watchdog QA mode. More... | |
| int32_t | Pmic_wdgGetErrorStatus (Pmic_CoreHandle_t *pPmicCoreHandle, Pmic_WdgErrStatus_t *pErrStatus) |
| API to get PMIC watchdog error status. More... | |
| int32_t | Pmic_wdgGetFailCntStat (Pmic_CoreHandle_t *pPmicCoreHandle, Pmic_WdgFailCntStat_t *pFailCount) |
| API to get PMIC watchdog fail count status. More... | |
| int32_t | Pmic_wdgStartTriggerSequence (Pmic_CoreHandle_t *pPmicCoreHandle) |
| API to Start watchdog Trigger mode. More... | |
| int32_t | Pmic_wdgClrErrStatus (Pmic_CoreHandle_t *pPmicCoreHandle, const uint8_t wdgErrType) |
| API to clear PMIC watchdog error status. More... | |
| int32_t | Pmic_wdgQaSequenceWriteAnswer (Pmic_CoreHandle_t *pPmicCoreHandle) |
| API to Write Answers in Long Window/ Window1/ Window2 Interval for watchdog QA Sequence. More... | |
1.8.15