PDK API Guide for J721E
CSL_CPSW_FLOWCNTL Struct Reference

Detailed Description

Holds flow control register contents.

Data Fields

Uint32 p0FlowEnable
 
Uint32 p1FlowEnable
 
Uint32 p2FlowEnable
 
Uint32 p3FlowEnable
 
Uint32 p4FlowEnable
 
Uint32 p5FlowEnable
 
Uint32 p6FlowEnable
 
Uint32 p7FlowEnable
 
Uint32 p8FlowEnable
 

Field Documentation

◆ p0FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p0FlowEnable

Port 0 flow control enable

◆ p1FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p1FlowEnable

Port 1 flow control enable

◆ p2FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p2FlowEnable

Port 2 flow control enable

◆ p3FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p3FlowEnable

Port 3 flow control enable

◆ p4FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p4FlowEnable

Port 4 flow control enable

◆ p5FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p5FlowEnable

Port 5 flow control enable

◆ p6FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p6FlowEnable

Port 6 flow control enable

◆ p7FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p7FlowEnable

Port 7 flow control enable

◆ p8FlowEnable

Uint32 CSL_CPSW_FLOWCNTL::p8FlowEnable

Port 8 flow control enable