PDK API Guide for J721E
CSL_CsitxDMAConfig Struct Reference

Detailed Description

Structure for PSI-L/DMA configuration for CSI Tx SS.

Data Fields

uint32_t chNum
 
uint32_t vc
 
uint32_t dt
 
uint32_t pck12CfgEnable
 
uint32_t dataSizeShift
 
uint32_t yuv422Mode
 
uint32_t numBytesLine
 
uint32_t l2lDelay
 

Field Documentation

◆ chNum

uint32_t CSL_CsitxDMAConfig::chNum

PSI-L thread ID: Range:[0:(CSL_CSITX_PSI_L_THREAD_NUM_MAX - 1)]

◆ vc

uint32_t CSL_CsitxDMAConfig::vc

CSI virtual channel index

◆ dt

uint32_t CSL_CsitxDMAConfig::dt

CSI data type index

◆ pck12CfgEnable

uint32_t CSL_CsitxDMAConfig::pck12CfgEnable

12-bit packing enable 1: enable 0: otherwise

◆ dataSizeShift

uint32_t CSL_CsitxDMAConfig::dataSizeShift

Data size shift when unpacking Refer to CSITX_DMADataSizeShift

◆ yuv422Mode

uint32_t CSL_CsitxDMAConfig::yuv422Mode

YUV422 Mode Refer to CSITX_YUV422Mode

◆ numBytesLine

uint32_t CSL_CsitxDMAConfig::numBytesLine

Number of bytes in a line.

◆ l2lDelay

uint32_t CSL_CsitxDMAConfig::l2lDelay

Delay in main clock cycles from start of one line to start of another line.