Detailed Description

OSPI IP V0 Hardware attributes.

Data Fields
uint32_t	instNum

uintptr_t	baseAddr

uintptr_t	dataAddr

uint32_t	phyOpMode

uint32_t	phyLockCycle

uint32_t	funcClk

uint32_t	intrNum

uint32_t	eventId

OSPI_OperMode	operMode

uint32_t	chipSelect

CSL_OspiClkMode	frmFmt

uint32_t	devDelays [4]

uint32_t	pageSize

uint32_t	blkSize

OSPI_xferLines	xferLines

bool	intrEnable

bool	dacEnable

bool	dmaEnable

OSPI_dmaInfo *	dmaInfo

bool	phyEnable

uint32_t	rdDataCapDelay

bool	dtrEnable

bool	xipEnable

uint32_t	csSotDelay

uint32_t	baudRateDiv

bool	cacheEnable

Field Documentation

◆ instNum

uint32_t OSPI_v0_HwAttrs::instNum

OSPI IP V0 Peripheral instance number

◆ baseAddr

uintptr_t OSPI_v0_HwAttrs::baseAddr

OSPI IP V0 Peripheral base address.

◆ dataAddr

uintptr_t OSPI_v0_HwAttrs::dataAddr

OSPI Data base address OSPI PHY dll in master mode/bypass mode

◆ phyOpMode

uint32_t OSPI_v0_HwAttrs::phyOpMode

OSPI PHY dll full/half cycle lock

◆ phyLockCycle

uint32_t OSPI_v0_HwAttrs::phyLockCycle

◆ funcClk

uint32_t OSPI_v0_HwAttrs::funcClk

OSPI IP V0 functional clock

◆ intrNum

uint32_t OSPI_v0_HwAttrs::intrNum

OSPI IP V0 Peripheral CorePac interrupt vector

◆ eventId

uint32_t OSPI_v0_HwAttrs::eventId

OSPI IP V0 Peripheral CorePac intc event ID

◆ operMode

OSPI_OperMode OSPI_v0_HwAttrs::operMode

OSPI controller mode

◆ chipSelect

uint32_t OSPI_v0_HwAttrs::chipSelect

OSPI chip select number

◆ frmFmt

CSL_OspiClkMode OSPI_v0_HwAttrs::frmFmt

OSPI frame format

◆ devDelays

uint32_t OSPI_v0_HwAttrs::devDelays[4]

OSPI device delays (CSSOT, CSEOT, CSDADS and CSDA delays)

◆ pageSize

uint32_t OSPI_v0_HwAttrs::pageSize

OSPI device page size in bytes

◆ blkSize

uint32_t OSPI_v0_HwAttrs::blkSize

OSPI device block size is 2 ^ blkSize (bytes)

◆ xferLines

OSPI_xferLines OSPI_v0_HwAttrs::xferLines

Number of lines used for OSPI reading/writing

◆ intrEnable

bool OSPI_v0_HwAttrs::intrEnable

Enable interrupts.

◆ dacEnable

bool OSPI_v0_HwAttrs::dacEnable

Direct Access Controller Enable

◆ dmaEnable

bool OSPI_v0_HwAttrs::dmaEnable

Enable DMA

◆ dmaInfo

OSPI_dmaInfo* OSPI_v0_HwAttrs::dmaInfo

UDMA configuration info

◆ phyEnable

bool OSPI_v0_HwAttrs::phyEnable

Enable PHY

◆ rdDataCapDelay

uint32_t OSPI_v0_HwAttrs::rdDataCapDelay

Read data capture delay in # of ref_clk cycles

◆ dtrEnable

bool OSPI_v0_HwAttrs::dtrEnable

Enable DTR protocol

◆ xipEnable

bool OSPI_v0_HwAttrs::xipEnable

XIP Enable

◆ csSotDelay

uint32_t OSPI_v0_HwAttrs::csSotDelay

Chip Select Start of Transfer delay in # of ref_clk cycles

◆ baudRateDiv

uint32_t OSPI_v0_HwAttrs::baudRateDiv

Master mode baud rate divisor value

◆ cacheEnable

bool OSPI_v0_HwAttrs::cacheEnable

Enable Cache