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SDL API Guide for J721E
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Typedefs | |
| typedef uint32_t | SDL_Ecc_AggrIntrSrc |
| This enumerator defines the types of possible ECC errors. More... | |
| typedef uint8_t | SDL_ecc_aggrValid |
| This defines the valid ecc aggr error configuration. More... | |
| typedef uint32_t | SDL_Ecc_injectPattern |
| This enumerator defines the types of ECC patterns. More... | |
| typedef uint32_t | SDL_Ecc_AggrEDCErrorSubType |
| This enumerator defines the types of possible EDC errors. More... | |
| #define SDL_ECC_AGGR_INTR_SRC_NONE ((uint32_t) 0U) |
No interrupt
| #define SDL_ECC_AGGR_INTR_SRC_SINGLE_BIT ((uint32_t) 1U) |
Single-bit Error Correcting (SEC)
| #define SDL_ECC_AGGR_INTR_SRC_DOUBLE_BIT ((uint32_t) 2U) |
Double-bit Error Detection (DED)
| #define SDL_ECC_ADDR_ERROR_TYPE_SUCCESSIVE_SINGLE_BITS ((uint32_t) 3U) |
Two or more successive SEC errors
| #define SDL_ECC_AGGR_INTR_SRC_INVALID ((uint32_t) 4U) |
Denotes an invalid interrupt source
| #define SDL_ECC_AGGR_SELECT_ERR_CTRL1 (0U) |
This defines the types of possible ECC error controller instances.
| #define SDL_ECC_AGGR_SELECT_ERR_CTRL2 (1U) |
Error controller instance 1
| #define SDL_ECC_AGGR_MAX_NUM_RAM_ERR_CTRL (2U) |
Error Controller instance 2
| #define SDL_ECC_AGGR_SELECT_ERR_STAT1 (0U) |
This defines the types of possible ECC error status instances.
Maximum number of RAM Error Controller registers
| #define SDL_ECC_AGGR_SELECT_ERR_STAT2 (1U) |
Error Status instance 1
| #define SDL_ECC_AGGR_SELECT_ERR_STAT3 (2U) |
Error Status instance 2
| #define SDL_ECC_AGGR_MAX_NUM_RAM_ERR_STAT (3U) |
Error Status instance 3
| #define SDL_ECC_AGGR_NUM_ENABLE_REGISTERS (8U) |
This defines the number of enable registers.
Maximum number of RAM Error Status registers
| #define SDL_ECC_AGGR_VALID_TIMEOUT_ERR (1U) |
| #define SDL_ECC_AGGR_VALID_PARITY_ERR (2U) |
Valid Timeout Error parameter
| #define SDL_ECC_AGGR_INJECT_PATTERN_ZERO ((uint32_t) 0U) |
Zero inject pattern
| #define SDL_ECC_AGGR_INJECT_PATTERN_F ((uint32_t) 1U) |
Inject pattern 0xF
| #define SDL_ECC_AGGR_INJECT_PATTERN_A ((uint32_t) 2U) |
Inject pattern 0xA
| #define SDL_ECC_AGGR_INJECT_PATTERN_5 ((uint32_t) 3U) |
Inject pattern 0x5
| #define SDL_ECC_EGGR_INJECT_PATTERN_MAX (SDL_ECC_AGGR_INJECT_PATTERN_A) |
| #define SDL_ECC_AGGR_ERROR_SUBTYPE_NORMAL ((uint32_t) 0U) |
Normal errors
| #define SDL_ECC_AGGR_ERROR_SUBTYPE_INJECT ((uint32_t) 1U) |
Inject errors
| typedef uint32_t SDL_Ecc_AggrIntrSrc |
This enumerator defines the types of possible ECC errors.
Design: PROC_SDL-1272
| typedef uint8_t SDL_ecc_aggrValid |
This defines the valid ecc aggr error configuration.
| typedef uint32_t SDL_Ecc_injectPattern |
This enumerator defines the types of ECC patterns.
Valid Timeout Error parameterDesign: PROC_SDL-1273
| typedef uint32_t SDL_Ecc_AggrEDCErrorSubType |
This enumerator defines the types of possible EDC errors.
Design: PROC_SDL-1274