Introduction

===========================================================================

Typedefs
typedef uint8_t	SDL_VTM_configVdCtrl
	This enumerator define for VTM VD configuration valid map. More...

typedef uint8_t	SDL_VTM_configTsCtrl
	This enumerator define for VTM TS configuration valid map. More...

typedef uint8_t	SDL_VTM_vid_opp
	This enumerator defines the possible VID Codes to set various voltage domain supply voltages. More...

typedef uint8_t	SDL_VTM_ts_stat_vd_map
	This enumerator defines the core voltage domain mapping of VTM VD. More...

typedef uint16_t	SDL_VTM_intrCtrl
	This enumerator define for VTM Voltage domain threshold interrupt control. More...

typedef uint16_t	SDL_VTM_vdEvtSel_set
	This enumerator define for VTM Voltage domain Event selection set. More...

typedef uint32_t	SDL_VTM_tsGlobal_ctrl_valid_map
	This enumerator defines for VTM Temperature sensor id control update valid maps. This controls the selective update of the fields in the temperature sensor control field. More...

typedef uint8_t	SDL_VTM_tsGlobal_clkSel
	This enumerator define for VTM Temperature sensor global control Clock select options. More...

typedef uint8_t	SDL_VTM_tsGlobal_clkDiv
	This enumerator define for VTM Temperature sensor global control Clock divide options. More...

typedef uint8_t	SDL_VTM_tsGlobal_any_maxt_outrg_alert_en
	This enumerator define for VTM Temperature sensor global control any max temperature alert enable control. More...

typedef uint16_t	SDL_VTM_tsGlobal_samples_per_count
	This enumerator define for VTM Temperature sensor global control samples per count. More...

typedef uint8_t	SDL_VTM_tsCtrl_valid_map
	This enumerator define for VTM Temperature sensor control valid map. More...

typedef uint8_t	SDL_VTM_tsCtrl_max_outrg_alert
	This enumerator define for VTM temperature sensor band gap maximum temperature out of range alert control. More...

typedef uint8_t	SDL_VTM_tsCtrl_resetCtrl
	This enumerator define for VTM temperature sensor band gap reset control bits. More...

typedef uint8_t	SDL_VTM_tsCtrl_mode
	This enumerator define for VTM temperature sensor mode control bits. More...

typedef uint8_t	SDL_VTM_tsCtrl_singleshot_conv_stat
	This enumerator define for VTM temperature sensor band gap single shot mode start of conversion trigger. More...

typedef uint8_t	SDL_VTM_thr_valid_map
	This enumerator define for VTM Temperature Sensor thresholds valid bit map. More...

typedef uint8_t	SDL_VTM_Stat_read_ctrl
	This enumerator define for VTM temperature sensor STAT read valid map. More...

typedef int16_t	SDL_VTM_adc_code
	This enumerator define for VTM temperature sensor ADC code This is the data_out value of the temperature sensor stat register. More...

typedef uint8_t	SDL_VTM_vdEvt_status
	This enumerator define for VTM Voltage domain event status. More...

Macros
#define	SDL_VTM_VD_CONFIG_CTRL_VID_OPP (1U)

#define	SDL_VTM_VD_CONFIG_CTRL_EVT_SEL (2U)

#define	SDL_VTM_VD_CONFIG_CTRL_GLB_CFG (4U)

#define	SDL_VTM_VD_CONFIG_CTRL_SET_CTL (1U)

#define	SDL_VTM_VD_CONFIG_CTRL_OUTRNG_ALRT (2U)

#define	SDL_VTM_VD_CONFIG_CTRL_SET_THR (4U)

#define	SDL_VTM_VID_OPP_MAX_NUM ((uint8_t) 4U)

#define	SDL_VTM_VID_OPP_3_CODE ((uint8_t) 3U)

#define	SDL_VTM_VID_OPP_2_CODE ((uint8_t) 2U)

#define	SDL_VTM_VID_OPP_1_CODE ((uint8_t) 1U)

#define	SDL_VTM_VID_OPP_0_CODE ((uint8_t) 0U)

#define	SDL_VTM_TS_STAT_VD_MAP_RTC ((uint32) 0U)

#define	SDL_VTM_TS_STAT_VD_MAP_WKUP ((uint32) 1U)

#define	SDL_VTM_TS_STAT_VD_MAP_MCU ((uint32) 2U)

#define	SDL_VTM_TS_STAT_VD_MAP_CORE ((uint32) 3U)

#define	SDL_VTM_TSTAT_VD_MAP_NOT_IMPLEMENTED ((uint32) 15U)

#define	SDL_VTM_VD_LT_THR0_INTR_RAW_SET (1u)

#define	SDL_VTM_VD_GT_THR1_INTR_RAW_SET (2u)

#define	SDL_VTM_VD_GT_THR2_INTR_RAW_SET (4u)

#define	SDL_VTM_VD_LT_THR0_INTR_RAW_CLR (8u)

#define	SDL_VTM_VD_GT_THR1_INTR_RAW_CLR (16u)

#define	SDL_VTM_VD_GT_THR2_INTR_RAW_CLR (32u)

#define	SDL_VTM_VD_LT_THR0_INTR_EN_SET (64u)

#define	SDL_VTM_VD_GT_THR1_INTR_EN_SET (128u)

#define	SDL_VTM_VD_GT_THR2_INTR_EN_SET (256u)

#define	SDL_VTM_VD_LT_THR0_INTR_EN_CLR (512u)

#define	SDL_VTM_VD_GT_THR1_INTR_EN_CLR (1024u)

#define	SDL_VTM_VD_GT_THR2_INTR_EN_CLR (2048u)

#define	SDL_VTM_VD_INTR_INVALID

#define	SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_0 (1u)

#define	SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_1 (2u)

#define	SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_2 (4u)

#define	SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_3 (8u)

#define	SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_4 (16u)

#define	SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_5 (32u)

#define	SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_6 (64u)

#define	SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_7 (128u)

#define	SDL_VTM_TSGLOBAL_CLK_SEL_VALID (1u)

#define	SDL_VTM_TSGLOBAL_CLK_DIV_VALID (2u)

#define	SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_EN_VALID (4u)

#define	SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR0_VALID (8u)

#define	SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR_VALID (16u)

#define	SDL_VTM_TSGLOBAL_SAMPLES_PER_CNT_VALID (32u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF_CLK (1u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF2_CLK (2u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_1 (0u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_2 (1u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_3 (2u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_4 (3u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_5 (4u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_6 (5u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_7 (6u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_8 (7u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_9 (8u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_10 (9u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_11 (10u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_12 (11u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_13 (12u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_14 (13u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_15 (14u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_16 (15u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_17 (16u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_18 (17u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_19 (18u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_20 (19u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_21 (20u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_22 (21u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_23 (22u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_24 (23u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_25 (24u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_26 (25u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_27 (26u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_28 (27u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_29 (28u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_30 (29u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_31 (30u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_32 (31u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_33 (32u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_34 (33u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_35 (34u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_36 (35u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_37 (36u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_38 (37u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_39 (38u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_40 (39u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_41 (40u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_42 (41u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_43 (42u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_44 (43u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_45 (44u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_46 (45u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_47 (46u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_48 (47u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_49 (48u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_50 (49u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_51 (50u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_52 (51u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_53 (52u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_54 (53u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_55 (54u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_56 (55u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_57 (56u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_58 (57u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_59 (58u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_60 (59u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_61 (60u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_62 (61u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_63 (62u)

#define	SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_64 (63u)

#define	SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_ENABLE (1u)

#define	SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_DISABLE (0u)

#define	SDL_VTM_TS_CTRL_MAXT_OUTG_ALERT_VALID (1u)

#define	SDL_VTM_TS_CTRL_RESET_CTRL_VALID (2u)

#define	SDL_VTM_TS_CTRL_SOC_VALID (4u)

#define	SDL_VTM_TS_CTRL_MODE_VALID (8u)

#define	SDL_VTM_TS_CTRL_MAXT_OUTRG_GEN_ALERT (1u)

#define	SDL_VTM_TS_CTRL_MAXT_OUTRG_NO_ALERT (0u)

#define	SDL_VTM_TS_CTRL_SENSOR_RESET (0u)

#define	SDL_VTM_TS_CTRL_SENSOR_NORM_OP (1u)

#define	SDL_VTM_TS_CTRL_SINGLESHOT_MODE (0u)

#define	SDL_VTM_TS_CTRL_CONTINUOUS_MODE (1u)

#define	SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_IN_PROGRESS (1u)

#define	SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_COMPLETE (0u)

#define	SDL_VTM_GT_TH1_VALID (1u)

#define	SDL_VTM_GT_TH2_VALID (2u)

#define	SDL_VTM_LT_TH0_VALID (4u)

#define	SDL_VTM_TS_READ_VD_MAP_VAL (1U)

#define	SDL_VTM_TS_READ_ALL_THRESHOLD_ALERTS (2U)

#define	SDL_VTM_TS_READ_FIRST_TIME_EOC_BIT (4U)

#define	SDL_VTM_TS_READ_DATA_VALID_BIT (8U)

#define	SDL_VTM_TS_READ_DATA_OUT_VAL (16U)

#define	SDL_VTM_VD_EVT_STAT_THR_ALERTS_MASK (7u)

#define	SDL_VTM_VD_EVT_STAT_LT_TH0_ALERT (4u)

#define	SDL_VTM_VD_EVT_STAT_GT_TH1_ALERT (1u)

#define	SDL_VTM_VD_EVT_STAT_GT_TH2_ALERT (2u)

Macro Definition Documentation

◆ SDL_VTM_VD_CONFIG_CTRL_VID_OPP

#define SDL_VTM_VD_CONFIG_CTRL_VID_OPP (1U)

◆ SDL_VTM_VD_CONFIG_CTRL_EVT_SEL

#define SDL_VTM_VD_CONFIG_CTRL_EVT_SEL (2U)

◆ SDL_VTM_VD_CONFIG_CTRL_GLB_CFG

#define SDL_VTM_VD_CONFIG_CTRL_GLB_CFG (4U)

◆ SDL_VTM_VD_CONFIG_CTRL_SET_CTL

#define SDL_VTM_VD_CONFIG_CTRL_SET_CTL (1U)

◆ SDL_VTM_VD_CONFIG_CTRL_OUTRNG_ALRT

#define SDL_VTM_VD_CONFIG_CTRL_OUTRNG_ALRT (2U)

◆ SDL_VTM_VD_CONFIG_CTRL_SET_THR

#define SDL_VTM_VD_CONFIG_CTRL_SET_THR (4U)

◆ SDL_VTM_VID_OPP_MAX_NUM

#define SDL_VTM_VID_OPP_MAX_NUM ((uint8_t) 4U)

Maximum number of OPP VID Codes

◆ SDL_VTM_VID_OPP_3_CODE

#define SDL_VTM_VID_OPP_3_CODE ((uint8_t) 3U)

VID OPP3 Code

◆ SDL_VTM_VID_OPP_2_CODE

#define SDL_VTM_VID_OPP_2_CODE ((uint8_t) 2U)

VID OPP2 Code

◆ SDL_VTM_VID_OPP_1_CODE

#define SDL_VTM_VID_OPP_1_CODE ((uint8_t) 1U)

VID OPP1 Code

◆ SDL_VTM_VID_OPP_0_CODE

#define SDL_VTM_VID_OPP_0_CODE ((uint8_t) 0U)

VID OPP0 Code

◆ SDL_VTM_TS_STAT_VD_MAP_RTC

#define SDL_VTM_TS_STAT_VD_MAP_RTC ((uint32) 0U)

RTC Voltage Domain map

◆ SDL_VTM_TS_STAT_VD_MAP_WKUP

#define SDL_VTM_TS_STAT_VD_MAP_WKUP ((uint32) 1U)

WKUP Voltage Domain map

◆ SDL_VTM_TS_STAT_VD_MAP_MCU

#define SDL_VTM_TS_STAT_VD_MAP_MCU ((uint32) 2U)

MCU Voltage Domain map

◆ SDL_VTM_TS_STAT_VD_MAP_CORE

#define SDL_VTM_TS_STAT_VD_MAP_CORE ((uint32) 3U)

Core Voltage Domain map

◆ SDL_VTM_TSTAT_VD_MAP_NOT_IMPLEMENTED

#define SDL_VTM_TSTAT_VD_MAP_NOT_IMPLEMENTED ((uint32) 15U)

Voltage Domain map not implemented

◆ SDL_VTM_VD_LT_THR0_INTR_RAW_SET

#define SDL_VTM_VD_LT_THR0_INTR_RAW_SET (1u)

◆ SDL_VTM_VD_GT_THR1_INTR_RAW_SET

#define SDL_VTM_VD_GT_THR1_INTR_RAW_SET (2u)

◆ SDL_VTM_VD_GT_THR2_INTR_RAW_SET

#define SDL_VTM_VD_GT_THR2_INTR_RAW_SET (4u)

◆ SDL_VTM_VD_LT_THR0_INTR_RAW_CLR

#define SDL_VTM_VD_LT_THR0_INTR_RAW_CLR (8u)

◆ SDL_VTM_VD_GT_THR1_INTR_RAW_CLR

#define SDL_VTM_VD_GT_THR1_INTR_RAW_CLR (16u)

◆ SDL_VTM_VD_GT_THR2_INTR_RAW_CLR

#define SDL_VTM_VD_GT_THR2_INTR_RAW_CLR (32u)

◆ SDL_VTM_VD_LT_THR0_INTR_EN_SET

#define SDL_VTM_VD_LT_THR0_INTR_EN_SET (64u)

◆ SDL_VTM_VD_GT_THR1_INTR_EN_SET

#define SDL_VTM_VD_GT_THR1_INTR_EN_SET (128u)

◆ SDL_VTM_VD_GT_THR2_INTR_EN_SET

#define SDL_VTM_VD_GT_THR2_INTR_EN_SET (256u)

◆ SDL_VTM_VD_LT_THR0_INTR_EN_CLR

#define SDL_VTM_VD_LT_THR0_INTR_EN_CLR (512u)

◆ SDL_VTM_VD_GT_THR1_INTR_EN_CLR

#define SDL_VTM_VD_GT_THR1_INTR_EN_CLR (1024u)

◆ SDL_VTM_VD_GT_THR2_INTR_EN_CLR

#define SDL_VTM_VD_GT_THR2_INTR_EN_CLR (2048u)

◆ SDL_VTM_VD_INTR_INVALID

#define SDL_VTM_VD_INTR_INVALID

Value:

(SDL_VTM_VD_LT_THR0_INTR_RAW_SET | \

SDL_VTM_VD_LT_THR0_INTR_RAW_CLR)

SDL_VTM_VD_LT_THR0_INTR_RAW_SET

#define SDL_VTM_VD_LT_THR0_INTR_RAW_SET

Definition: sdl_ip_vtm.h:130

◆ SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_0

#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_0 (1u)

◆ SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_1

#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_1 (2u)

◆ SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_2

#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_2 (4u)

◆ SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_3

#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_3 (8u)

◆ SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_4

#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_4 (16u)

◆ SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_5

#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_5 (32u)

◆ SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_6

#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_6 (64u)

◆ SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_7

#define SDL_VTM_VD_EVT_SELECT_TEMP_SENSOR_7 (128u)

◆ SDL_VTM_TSGLOBAL_CLK_SEL_VALID

#define SDL_VTM_TSGLOBAL_CLK_SEL_VALID (1u)

◆ SDL_VTM_TSGLOBAL_CLK_DIV_VALID

#define SDL_VTM_TSGLOBAL_CLK_DIV_VALID (2u)

◆ SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_EN_VALID

#define SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_EN_VALID (4u)

◆ SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR0_VALID

#define SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR0_VALID (8u)

◆ SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR_VALID

#define SDL_VTM_TSGLOBAL_MAXT_OUTRG_ALERT_THR_VALID (16u)

◆ SDL_VTM_TSGLOBAL_SAMPLES_PER_CNT_VALID

#define SDL_VTM_TSGLOBAL_SAMPLES_PER_CNT_VALID (32u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF_CLK

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF_CLK (1u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF2_CLK

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_SEL_FIX_REF2_CLK (2u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_1

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_1 (0u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_2

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_2 (1u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_3

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_3 (2u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_4

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_4 (3u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_5

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_5 (4u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_6

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_6 (5u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_7

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_7 (6u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_8

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_8 (7u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_9

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_9 (8u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_10

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_10 (9u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_11

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_11 (10u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_12

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_12 (11u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_13

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_13 (12u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_14

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_14 (13u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_15

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_15 (14u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_16

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_16 (15u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_17

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_17 (16u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_18

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_18 (17u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_19

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_19 (18u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_20

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_20 (19u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_21

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_21 (20u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_22

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_22 (21u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_23

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_23 (22u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_24

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_24 (23u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_25

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_25 (24u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_26

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_26 (25u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_27

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_27 (26u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_28

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_28 (27u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_29

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_29 (28u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_30

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_30 (29u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_31

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_31 (30u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_32

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_32 (31u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_33

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_33 (32u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_34

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_34 (33u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_35

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_35 (34u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_36

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_36 (35u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_37

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_37 (36u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_38

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_38 (37u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_39

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_39 (38u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_40

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_40 (39u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_41

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_41 (40u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_42

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_42 (41u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_43

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_43 (42u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_44

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_44 (43u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_45

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_45 (44u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_46

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_46 (45u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_47

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_47 (46u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_48

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_48 (47u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_49

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_49 (48u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_50

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_50 (49u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_51

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_51 (50u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_52

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_52 (51u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_53

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_53 (52u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_54

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_54 (53u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_55

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_55 (54u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_56

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_56 (55u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_57

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_57 (56u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_58

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_58 (57u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_59

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_59 (58u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_60

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_60 (59u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_61

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_61 (60u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_62

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_62 (61u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_63

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_63 (62u)

◆ SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_64

#define SDL_VTM_TSGLOBAL_CLK_CTRL_CLK_DIV_BY_64 (63u)

◆ SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_ENABLE

#define SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_ENABLE (1u)

◆ SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_DISABLE

#define SDL_VTM_TSGLOBAL_ANY_MAXT_OUTRG_ALERT_DISABLE (0u)

◆ SDL_VTM_TS_CTRL_MAXT_OUTG_ALERT_VALID

#define SDL_VTM_TS_CTRL_MAXT_OUTG_ALERT_VALID (1u)

◆ SDL_VTM_TS_CTRL_RESET_CTRL_VALID

#define SDL_VTM_TS_CTRL_RESET_CTRL_VALID (2u)

◆ SDL_VTM_TS_CTRL_SOC_VALID

#define SDL_VTM_TS_CTRL_SOC_VALID (4u)

◆ SDL_VTM_TS_CTRL_MODE_VALID

#define SDL_VTM_TS_CTRL_MODE_VALID (8u)

◆ SDL_VTM_TS_CTRL_MAXT_OUTRG_GEN_ALERT

#define SDL_VTM_TS_CTRL_MAXT_OUTRG_GEN_ALERT (1u)

◆ SDL_VTM_TS_CTRL_MAXT_OUTRG_NO_ALERT

#define SDL_VTM_TS_CTRL_MAXT_OUTRG_NO_ALERT (0u)

◆ SDL_VTM_TS_CTRL_SENSOR_RESET

#define SDL_VTM_TS_CTRL_SENSOR_RESET (0u)

◆ SDL_VTM_TS_CTRL_SENSOR_NORM_OP

#define SDL_VTM_TS_CTRL_SENSOR_NORM_OP (1u)

◆ SDL_VTM_TS_CTRL_SINGLESHOT_MODE

#define SDL_VTM_TS_CTRL_SINGLESHOT_MODE (0u)

◆ SDL_VTM_TS_CTRL_CONTINUOUS_MODE

#define SDL_VTM_TS_CTRL_CONTINUOUS_MODE (1u)

◆ SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_IN_PROGRESS

#define SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_IN_PROGRESS (1u)

◆ SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_COMPLETE

#define SDL_VTM_TS_CTRL_SINGLESHOT_ADC_CONV_COMPLETE (0u)

◆ SDL_VTM_GT_TH1_VALID

#define SDL_VTM_GT_TH1_VALID (1u)

◆ SDL_VTM_GT_TH2_VALID

#define SDL_VTM_GT_TH2_VALID (2u)

◆ SDL_VTM_LT_TH0_VALID

#define SDL_VTM_LT_TH0_VALID (4u)

◆ SDL_VTM_TS_READ_VD_MAP_VAL

#define SDL_VTM_TS_READ_VD_MAP_VAL (1U)

◆ SDL_VTM_TS_READ_ALL_THRESHOLD_ALERTS

#define SDL_VTM_TS_READ_ALL_THRESHOLD_ALERTS (2U)

◆ SDL_VTM_TS_READ_FIRST_TIME_EOC_BIT

#define SDL_VTM_TS_READ_FIRST_TIME_EOC_BIT (4U)

◆ SDL_VTM_TS_READ_DATA_VALID_BIT

#define SDL_VTM_TS_READ_DATA_VALID_BIT (8U)

◆ SDL_VTM_TS_READ_DATA_OUT_VAL

#define SDL_VTM_TS_READ_DATA_OUT_VAL (16U)

◆ SDL_VTM_VD_EVT_STAT_THR_ALERTS_MASK

#define SDL_VTM_VD_EVT_STAT_THR_ALERTS_MASK (7u)

◆ SDL_VTM_VD_EVT_STAT_LT_TH0_ALERT

#define SDL_VTM_VD_EVT_STAT_LT_TH0_ALERT (4u)

◆ SDL_VTM_VD_EVT_STAT_GT_TH1_ALERT

#define SDL_VTM_VD_EVT_STAT_GT_TH1_ALERT (1u)

◆ SDL_VTM_VD_EVT_STAT_GT_TH2_ALERT

#define SDL_VTM_VD_EVT_STAT_GT_TH2_ALERT (2u)

Typedef Documentation

◆ SDL_VTM_configVdCtrl

typedef uint8_t SDL_VTM_configVdCtrl

This enumerator define for VTM VD configuration valid map.

◆ SDL_VTM_configTsCtrl

typedef uint8_t SDL_VTM_configTsCtrl

This enumerator define for VTM TS configuration valid map.

◆ SDL_VTM_vid_opp

typedef uint8_t SDL_VTM_vid_opp

This enumerator defines the possible VID Codes to set various voltage domain supply voltages.

◆ SDL_VTM_ts_stat_vd_map

typedef uint8_t SDL_VTM_ts_stat_vd_map

This enumerator defines the core voltage domain mapping of VTM VD.

◆ SDL_VTM_intrCtrl

typedef uint16_t SDL_VTM_intrCtrl

This enumerator define for VTM Voltage domain threshold interrupt control.

◆ SDL_VTM_vdEvtSel_set

typedef uint16_t SDL_VTM_vdEvtSel_set

This enumerator define for VTM Voltage domain Event selection set.

◆ SDL_VTM_tsGlobal_ctrl_valid_map

typedef uint32_t SDL_VTM_tsGlobal_ctrl_valid_map

This enumerator defines for VTM Temperature sensor id control update valid maps. This controls the selective update of the fields in the temperature sensor control field.

◆ SDL_VTM_tsGlobal_clkSel

typedef uint8_t SDL_VTM_tsGlobal_clkSel

This enumerator define for VTM Temperature sensor global control Clock select options.

◆ SDL_VTM_tsGlobal_clkDiv

typedef uint8_t SDL_VTM_tsGlobal_clkDiv

This enumerator define for VTM Temperature sensor global control Clock divide options.

◆ SDL_VTM_tsGlobal_any_maxt_outrg_alert_en

typedef uint8_t SDL_VTM_tsGlobal_any_maxt_outrg_alert_en

This enumerator define for VTM Temperature sensor global control any max temperature alert enable control.

◆ SDL_VTM_tsGlobal_samples_per_count

typedef uint16_t SDL_VTM_tsGlobal_samples_per_count

This enumerator define for VTM Temperature sensor global control samples per count.

◆ SDL_VTM_tsCtrl_valid_map

typedef uint8_t SDL_VTM_tsCtrl_valid_map

This enumerator define for VTM Temperature sensor control valid map.

◆ SDL_VTM_tsCtrl_max_outrg_alert

typedef uint8_t SDL_VTM_tsCtrl_max_outrg_alert

This enumerator define for VTM temperature sensor band gap maximum temperature out of range alert control.

◆ SDL_VTM_tsCtrl_resetCtrl

typedef uint8_t SDL_VTM_tsCtrl_resetCtrl

This enumerator define for VTM temperature sensor band gap reset control bits.

◆ SDL_VTM_tsCtrl_mode

typedef uint8_t SDL_VTM_tsCtrl_mode

This enumerator define for VTM temperature sensor mode control bits.

◆ SDL_VTM_tsCtrl_singleshot_conv_stat

typedef uint8_t SDL_VTM_tsCtrl_singleshot_conv_stat

This enumerator define for VTM temperature sensor band gap single shot mode start of conversion trigger.

◆ SDL_VTM_thr_valid_map

typedef uint8_t SDL_VTM_thr_valid_map

This enumerator define for VTM Temperature Sensor thresholds valid bit map.

◆ SDL_VTM_Stat_read_ctrl

typedef uint8_t SDL_VTM_Stat_read_ctrl

This enumerator define for VTM temperature sensor STAT read valid map.

◆ SDL_VTM_adc_code

typedef int16_t SDL_VTM_adc_code

This enumerator define for VTM temperature sensor ADC code This is the data_out value of the temperature sensor stat register.

◆ SDL_VTM_vdEvt_status

typedef uint8_t SDL_VTM_vdEvt_status

This enumerator define for VTM Voltage domain event status.