SDL API Guide for J721E
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Data Bus Mask | |
typedef uint32_t | SDL_MCRC_DataBusMask_t |
MCRC data bus type mask selected for tracing control. More... | |
#define | SDL_MCRC_DATA_BUS_ITCM_MASK (SDL_MCRC_MCRC_BUS_SEL_ITC_MEN_MASK) |
#define | SDL_MCRC_DATA_BUS_DTCM_MASK (SDL_MCRC_MCRC_BUS_SEL_DTC_MEN_MASK) |
#define | SDL_MCRC_DATA_BUS_VBUSM_MASK (SDL_MCRC_MCRC_BUS_SEL_MEN_MASK) |
#define | SDL_MCRC_DATA_BUS_MASK_ALL |
#define SDL_MCRC_INTR_PRIORITY_CH1_FAIL (0x1U) |
Offset return for channel 1 fail interrupt
#define SDL_MCRC_INTR_PRIORITY_CH2_FAIL (0x2U) |
Offset return for channel 1 fail interrupt
#define SDL_MCRC_INTR_PRIORITY_CH3_FAIL (0x3U) |
Offset return for channel 1 fail interrupt
#define SDL_MCRC_INTR_PRIORITY_CH4_FAIL (0x4U) |
Offset return for channel 4 fail interrupt
#define SDL_MCRC_INTR_PRIORITY_CH1_COMPRESSION_DONE (0x9U) |
Offset return for channel 1 compression done interrupt
#define SDL_MCRC_INTR_PRIORITY_CH2_COMPRESSION_DONE (0xaU) |
Offset return for channel 2 compression done interrupt
#define SDL_MCRC_INTR_PRIORITY_CH3_COMPRESSION_DONE (0xbU) |
Offset return for channel 3 compression done interrupt
#define SDL_MCRC_INTR_PRIORITY_CH4_COMPRESSION_DONE (0xcU) |
Offset return for channel 4 compression done interrupt
#define SDL_MCRC_INTR_PRIORITY_CH1_OVERRUN (0x11U) |
Offset return for channel 1 overrun interrupt
#define SDL_MCRC_INTR_PRIORITY_CH2_OVERRUN (0x12U) |
Offset return for channel 2 overrun interrupt
#define SDL_MCRC_INTR_PRIORITY_CH3_OVERRUN (0x13U) |
Offset return for channel 3 overrun interrupt
#define SDL_MCRC_INTR_PRIORITY_CH4_OVERRUN (0x14U) |
Offset return for channel 4 overrun interrupt
#define SDL_MCRC_INTR_PRIORITY_CH1_UNDERRUN (0x19U) |
Offset return for channel 1 underrun interrupt
#define SDL_MCRC_INTR_PRIORITY_CH2_UNDERRUN (0x1aU) |
Offset return for channel 2 underrun interrupt
#define SDL_MCRC_INTR_PRIORITY_CH3_UNDERRUN (0x1bU) |
Offset return for channel 3 underrun interrupt
#define SDL_MCRC_INTR_PRIORITY_CH4_UNDERRUN (0x1cU) |
Offset return for channel 4 underrun interrupt
#define SDL_MCRC_INTR_PRIORITY_CH1_TIMEOUT (0x21U) |
Offset return for channel 1 timeout interrupt
#define SDL_MCRC_INTR_PRIORITY_CH2_TIMEOUT (0x22U) |
Offset return for channel 2 timeout interrupt
#define SDL_MCRC_INTR_PRIORITY_CH3_TIMEOUT (0x23U) |
Offset return for channel 3 timeout interrupt
#define SDL_MCRC_INTR_PRIORITY_CH4_TIMEOUT (0x24U) |
Offset return for channel 4 timeout interrupt
#define SDL_MCRC_DATA_BUS_ITCM_MASK (SDL_MCRC_MCRC_BUS_SEL_ITC_MEN_MASK) |
Select tracing control of instruction TCM
#define SDL_MCRC_DATA_BUS_DTCM_MASK (SDL_MCRC_MCRC_BUS_SEL_DTC_MEN_MASK) |
Select tracing control of data TCM
#define SDL_MCRC_DATA_BUS_VBUSM_MASK (SDL_MCRC_MCRC_BUS_SEL_MEN_MASK) |
Select tracing control of VBUSM
#define SDL_MCRC_DATA_BUS_MASK_ALL |
Select tracing control of all data buses
typedef uint32_t SDL_MCRC_IntrPriority_t |
The offset for the highest pending priority interrupt. These interrupt offset returned in SDL_MCRC_GetHighestPriorityIntrStatus function.
typedef uint32_t SDL_MCRC_DataBusMask_t |
MCRC data bus type mask selected for tracing control.