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◆ SOC_MCU_ESM_BASE
#define SOC_MCU_ESM_BASE SDL_MCU_ESM0_CFG_BASE |
◆ SOC_WKUP_ESM_BASE
#define SOC_WKUP_ESM_BASE SDL_WKUP_ESM0_CFG_BASE |
◆ SOC_MAIN_ESM_BASE
#define SOC_MAIN_ESM_BASE SDL_ESM0_CFG_BASE |
◆ SOC_MCU_ESM_MAX_NUM_EVENTS
#define SOC_MCU_ESM_MAX_NUM_EVENTS (SDLR_MCU_ESM0_ESM_PLS_EVENT2_MCU_R5FSS0_CCM_COMPARE_STAT_PULSE_INTR_0+1U) |
◆ SOC_WKUP_ESM_MAX_NUM_EVENTS
#define SOC_WKUP_ESM_MAX_NUM_EVENTS (SDLR_WKUP_ESM0_ESM_PLS_EVENT0_WKUP_GPIOMUX_INTRTR0_OUTP_15+1U) |
◆ SOC_MAIN_ESM_MAX_NUM_EVENTS
#define SOC_MAIN_ESM_MAX_NUM_EVENTS (SDLR_ESM0_ESM_PLS_EVENT0_PCIE3_PCIE_ASF_PULSE_0+1U) |