63 #ifndef TIVX_SOC_J721E_H_    64 #define TIVX_SOC_J721E_H_    86 #define TIVX_TARGET_MPU_0      "MPU-0"    91 #define TIVX_TARGET_MPU_1      "MPU-1"    96 #define TIVX_TARGET_MPU_2      "MPU-2"   101 #define TIVX_TARGET_MPU_3      "MPU-3"   109 #define TIVX_TARGET_DSP1        "DSP-1"   117 #define TIVX_TARGET_DSP2        "DSP-2"   131 #define TIVX_TARGET_DSP_C7_1    "DSP_C7-1"   138 #define TIVX_TARGET_DSP_C7_1_PRI_1    TIVX_TARGET_DSP_C7_1   144 #define TIVX_TARGET_DSP_C7_1_PRI_2    "DSP_C7-1_PRI_2"   150 #define TIVX_TARGET_DSP_C7_1_PRI_3    "DSP_C7-1_PRI_3"   156 #define TIVX_TARGET_DSP_C7_1_PRI_4    "DSP_C7-1_PRI_4"   162 #define TIVX_TARGET_DSP_C7_1_PRI_5    "DSP_C7-1_PRI_5"   168 #define TIVX_TARGET_DSP_C7_1_PRI_6    "DSP_C7-1_PRI_6"   174 #define TIVX_TARGET_DSP_C7_1_PRI_7    "DSP_C7-1_PRI_7"   180 #define TIVX_TARGET_DSP_C7_1_PRI_8    "DSP_C7-1_PRI_8"   188 #define TIVX_TARGET_MCU2_0      "MCU2-0"   196 #define TIVX_TARGET_IPU1_0      "MCU2-0"   204 #define TIVX_TARGET_MCU2_1      "MCU2-1"   212 #define TIVX_TARGET_IPU1_1      "MCU2-1"   220 #define TIVX_TARGET_MCU3_0      "MCU3-0"   228 #define TIVX_TARGET_MCU3_1      "MCU3-1"   233 #define TIVX_TARGET_CAPTURE1     "CAPTURE1"   238 #define TIVX_TARGET_CAPTURE2     "CAPTURE2"   243 #define TIVX_TARGET_CAPTURE3     "CAPTURE3"   248 #define TIVX_TARGET_CAPTURE4     "CAPTURE4"   253 #define TIVX_TARGET_CAPTURE5     "CAPTURE5"   258 #define TIVX_TARGET_CAPTURE6     "CAPTURE6"   263 #define TIVX_TARGET_CAPTURE7     "CAPTURE7"   268 #define TIVX_TARGET_CAPTURE8     "CAPTURE8"   273 #define TIVX_TARGET_CSITX     "CSITX"   278 #define TIVX_TARGET_DISPLAY_M2M1     "DSS_M2M1"   283 #define TIVX_TARGET_DISPLAY_M2M2     "DSS_M2M2"   288 #define TIVX_TARGET_DISPLAY_M2M3     "DSS_M2M3"   293 #define TIVX_TARGET_DISPLAY_M2M4     "DSS_M2M4"   298 #define TIVX_TARGET_DISPLAY1     "DISPLAY1"   303 #define TIVX_TARGET_DISPLAY2     "DISPLAY2"   308 #define TIVX_TARGET_DMPAC_DOF    "DMPAC_DOF"   313 #define TIVX_TARGET_DMPAC_SDE    "DMPAC_SDE"   318 #define TIVX_TARGET_VPAC_LDC1    "VPAC_LDC1"   323 #define TIVX_TARGET_VPAC_MSC1    "VPAC_MSC1"   328 #define TIVX_TARGET_VPAC_MSC2    "VPAC_MSC2"   333 #define TIVX_TARGET_VPAC_NF      "VPAC_NF"   338 #define TIVX_TARGET_VPAC_VISS1   "VPAC_VISS1"   354 typedef enum _tivx_cpu_id_e {
 
tivx_cpu_id_e
CPU ID for supported CPUs.