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    PDK API Guide for J721E
    
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This file contains the type definitions and helper macros for the Ethernet PHY interface.
Go to the source code of this file.
Data Structures | |
| struct | EnetPhy_Version | 
| PHY version (ID).  More... | |
| struct | EnetPhy_LinkCfg | 
| Link speed and duplexity configuration.  More... | |
| struct | EnetPhy_FsmTimeoutCfg | 
| PHY State-Machine time-out values.  More... | |
| struct | EnetPhy_Cfg | 
| PHY configuration parameters.  More... | |
| struct | EnetPhy_Mdio | 
| MDIO driver.  More... | |
| struct | EnetPhy_State | 
| PHY driver FSM state.  More... | |
| struct | EnetPhy_Obj | 
| PHY driver object.  More... | |
Macros | |
| #define | ENETPHY_IS_ADDR_VALID(addr) ((addr) <= 31U) | 
| Check if PHY address is valid (0 - 31).  More... | |
| #define | ENETPHY_BIT(n) (1U << (n)) | 
| Macro to set bit at given bit position.  More... | |
| #define | ENETPHY_IS_BIT_SET(val, n) (((val) & ENETPHY_BIT(n)) != 0U) | 
| Macro to check if bit at given bit position is set.  More... | |
| #define | ENETPHY_ARRAYSIZE(x) (sizeof(x) / sizeof(x[0])) | 
| Macro to get the size of an array.  More... | |
| #define | ENETPHY_EXTENDED_CFG_SIZE_MAX (128U) | 
| Max extended configuration size, arbitrarily chosen.  More... | |
| #define | ENETPHY_FSM_TICK_PERIOD_MS (100U) | 
| Enet PHY State Machine tick period.  More... | |
| #define | ENETPHY_INVALID_PHYADDR (~0U) | 
| Invalid PHY address indicator.  More... | |
Ethernet PHY driver error codes  | |
| #define | ENETPHY_SOK (CSL_PASS) | 
| Success.  More... | |
| #define | ENETPHY_EFAIL (CSL_EFAIL) | 
| Generic failure error condition (typically caused by hardware).  More... | |
| #define | ENETPHY_EBADARGS (CSL_EBADARGS) | 
| Bad arguments (i.e. NULL pointer).  More... | |
| #define | ENETPHY_EINVALIDPARAMS (CSL_EINVALID_PARAMS) | 
| Invalid parameters (i.e. value out-of-range).  More... | |
| #define | ENETPHY_ETIMEOUT (CSL_ETIMEOUT) | 
| Time out while waiting for a given condition to happen.  More... | |
| #define | ENETPHY_EALLOC (CSL_EALLOC) | 
| Allocation failure.  More... | |
| #define | ENETPHY_EPERM (CSL_EALLOC - 4) | 
| Operation not permitted.  More... | |
| #define | ENETPHY_ENOTSUPPORTED (CSL_EALLOC - 5) | 
| Operation not supported.  More... | |
Ethernet PHY link capability masks  | |
| #define | ENETPHY_LINK_CAP_HD10 ENETPHY_BIT(1) | 
| 10-Mbps, half-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_FD10 ENETPHY_BIT(2) | 
| 10-Mbps, full-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_HD100 ENETPHY_BIT(3) | 
| 100-Mbps, half-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_FD100 ENETPHY_BIT(4) | 
| 100-Mbps, full-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_HD1000 ENETPHY_BIT(5) | 
| 1-Gbps, half-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_FD1000 ENETPHY_BIT(6) | 
| 1-Gbps, full-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_10 | 
| 10-Mbps, full and half-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_100 | 
| 100-Mbps, full and half-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_1000 | 
| 1-Gbps, full and half-duplex capability mask.  More... | |
| #define | ENETPHY_LINK_CAP_ALL | 
| Auto-negotiation mask with all duplexity and speed values set.  More... | |
Typedefs | |
| typedef EnetPhy_Mdio * | EnetPhy_MdioHandle | 
| MDIO driver handle.  More... | |
| typedef struct EnetPhy_Drv_s * | EnetPhyDrv_Handle | 
| PHY specific driver handle.  More... | |
| typedef struct EnetPhy_Obj_s * | EnetPhy_Handle | 
| PHY driver object handle.  More... | |
Functions | |
| void | EnetPhy_initCfg (EnetPhy_Cfg *phyCfg) | 
| Initialize PHY config params.  More... | |
| void | EnetPhy_setExtendedCfg (EnetPhy_Cfg *phyCfg, const void *extendedCfg, uint32_t extendedCfgSize) | 
| Set PHY extended parameters.  More... | |
| EnetPhy_Handle | EnetPhy_open (const EnetPhy_Cfg *phyCfg, EnetPhy_Mii mii, const EnetPhy_LinkCfg *linkCfg, uint32_t macPortCaps, EnetPhy_MdioHandle hMdio, void *mdioArgs) | 
| Open the PHY driver.  More... | |
| void | EnetPhy_close (EnetPhy_Handle hPhy) | 
| Close the PHY driver.  More... | |
| EnetPhy_LinkStatus | EnetPhy_tick (EnetPhy_Handle hPhy) | 
| Run PHY state machine.  More... | |
| int32_t | EnetPhy_getId (EnetPhy_Handle hPhy, EnetPhy_Version *version) | 
| Get PHY id.  More... | |
| bool | EnetPhy_isAlive (EnetPhy_Handle hPhy) | 
| Get PHY alive status.  More... | |
| bool | EnetPhy_isLinked (EnetPhy_Handle hPhy) | 
| Get link status.  More... | |
| int32_t | EnetPhy_getLinkCfg (EnetPhy_Handle hPhy, EnetPhy_LinkCfg *linkCfg) | 
| Get link configuration.  More... | |
| int32_t | EnetPhy_readReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t *val) | 
| Read PHY register.  More... | |
| int32_t | EnetPhy_writeReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t val) | 
| Write PHY register.  More... | |
| int32_t | EnetPhy_rmwReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t mask, uint16_t val) | 
| Read-modify-write PHY register.  More... | |
| int32_t | EnetPhy_readExtReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t *val) | 
| Read PHY extended register.  More... | |
| int32_t | EnetPhy_writeExtReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t val) | 
| Write PHY extended register.  More... | |
| int32_t | EnetPhy_rmwExtReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t mask, uint16_t val) | 
| Read-modify-write PHY extended register.  More... | |
| int32_t | EnetPhy_readC45Reg (EnetPhy_Handle hPhy, uint8_t mmd, uint32_t reg, uint16_t *val) | 
| Read PHY register using Clause-45 frame.  More... | |
| int32_t | EnetPhy_writeC45Reg (EnetPhy_Handle hPhy, uint8_t mmd, uint32_t reg, uint16_t val) | 
| Write PHY register using Clause-45 frame.  More... | |
| int32_t | EnetPhy_rmwC45Reg (EnetPhy_Handle hPhy, uint8_t mmd, uint32_t reg, uint16_t mask, uint16_t val) | 
| Read-modify-write PHY register using Clause-45 frame.  More... | |
| void | EnetPhy_printRegs (EnetPhy_Handle hPhy) | 
| Print all PHY registers.  More... | |