uart.h File Reference

Introduction

This file contains the prototypes of device abstraction layer APIs corresponding to the UART module. This also contains necessary structure, enum and macro definitions and the APIs are consolidated to make them more functional.

Programming sequence of UART is as follows:

1. Enable Module Clocks for UART
2. Configure the Pinmux for the UART instance required
3. Perform a module reset of the UART instance through the API UARTModuleReset
4. Configure the Fifo settings required through the following API UARTFifoConfig
5. Set the Baud rate required for the UART and compute divisor value using the API UARTDivisorValCompute
6. Configure the Line Characteristics like the Word Length, Parity, Stop Bits through the API UARTLineCharacConfig
7. Disable the Break Control functionality through the following API UARTBreakCtl
8. Configure the UART Interrupts like Receive and Transmit through the following APIs UARTIntEnable and UARTIntDisable and UARTInt2Enable and UARTInt2Disable
9. Configure the UART DMA feature through the following API UARTDMAEnable and UARTDMADisable
10. To read and write a character from the FIFO use the following APIs UARTFIFOCharGet UARTFIFOCharPut
11. UART wakeup Events can be configured using the following APIs UARTWakeUpEventsEnable and UARTWakeUpEventsDisable
12. FlowControl can be enabled through Hardware or Software methods
    1. Hardware Flow control can be controlled by the following API UARTAutoRTSAutoCTSControl to control Auto-RTS and Auto-CTS feature respectively
    2. Software Flow control combinations can be configured through the following API UARTSoftwareFlowCtrlOptSet
    3. The XON and XOFF characters for software flow control are configured using XON related API's
    4. The trigger levels for the selected Flow control method can be configured through UARTFIFOTrigLvlGranControl API
13. AutoBaud
    1. The other AutoBaud Characteristics can be read using the following APIs UARTAutobaudParityGet UARTAutobaudWordLenGet UARTAutobaudSpeedGet

Go to the source code of this file.

Macros
The size of the Transmitter FIFO.
#define	TX_FIFO_SIZE   (64)
The size of the Receiver FIFO.
#define	RX_FIFO_SIZE   (64)
Values to configure the Operating modes of UART.
#define	UART16x_OPER_MODE   (UART_MDR1_MODE_SELECT_UART16X)
#define	UART_SIR_OPER_MODE   (UART_MDR1_MODE_SELECT_SIR)
#define	UART16x_AUTO_BAUD_OPER_MODE   (UART_MDR1_MODE_SELECT_UART16XAUTO)
#define	UART13x_OPER_MODE   (UART_MDR1_MODE_SELECT_UART13X)
#define	UART_MIR_OPER_MODE   (UART_MDR1_MODE_SELECT_MIR)
#define	UART_FIR_OPER_MODE   (UART_MDR1_MODE_SELECT_FIR)
#define	UART_CIR_OPER_MODE   (UART_MDR1_MODE_SELECT_CIR)
#define	UART_DISABLED_MODE   (UART_MDR1_MODE_SELECT_MASK)
Values to configure Timeout Behaviour for UART.
#define	UART_TIMEOUT_COUNTER_RESET   (0U)
#define	UART_TIMEOUT_COUNTER_NO_CHANGE   (1U)
Values to control the Line characteristics.
#define	UART_BREAK_COND_DISABLE
#define	UART_BREAK_COND_ENABLE
Values to control parity feature.
#define	UART_PARITY_REPR_1
#define	UART_PARITY_REPR_0
#define	UART_ODD_PARITY
#define	UART_EVEN_PARITY
#define	UART_PARITY_NONE
#define	UART_FRAME_NUM_STB_1
	Number of Stop Bits per frame. More...
#define	UART_FRAME_NUM_STB_1_5_2
#define	UART_FRAME_WORD_LENGTH_5
	Word Length per frame. More...
#define	UART_FRAME_WORD_LENGTH_6
#define	UART_FRAME_WORD_LENGTH_7
#define	UART_FRAME_WORD_LENGTH_8
Values associated with setting the Trigger Levels and DMA mode
selection.
#define	UART_FCR_RX_TRIG_LVL_8
	Values for trigger level for the Receiver FIFO. More...
#define	UART_FCR_RX_TRIG_LVL_16
#define	UART_FCR_RX_TRIG_LVL_56
#define	UART_FCR_RX_TRIG_LVL_60
#define	UART_FCR_TX_TRIG_LVL_8
	Values for the trigger level for the Transmitter FIFO. More...
#define	UART_FCR_TX_TRIG_LVL_16
#define	UART_FCR_TX_TRIG_LVL_32
#define	UART_FCR_TX_TRIG_LVL_56
#define	UART_DMA_MODE_0_ENABLE
	Values corresponding to DMA mode selection. More...
#define	UART_DMA_MODE_1_ENABLE
#define	UART_DMA_MODE_2_ENABLE
#define	UART_DMA_MODE_3_ENABLE
#define	UART_DMA_EN_PATH_FCR
	Values used to choose the path for configuring the DMA Mode. DMA Mode could be configured either through FCR or SCR. More...
#define	UART_DMA_EN_PATH_SCR
Values related to enabling/disabling of Interrupts.
#define	UART_INT_CTS   (UART_IER_CTS_IT_MASK)
	Values for enabling/disabling the interrupts of UART. More...
#define	UART_INT_RTS   (UART_IER_RTS_IT_MASK)
#define	UART_INT_XOFF   (UART_IER_XOFF_IT_MASK)
#define	UART_INT_SLEEPMODE   (UART_IER_SLEEP_MODE_MASK)
#define	UART_INT_MODEM_STAT   (UART_IER_MODEM_STS_IT_MASK)
#define	UART_INT_LINE_STAT   (UART_IER_LINE_STS_IT_MASK)
#define	UART_INT_THR   (UART_IER_THR_IT_MASK)
#define	UART_INT_RHR_CTI   (UART_IER_RHR_IT_MASK)
#define	UART_INT2_RX_EMPTY   (UART_IER2_EN_RXFIFO_EMPTY_MASK)
#define	UART_INT2_TX_EMPTY   (UART_IER2_EN_TXFIFO_EMPTY_MASK)
Values related to Line Status information.
#define	UART_FIFO_PE_FE_BI_DETECTED   (UART_LSR_RX_FIFO_STS_MASK)
	Values pertaining to UART Line Status information. More...
#define	UART_BREAK_DETECTED_ERROR   (UART_LSR_RX_BI_MASK)
#define	UART_FRAMING_ERROR   (UART_LSR_RX_FE_MASK)
#define	UART_PARITY_ERROR   (UART_LSR_RX_PE_MASK)
#define	UART_OVERRUN_ERROR   (UART_LSR_RX_OE_MASK)
Values related to status of Interrupt souces.
#define	UART_INTID_MODEM_STAT
	Values pertaining to status of UART Interrupt sources. More...
#define	UART_INTID_TX_THRES_REACH
#define	UART_INTID_RX_THRES_REACH
#define	UART_INTID_RX_LINE_STAT_ERROR
#define	UART_INTID_CHAR_TIMEOUT
#define	UART_INTID_XOFF_SPEC_CHAR_DETECT
#define	UART_INTID_MODEM_SIG_STATE_CHANGE
#define	UART_INT_PENDING   (0U)
	Values indicating the UART Interrupt pending status. More...
#define	UART_N0_INT_PENDING   (1U)
Values pertaining to control of Enhanced Features.
#define	UART_AUTO_CTS_ENABLE
	Values for controlling Auto-CTS and Auto-RTS features. More...
#define	UART_AUTO_CTS_DISABLE
#define	UART_AUTO_RTS_ENABLE
#define	UART_AUTO_RTS_DISABLE
#define	UART_SPECIAL_CHAR_DETECT_ENABLE   (UART_EFR_SPECIAL_CHAR_DETECT_MASK)
	Values to enable/disable detection of Special Character. More...
#define	UART_SPECIAL_CHAR_DETECT_DISABLE
#define	UART_NO_SOFTWARE_FLOW_CONTROL
	Values to configure the options for Software Flow Control. More...
#define	UART_TX_RX_XON1_XOFF1
#define	UART_TX_RX_XON2_XOFF2
#define	UART_TX_RX_XON1_XOFF1_XON2_XOFF2
#define	UART_NO_HARDWARE_FLOW_CONTROL   UART_EFR_HW_NO_FLOW_CONTROL_VALUE
#define	UART_RTS_ENABLE   UART_EFR_HW_ENABLE_RTS_VALUE
#define	UART_CTS_ENABLE   UART_EFR_HW_ENALE_CTS_VALUE
#define	UART_RTS_CTS_ENABLE   UART_EFR_HW_ENABLE_RTS_CTS_FLOW_CONTROL_VALUE
Values corresponding to Mode Definition Register 2(MDR2).
#define	UART_PULSE_NORMAL
	Values to enable/disable Pulse shaping for UART. More...
#define	UART_PULSE_SHAPING
Values corresponding to Mode Definition Register 3(MDR3).
#define	UART_TX_DMA_THRESHOLD_64
	Values used to control the method of setting the TX DMA Threshold value. More...
#define	UART_TX_DMA_THRESHOLD_REG
Macros related to control and status of Modem Signals.
#define	UART_XON_ANY_ENABLE
	Values to enable/disable XON any feature. More...
#define	UART_XON_ANY_DISABLE
#define	UART_LOOPBACK_MODE_ENABLE
	Values to enable/disable Loopback mode of operation. More...
#define	UART_LOOPBACK_MODE_DISABLE
#define	UART_DCD_CONTROL   (UART_MCR_CD_STS_CH_MASK)
	Macros used to force the Modem Control lines to active/inactive states. More...
#define	UART_RI_CONTROL   (UART_MCR_RI_STS_CH_MASK)
#define	UART_RTS_CONTROL   (UART_MCR_RTS_MASK)
#define	UART_DTR_CONTROL   (UART_MCR_DTR_MASK)
#define	UART_DCD_VALUE   (UART_MSR_NCD_STS_MASK)
	Values that indicate the values on Modem Control lines. More...
#define	UART_RI_VALUE   (UART_MSR_NRI_STS_MASK)
#define	UART_DSR_VALUE   (UART_MSR_NDSR_STS_MASK)
#define	UART_CTS_VALUE   (UART_MSR_NCTS_STS_MASK)
#define	UART_DCD_STS_CHANGED   (UART_MSR_DCD_STS_MASK)
	Values used to detect the changes in Modem Control lines. More...
#define	UART_RI_STS_CHANGED   (UART_MSR_RI_STS_MASK)
#define	UART_DSR_STS_CHANGED   (UART_MSR_DSR_STS_MASK)
#define	UART_CTS_STS_CHANGED   (UART_MSR_CTS_STS_MASK)
Values related to the control and status of Supplementary registers.
#define	UART_RX_TRIG_LVL_GRAN_1_DISABLE
	Values used to enable/disable a granularity of 1 for TX and RX FIFO triggerlevels. More...
#define	UART_RX_TRIG_LVL_GRAN_1_ENABLE
#define	UART_TX_TRIG_LVL_GRAN_1_DISABLE
#define	UART_TX_FIFO_LVL_GRAN_1_ENABLE
#define	UART_DSRn_INT_DISABLE
	Value used to enable/disable DSRn interrupt. More...
#define	UART_DSRn_INT_ENABLE
#define	UART_RX_CTS_DSR_WAKEUP_DISABLE
	Values to control the module Wake-Up rights for RX, CTSn and DSRn pins. More...
#define	UART_RX_CTS_DSR_WAKEUP_ENABLE
#define	UART_THR_INT_NORMAL
	Values to control the THR interrupt modes. More...
#define	UART_THR_INT_FIFO_TSR_EMPTY
#define	UART_DMA_CNTR_NO_RESET_FIFO_RESET
	Values to control the DMA counter reset features. More...
#define	UART_DMA_CNTR_RESET_FIFO_RESET
#define	UART_RX_CTS_DSR_NO_FALL_EDGE
	Values indicating the Falling edge status on RX, CTSn and DSRn pins. More...
#define	UART_RX_CTS_DSR_FALL_EDGE
#define	UART_TX_FIFO_NOT_FULL
	Values indicating the filled status of TX FIFO. More...
#define	UART_TX_FIFO_FULL
Values related to Auxilliary Control Register(ACREG).
#define	UART_SD_PIN_LOW
	Values to set/clear the SD pin. More...
#define	UART_SD_PIN_HIGH
Values controlling System Configuration functions.
#define	UART_IDLEMODE_FORCE_IDLE
	Values controlling Power Management Request/Acknowledgement modes. More...
#define	UART_IDLEMODE_NO_IDLE
#define	UART_IDLEMODE_SMART_IDLE
#define	UART_IDLEMODE_SMART_IDLE_WAKEUP
#define	UART_WAKEUP_ENABLE
	Values enabling/disabling WakeUp capability. More...
#define	UART_WAKEUP_DISABLE
#define	UART_AUTO_IDLE_MODE_ENABLE
	Values to enable /disable Autoidle mode. More...
#define	UART_AUTO_IDLE_MODE_DISABLE
Values configuring Wake-up modes for the UART in Wake-Up Enable
Register.
#define	UART_WAKEUP_TX_INTERRUPT   (UART_WER_EVENT_7_TX_WAKEUP_EN_MASK)
	Values that enable/disable Wake-Up generation ability for various signals. More...
#define	UART_WAKEUP_RLS_INTERRUPT
#define	UART_WAKEUP_RHR_INTERRUPT
#define	UART_WAKEUP_RX_ACTIVITY   (UART_WER_EVENT_4_RX_ACTIVITY_MASK)
#define	UART_WAKEUP_DCD_ACTIVITY
#define	UART_WAKEUP_RI_ACTIVITY   (UART_WER_EVENT_2_RI_ACTIVITY_MASK)
#define	UART_WAKEUP_DSR_ACTIVITY   (UART_WER_EVENT_1_DSR_ACTIVITY_MASK)
#define	UART_WAKEUP_CTS_ACTIVITY   (UART_WER_EVENT_0_CTS_ACTIVITY_MASK)
Values indicating the line characteristics of UART Autobauding mode
communication.
#define	UART_AUTOBAUD_NO_PARITY
	Values indicating the parity in UART Autobauding mode. More...
#define	UART_AUTOBAUD_PARITY_SPACE
#define	UART_AUTOBAUD_EVEN_PARITY
#define	UART_AUTOBAUD_ODD_PARITY
#define	UART_AUTOBAUD_CHAR_LENGTH_7
	Values indicating the word length in UART Autobaud mode. More...
#define	UART_AUTOBAUD_CHAR_LENGTH_8
#define	UART_AUTOBAUD_NO_SPEED_IDEN   (UART_UASR_SPEED_SPEED_VALUE_0)
	Values indicating the baud rate in UART Autobaud mode. More...
#define	UART_AUTOBAUD_SPEED_115200   (UART_UASR_SPEED_SPEED_VALUE_1)
#define	UART_AUTOBAUD_SPEED_57600   (UART_UASR_SPEED_SPEED_VALUE_2)
#define	UART_AUTOBAUD_SPEED_38400   (UART_UASR_SPEED_SPEED_VALUE_3)
#define	UART_AUTOBAUD_SPEED_28800   (UART_UASR_SPEED_SPEED_VALUE_4)
#define	UART_AUTOBAUD_SPEED_19200   (UART_UASR_SPEED_SPEED_VALUE_5)
#define	UART_AUTOBAUD_SPEED_14400   (UART_UASR_SPEED_SPEED_VALUE_6)
#define	UART_AUTOBAUD_SPEED_9600   (UART_UASR_SPEED_SPEED_VALUE_7)
#define	UART_AUTOBAUD_SPEED_4800   (UART_UASR_SPEED_SPEED_VALUE_8)
#define	UART_AUTOBAUD_SPEED_2400   (UART_UASR_SPEED_SPEED_VALUE_9)
#define	UART_AUTOBAUD_SPEED_1200   (UART_UASR_SPEED_SPEED_VALUE_10)
Miscellaneous macros.
#define	UART_TRIG_LVL_GRANULARITY_4   ((uint32_t) 0x0000U)
	Values used to choose the trigger level granularity. More...
#define	UART_TRIG_LVL_GRANULARITY_1   ((uint32_t) 0x0001U)
#define	UART_REG_CONFIG_MODE_A   (uint32_t) (0x0080)
	Values to be used while switching between register configuration modes. More...
#define	UART_REG_CONFIG_MODE_B   (uint32_t) (0x00BF)
#define	UART_REG_OPERATIONAL_MODE   (uint32_t) (0x007F)
#define	UART_FIFO_CONFIG(txGra, rxGra, txTrig, rxTrig, txClr, rxClr, dmaEnPath, dmaMode)
	Parameterized macro to configure the FIFO settings. More...
#define	UART_FCR_PROGRAM(rxFIFOTrig, txFIFOTrig, dmaMode, txClr, rxClr, fifoEn)
	Parameterized macro used to determine a value to be written to FCR. More...
#define	UART_FIFO_CONFIG_TXGRA   ((uint32_t) 0xFU << 26)
#define	UART_FIFO_CONFIG_RXGRA   ((uint32_t) 0xFU << 22)
#define	UART_FIFO_CONFIG_TXTRIG   ((uint32_t) 0xFFU << 14)
#define	UART_FIFO_CONFIG_RXTRIG   ((uint32_t) 0xFFU << 6)
#define	UART_FIFO_CONFIG_TXCLR   ((uint32_t) 0x1U << 5)
#define	UART_FIFO_CONFIG_RXCLR   ((uint32_t) 0x1U << 4)
#define	UART_FIFO_CONFIG_DMAENPATH   ((uint32_t) 0x1U << 3)
#define	UART_FIFO_CONFIG_DMAMODE   ((uint32_t) 0x7U << 0)
#define	UART_MIR_OVERSAMPLING_RATE_41   ((uint32_t) 41U)
	Over-sampling rate for MIR mode used to obtain the Divisor Values. More...
#define	UART_MIR_OVERSAMPLING_RATE_42   ((uint32_t) 42U)
#define	UART_FCR_TX_FIFO_TRIG_8SPACES   ((uint32_t) 0x0U)
#define	UART_FCR_TX_FIFO_TRIG_16SPACES   ((uint32_t) 0x1U)
#define	UART_FCR_TX_FIFO_TRIG_32SPACES   ((uint32_t) 0x2U)
#define	UART_FCR_TX_FIFO_TRIG_56SPACES   ((uint32_t) 0x3U)
#define	UART_LCR_STB_SHIFT   ((uint32_t) 0x00000002U)
	used in uart console init function More...
#define	UART_LCR_PEN_SHIFT   ((uint32_t) 0x00000003U)
#define	UART_LCR_BC_SHIFT   ((uint32_t) 0x00000006U)
#define	UART_LCR_PARITY_EN_DISABLE   ((uint32_t) 0x0U)
#define	UART_MDR1_MODE_SELECT_CIR   ((uint32_t) 0x6U)
#define	UART_MDR1_MODE_SELECT_DISABLED   ((uint32_t) 0x7U)
#define	UART_MDR1_MODE_SELECT_FIR   ((uint32_t) 0x5U)
#define	UART_MDR1_MODE_SELECT_MIR   ((uint32_t) 0x4U)
#define	UART_MDR1_MODE_SELECT_SIR   ((uint32_t) 0x1U)
#define	UART_MDR1_MODE_SELECT_UART13X   ((uint32_t) 0x3U)
#define	UART_MDR1_MODE_SELECT_UART16X   ((uint32_t) 0x0U)
#define	UART_MDR1_MODE_SELECT_UART16XAUTO   ((uint32_t) 0x2U)
#define	UART_FCR_RX_FIFO_TRIG_16CHAR   ((uint32_t) 0x1U)
#define	UART_FCR_RX_FIFO_TRIG_56CHAR   ((uint32_t) 0x2U)
#define	UART_FCR_RX_FIFO_TRIG_60CHAR   ((uint32_t) 0x3U)
#define	UART_FCR_RX_FIFO_TRIG_8CHAR   ((uint32_t) 0x0U)
#define	UART_EFR_SW_FLOW_CONTROL_RX_SHIFT   ((uint32_t) 0x0U)
#define	UART_EFR_SW_FLOW_CONTROL_TX_SHIFT   ((uint32_t) 0x2U)
#define	UART_MDR3_SET_DMA_TX_THRESHOLD_64   ((uint32_t) 0x0U)
	macros used to determine a value to be written to MDR3. More...
#define	UART_MDR3_SET_DMA_TX_THRESHOLD_REG   ((uint32_t) 0x1U)
#define	UART_MDR3_DIR_POL_0   ((uint32_t) 0U)
#define	UART_MDR3_DIR_POL_1   ((uint32_t) 1U)

Functions
uint32_t	UARTOperatingModeSelect (uint32_t baseAddr, uint32_t modeFlag)
	This API configures the operating mode for the UART instance. The different operating modes are: More...
uint32_t	UARTDivisorValCompute (uint32_t moduleClk, uint32_t baudRate, uint32_t modeFlag, uint32_t mirOverSampRate)
	This API computes the divisor value for the specified operating mode. Not part of this API, the divisor value returned is written to the Divisor Latches to configure the Baud Rate. More...
uint32_t	UARTDivisorLatchWrite (uint32_t baseAddr, uint32_t divisorValue)
	This API is used to write the specified divisor value to Divisor Latch registers DLL and DLH. More...
void	UARTDivisorLatchEnable (uint32_t baseAddr)
	This API enables write access to Divisor Latch registers DLL and DLH. More...
void	UARTDivisorLatchDisable (uint32_t baseAddr)
	This API disables write access to Divisor Latch registers DLL and DLH. More...
uint32_t	UARTRegConfigModeEnable (uint32_t baseAddr, uint32_t modeFlag)
	This API configures the specified Register Configuration mode for the UART. More...
void	UARTRegConfModeRestore (uint32_t baseAddr, uint32_t lcrRegValue)
	This API is used to restore the UART to the specified Register Configuration Mode. More...
void	UARTBreakCtl (uint32_t baseAddr, uint32_t breakState)
	This API is used to introduce or to remove a Break condition. More...
void	UARTLineCharacConfig (uint32_t baseAddr, uint32_t wLenStbFlag, uint32_t parityFlag)
	This API configures the Line Characteristics for the UART instance. The Line Characteristics include: More...
void	UARTParityModeSet (uint32_t baseAddr, uint32_t parityFlag)
	This API configures the Parity feature for the UART. More...
uint32_t	UARTParityModeGet (uint32_t baseAddr)
	This API reads the Parity configuration being set in the UART. More...
void	UARTDMAEnable (uint32_t baseAddr, uint32_t dmaModeFlag)
	This API enables the DMA mode of operation for the UART instance. More...
void	UARTDMADisable (uint32_t baseAddr)
	This API disables the DMA mode of operation. More...
uint32_t	UARTFIFOConfig (uint32_t baseAddr, uint32_t fifoConfig)
	This API configures the FIFO settings for the UART instance. Specifically, this does the following configurations: 1> Configures the Transmitter and Receiver FIFO Trigger Level granularity 2> Configures the Transmitter and Receiver FIFO Trigger Level 3> Configures the bits which clear/not clear the TX and RX FIFOs 4> Configures the DMA mode of operation . More...
uint32_t	UARTEnhanFuncEnable (uint32_t baseAddr)
	This API sets a certain bit in Enhanced Feature Register(EFR) which shall avail the UART to use some Enhanced Features. More...
void	UARTEnhanFuncBitValRestore (uint32_t baseAddr, uint32_t enhanFnBitVal)
	This API restores the ENHANCEDEN bit value of EFR register(EFR[4]) to the corresponding bit value in 'enhanFnBitVal' passed as a parameter to this API. More...
uint32_t	UARTSubConfigMSRSPRModeEn (uint32_t baseAddr)
	This API enables the MSR_SPR Sub-Configuration Mode of operation. More...
uint32_t	UARTSubConfigTCRTLRModeEn (uint32_t baseAddr)
	This API enables the TCR_TLR Sub_Configuration Mode of operation. More...
uint32_t	UARTSubConfigXOFFModeEn (uint32_t baseAddr)
	This API enables the XOFF Sub-Configuration Mode of operation. More...
void	UARTTCRTLRBitValRestore (uint32_t baseAddr, uint32_t tcrTlrBitVal)
	This API restores the TCRTLR bit(MCR[6]) value in Modem Control Register(MCR) to the corresponding bit value in 'tcrTlrBitVal' passed as a parameter to this API. More...
void	UARTIntEnable (uint32_t baseAddr, uint32_t intFlag)
	This API enables the specified interrupts in the UART mode of operation. More...
void	UARTIntDisable (uint32_t baseAddr, uint32_t intFlag)
	This API disables the specified interrupts in the UART mode of operation. More...
void	UARTInt2Enable (uint32_t baseAddr, uint32_t intFlag)
	This API enables the specified interrupts in the UART mode of operation for IER2. More...
void	UARTInt2Disable (uint32_t baseAddr, uint32_t intFlag)
	This API disables the specified interrupts in the UART mode of operation for IER2. More...
uint32_t	UARTSpaceAvail (uint32_t baseAddr)
	This API checks whether the TX FIFO (or THR in non-FIFO mode) is empty or not. More...
uint32_t	UARTCharsAvail (uint32_t baseAddr)
	This API checks if the RX FIFO (or RHR in non-FIFO mode) has atleast one byte of data to be read. More...
uint32_t	UARTCharPutNonBlocking (uint32_t baseAddr, uint8_t byteWrite)
	This API attempts to write a byte into Transmitter Holding Register (THR). It checks only once if the transmitter is empty. More...
int8_t	UARTCharGetNonBlocking (uint32_t baseAddr)
	This API reads a byte from the Receiver Buffer Register (RBR). It checks once if any character is ready to be read. More...
int8_t	UARTCharGet (uint32_t baseAddr)
	This API waits indefinitely for the arrival of a byte in the receiver FIFO. Once a byte has arrived, it returns that byte. More...
uint8_t	UARTCharGetTimeout (uint32_t baseAddr, uint32_t timeOutVal)
	This API waits for the arrival of atleast one byte into the Receiver FIFO or until a specified timeout value gets decremented to zero, whichever happens first. More...
void	UARTCharPut (uint32_t baseAddr, uint8_t byteTx)
	This API waits indefinitely until the Transmitter FIFO (THR register in non-FIFO mode) and Transmitter Shift Register are empty. On empty, it writes a byte to the THR. More...
void	UARTFIFOCharPut (uint32_t baseAddr, uint8_t byteTx)
	This API writes a byte to the Transmitter FIFO without checking for the emptiness of the Transmitter FIFO or the Transmitter Shift Register(TSR). More...
int8_t	UARTFIFOCharGet (uint32_t baseAddr)
	This API reads the data present at the top of the RX FIFO, that is, the data in the Receive Holding Register(RHR). However before reading the data from RHR, it does not check whether RHR has fresh data or not. More...
uint32_t	UARTFIFOWrite (uint32_t baseAddr, const uint8_t *pBuffer, uint32_t numTxBytes)
	This API copies the requested amount of data from the pointed data block to the UART Transmit FIFO. More...
uint32_t	UARTRxErrorGet (uint32_t baseAddr)
	This API reads the receiver data error status. More...
uint32_t	UARTIntIdentityGet (uint32_t baseAddr)
	This API determines the UART Interrupt Status. More...
uint32_t	UARTIntPendingStatusGet (uint32_t baseAddr)
	This API determines whether any UART interrupt condition is still alive and is pending to be serviced. More...
uint32_t	UARTInt2StatusGet (uint32_t baseAddr)
	This API determines the UART Interrupt Status 2. More...
uint32_t	UARTFIFOEnableStatusGet (uint32_t baseAddr)
	This API determines whether FIFO mode of operation is enabled for the UART instance or not. More...
void	UARTAutoRTSAutoCTSControl (uint32_t baseAddr, uint32_t autoCtsControl, uint32_t autoRtsControl)
	This API controls the use of Auto-RTS and Auto-CTS features which are used in Hardware Flow Control Mode of operation. The Auto-RTS and Auto-CTS functions can be individually enabled or disabled. More...
void	UARTSpecialCharDetectControl (uint32_t baseAddr, uint32_t controlFlag)
	This API controls the feature of detecting a Special Character arriving in the receiver. More...
void	UARTSoftwareFlowCtrlOptSet (uint32_t baseAddr, uint32_t swFlowCtrl)
	This API configures the options for Software Flow Control. More...
void	UARTHardwareFlowCtrlOptSet (uint32_t baseAddr, uint32_t hwFlowCtrl)
	This API configures the options for hardware Flow Control. More...
void	UARTPulseShapingControl (uint32_t baseAddr, uint32_t shapeControl)
	Used only in UART mode, this API is used to control the pulse shaping feature. Pulse shaping feature could either be enabled or disabled in UART mode. More...
void	UARTModuleReset (uint32_t baseAddr)
	This API performs a module reset of the UART instance. It also waits until the reset process is complete. More...
void	UARTIdleModeConfigure (uint32_t baseAddr, uint32_t modeFlag)
	This API can be used to control the Power Management request/acknowledgement process. More...
void	UARTWakeUpControl (uint32_t baseAddr, uint32_t controlFlag)
	This API is used to control(enable/disable) the Wake-Up feature of the UART. More...
void	UARTAutoIdleModeControl (uint32_t baseAddr, uint32_t modeFlag)
	This API is used to control(enable/disable) the Auto-Idle mode of operation of the UART. More...
void	UARTFlowCtrlTrigLvlConfig (uint32_t baseAddr, uint32_t rtsHaltFlag, uint32_t rtsStartFlag)
	This API configures the Receiver FIFO threshold level to start/stop transmission during Hardware Flow Control. More...
void	UARTXON1XOFF1ValProgram (uint32_t baseAddr, uint8_t xon1Value, uint8_t xoff1Value)
	This API programs the XON1/ADDR1 and XOFF1 registers. More...
void	UARTXON2XOFF2ValProgram (uint32_t baseAddr, uint8_t xon2Value, uint8_t xoff2Value)
	This API programs the XON2/ADDR2 and XOFF2 registers. More...
void	UARTXONAnyFeatureControl (uint32_t baseAddr, uint32_t controlFlag)
	This API controls(enables/disables) the XON-any feature in Modem Control Register(MCR). More...
void	UARTLoopbackModeControl (uint32_t baseAddr, uint32_t controlFlag)
	This API controls(enables/disables) the Loopback mode of operation for the UART instance. More...
void	UARTModemControlSet (uint32_t baseAddr, uint32_t modeFlag)
	This API switches the specified Modem Control Signals to active state. The Modem Control signals in context are DCD, RI, RTS and DTR. More...
void	UARTModemControlClear (uint32_t baseAddr, uint32_t modeFlag)
	This API switches the specified Modem Control signals to inactive state. The Modem Control signals in context are DCD, RI, RTS and DTR. More...
uint32_t	UARTModemStatusGet (uint32_t baseAddr)
	This API reads the values on Modem Signal Lines. The Modem Signals in context are: 1> Data Carrier Detect(DCD) 2> Ring Indicator(RI) 3> Data Set Ready(DSR) 4> Clear To Send(CTS) . More...
uint32_t	UARTModemStatusChangeCheck (uint32_t baseAddr)
	This API determines if the values on Modem Signal Lines have changed since the last read of Modem Status Register(MSR). The Modem Signals in context are DCD, RI, DSR, CTS. More...
void	UARTResumeOperation (uint32_t baseAddr)
	This API reads the RESUME register which clears the internal flags. More...
void	UARTWakeUpEventsEnable (uint32_t baseAddr, uint32_t wakeUpFlag)
	This API enables the Wake-Up capability for the specified events. On enabling Wake-Up capability for them, the occurence of the corresponding event shall wake up the system. More...
void	UARTWakeUpEventsDisable (uint32_t baseAddr, uint32_t wakeUpFlag)
	This API disables the Wake-Up capability for the specified events. On disabling Wake-Up capability for them, the occurence of the corresponding event shall not wake up the system. More...
void	UARTFIFOTrigLvlGranControl (uint32_t baseAddr, uint32_t rxFIFOGranCtrl, uint32_t txFIFOGranCtrl)
	This API controls the feature of setting the Trigger Level granularity as 1 for Transmitter and Receiver FIFOs. More...
void	UARTDSRInterruptControl (uint32_t baseAddr, uint32_t controlFlag)
	This API controls the interrupt enable and disable feature for Data Set Ready(DSRn) interrupt. More...
void	UARTTxEmptyIntControl (uint32_t baseAddr, uint32_t controlFlag)
	This API is used to choose a condition under which a Transmit Holding Register(THR) Interrupt should occur. A THR interrupt can be configured to occur either when: 1> TX FIFO becoming empty OR 2> TX FIFO and TX Shift register becoming empty. More...
void	UARTRXCTSDSRWakeUpConfigure (uint32_t baseAddr, uint32_t wakeUpFlag)
	This API controls (enables/disables) a feature where a falling edge on the RX, CTSn or DSRs could send a wake-up interrupt to the CPU. More...
uint32_t	UARTRXCTSDSRTransitionStatusGet (uint32_t baseAddr)
	This API determines whether a falling edge occured on RX, CTSn or DSRn lines. More...
void	UARTDMACounterResetControl (uint32_t baseAddr, uint32_t controlFlag)
	This API controls the DMA Counter Reset options. More...
uint32_t	UARTTxFIFOFullStatusGet (uint32_t baseAddr)
	This API determines whether the Transmitter FIFO is full or not. More...
uint32_t	UARTTxFIFOLevelGet (uint32_t baseAddr)
	This API determines the current level of the Transmitter FIFO. More...
uint32_t	UARTRxFIFOLevelGet (uint32_t baseAddr)
	This API determines the current level of the Receiver FIFO. More...
uint32_t	UARTAutobaudParityGet (uint32_t baseAddr)
	This API determines the Parity mode being configured by the system in the UART Autobauding mode. More...
uint32_t	UARTAutobaudWordLenGet (uint32_t baseAddr)
	This API determines the word length per frame(character length) being configured by the system in UART Autobauding mode. More...
uint32_t	UARTAutobaudSpeedGet (uint32_t baseAddr)
	This API determines the baud rate being configured by the system in UART Autobauding mode. More...
void	UARTScratchPadRegWrite (uint32_t baseAddr, uint32_t scratchValue)
	This API programs the Scratchpad Register with the specified value. More...
uint32_t	UARTScratchPadRegRead (uint32_t baseAddr)
	This API reads the value in Scratchpad Register. More...
uint32_t	UARTModuleVersionNumberGet (uint32_t baseAddr)
	This API reads the Revision Number of the module from the Module Version Register(MVR). More...
void	UARTFIFORegisterWrite (uint32_t baseAddr, uint32_t fcrValue)
	This API is used to write a specified value to the FIFO Control Register(FCR). More...
void	UARTTxDMAThresholdControl (uint32_t baseAddr, uint32_t thrsCtrlFlag)
	This function controls the method of setting the Transmit DMA Threshold Value. The Transmit DMA Threshold Value can be set to a default value of 64 characters or can take the value in TX_DMA_THRESHOLD register. More...
void	UARTTxDMAThresholdValConfig (uint32_t baseAddr, uint32_t thrsValue)
	This function programs the TX_DMA_THRESHOLD register which holds Transmit DMA Threshold value to be used. When a TX DMA Threshold value other than 64 characters is required, this function can be used to program the same. More...
void	UARTFIFOLevelSet (uint32_t baseAddr, uint32_t rxLevel)
	This function sets the receiver FIFO trigger level. . More...
uint32_t	UARTModemControlGet (uint32_t baseAddr)
	This function gets the status of the RTS and AFE bits in the MCR register. More...
void	UARTFIFOCtrlRegWrite (uint32_t baseAddr, uint32_t fcrValue)
	This API is used to write a specified value to the FIFO Control Register(FCR) without disabling the divisor values. Preferable setting FCR during runtime. More...
void	UARTModemControlReset (uint32_t baseAddr)
	This API resets the Modem control register. More...
uint32_t	UARTReadStatus (uint32_t baseAddr)
	This API reads the line status register value. More...
uint32_t	UARTIsTransmitterEmpty (uint32_t baseAddr)
	This API returns the transmitter empty status i.e. if Transmitter FIFO (THR register in non-FIFO mode) and Transmitter Shift Register are empty. More...
uint32_t	UARTCharGetNonBlocking2 (uint32_t baseAddr, uint8_t *pChar)
	This API reads a byte from the Receiver Buffer Register (RBR). It checks once if any character is ready to be read. More...
uint32_t	UARTCharGetTimeout2 (uint32_t baseAddr, uint32_t timeOutVal, uint8_t *pChar)
	This API waits for the arrival of atleast one byte into the Receiver FIFO or until a specified timeout value gets decremented to zero, whichever happens first.This is a replacement for the UARTCharGetTimeout which will incorrectly return timeout if the UART receives 0xFF as data. More...
void	UARTDirPolSet (uint32_t baseAddr, uint32_t dirPol)
	This API is used to set the RS-485 External Transceiver Direction Polarity. More...
void	UARTDirEnControl (uint32_t baseAddr, uint32_t dirEnFlag)
	This API is used to control the RS-485 External Transceiver Direction. More...
void	UARTSetTimeOutValue (uint32_t baseAddr, uint16_t timeoutIntrVal, uint32_t timeoutBehavior)
	This API is used to set the timeout value and the TIMEOUT_BEHAVE. More...